Add GPIO, EthernetAVB and MMC support for iWave G20D-Q7 board
Subsystems (8)
cover Add GPIO, EthernetAVB and MMC support for iWave G20D-Q7 board
This patch series adds support for a number of interfaces to the iWave iwg20d-q7 (CIP reference) board which is based on the Renesas r8a7743 SoC.
Support is added for GPIO, EthernetAVB and MMC. In addition there is a patch to add low-level debug support.
This series completes the basic platform support for the Renesas CIP reference platform allowing users to get the platform up and running.
This patch series applies cleanly to and is tested on linux-4.4.y-cip 1e2ef7cc8.
Biju Das (7):
ARM: dts: iwg20d-q7: Add pinctl support for scif0
gpio: rcar: Add R8A7743 (RZ/G1M) support
ARM: dts: r8a7743: Add GPIO support
dt-bindings: net: ravb : Add support for r8a7743 SoC
ARM: shmobile: defconfig: Enable Ethernet AVB
ARM: dts: r8a7743: Add Ethernet AVB support
ARM: dts: iwg20d-q7: Add Ethernet AVB support
Chris Paterson (4):
dt-bindings: mmc: sh_mmcif: Document r8a7743 DT bindings
ARM: dts: r8a7743: Add MMCIF0 support
ARM: dts: iwg20m: Add MMCIF0 support
ARM: debug-ll: Add support for r8a7743
Geert Uytterhoeven (2):
pinctrl: sh-pfc: r8a7791: Add missing mmc_data8_b pin group
ARM: dts: iwg20m: Correct indentation of mmcif0 properties
Sergei Shtylyov (1):
ARM: dts: r8a7743: add PFC support
Simon Horman (1):
ravb: add fallback compatibility strings
.../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + .../devicetree/bindings/mmc/renesas,mmcif.txt | 1 + .../devicetree/bindings/net/renesas,ravb.txt | 20 ++- arch/arm/Kconfig.debug | 8 +- arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 31 +++++ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26 ++++ arch/arm/boot/dts/r8a7743.dtsi | 146 ++++++++++++++++++++- arch/arm/configs/shmobile_defconfig | 1 + drivers/gpio/gpio-rcar.c | 4 + drivers/net/ethernet/renesas/ravb_main.c | 2 + drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 15 ++- 11 files changed, 245 insertions(+), 10 deletions(-)
Signature · 1 line
1.9.1
PATCH 1/15 ARM: dts: r8a7743: add PFC support
From: Sergei Shtylyov <[email protected]>
Define the generic R8A7743 part of the PFC device node.
Conflicts:
arch/arm/boot/dts/r8a7743.dtsi --- arch/arm/boot/dts/r8a7743.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
arch/arm/boot/dts/r8a7743.dtsi +6 -1
@@ -1,7 +1,7 @@ /* * Device Tree Source for the r8a7743 SoC * - * Copyright (C) 2016 Cogent Embedded Inc. + * Copyright (C) 2016-2017 Cogent Embedded Inc. * Copyright (C) 2017 Renesas Electronics Corp. * * This file is licensed under the terms of the GNU General Public License
@@ -93,6 +93,11 @@ IRQ_TYPE_LEVEL_LOW)>; }; + pfc: pin-controller at e6060000 { + compatible = "renesas,pfc-r8a7743"; + reg = <0 0xe6060000 0 0x250>; + }; + dmac0: dma-controller at e6700000 { compatible = "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>;
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1.9.1
PATCH 2/15 ARM: dts: iwg20d-q7: Add pinctl support for scif0
In reply to Chris PatersonFrom: Biju Das <[email protected]>
Adding pinctrl support for scif0 interface.
--- arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 10 ++++++++++ 1 file changed, 10 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts +10 -0
@@ -20,6 +20,16 @@ }; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data_d"; + function = "scif0"; + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; };
Signature · 1 line
1.9.1
PATCH 3/15 gpio: rcar: Add R8A7743 (RZ/G1M) support
In reply to Chris PatersonFrom: Biju Das <[email protected]>
Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2 family. Add support for its GPIO controllers.
--- Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + drivers/gpio/gpio-rcar.c | 4 ++++ 2 files changed, 5 insertions(+)
Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt +1 -0
@@ -3,6 +3,7 @@ Required Properties: - compatible: should contain one of the following. + - "renesas,gpio-r8a7743": for R8A7743 (RZ/G1M) compatible GPIO controller. - "renesas,gpio-r8a7778": for R8A7778 (R-Mobile M1) compatible GPIO controller. - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller. - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller.
drivers/gpio/gpio-rcar.c +4 -0
@@ -330,6 +330,10 @@ static const struct gpio_rcar_info gpio_rcar_info_gen2 = {static const struct of_device_id gpio_rcar_of_table[] = { { + .compatible ="renesas,gpio-r8a7743" , +/* RZ/G1 GPIO is identical to R-Car Gen2. */ + .data = &gpio_rcar_info_gen2, + }, { .compatible ="renesas,gpio-r8a7790" , .data = &gpio_rcar_info_gen2, }, {
Signature · 1 line
1.9.1
PATCH 4/15 ARM: dts: r8a7743: Add GPIO support
In reply to Chris PatersonFrom: Biju Das <[email protected]>
Describe GPIO blocks in the R8A7743 device tree.
(modified the clocks and power-domains property, removed resets property)
--- arch/arm/boot/dts/r8a7743.dtsi | 112 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +112 -0
@@ -62,6 +62,118 @@ power-domains = <&cpg_clocks>; }; + gpio0: gpio at e6050000 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6050000 0 0x50>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO0>; + power-domains = <&cpg_clocks>; + }; + + gpio1: gpio at e6051000 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6051000 0 0x50>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 26>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO1>; + power-domains = <&cpg_clocks>; + }; + + gpio2: gpio at e6052000 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6052000 0 0x50>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO2>; + power-domains = <&cpg_clocks>; + }; + + gpio3: gpio at e6053000 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6053000 0 0x50>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO3>; + power-domains = <&cpg_clocks>; + }; + + gpio4: gpio at e6054000 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6054000 0 0x50>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO4>; + power-domains = <&cpg_clocks>; + }; + + gpio5: gpio at e6055000 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6055000 0 0x50>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO5>; + power-domains = <&cpg_clocks>; + }; + + gpio6: gpio at e6055400 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6055400 0 0x50>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO6>; + power-domains = <&cpg_clocks>; + }; + + gpio7: gpio at e6055800 { + compatible = "renesas,gpio-r8a7743", + "renesas,gpio-rcar"; + reg = <0 0xe6055800 0 0x50>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 224 26>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7743_CLK_GPIO7>; + power-domains = <&cpg_clocks>; + }; + irqc: interrupt-controller at e61c0000 { compatible = "renesas,irqc-r8a7743", "renesas,irqc"; #interrupt-cells = <2>;
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1.9.1
PATCH 5/15 ravb: add fallback compatibility strings
In reply to Chris PatersonFrom: Simon Horman <[email protected]>
Add fallback compatibility strings for R-Car Gen 2 & 3 SoC Families. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs.
--- Documentation/devicetree/bindings/net/renesas,ravb.txt | 9 ++++++++- drivers/net/ethernet/renesas/ravb_main.c | 2 ++ 2 files changed, 10 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/net/renesas,ravb.txt +8 -1
@@ -7,6 +7,13 @@ Required properties: - compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC. "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC. "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC. + "renesas,etheravb-rcar-gen2" for generic R-Car Gen 2 compatible interface. + "renesas,etheravb-rcar-gen3" for generic R-Car Gen 3 compatible interface. + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first + followed by the generic version. + - reg: offset and length of (1) the register block and (2) the stream buffer. - interrupts: A list of interrupt-specifiers, one for each entry in interrupt-names.
@@ -37,7 +44,7 @@ Optional properties: Example: ethernet at e6800000 { - compatible = "renesas,etheravb-r8a7795"; + compatible = "renesas,etheravb-r8a7795", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
drivers/net/ethernet/renesas/ravb_main.c +2 -0
@@ -1688,7 +1688,9 @@ static int ravb_mdio_release(struct ravb_private *priv)static const struct of_device_id ravb_match_table[] = { { .compatible ="renesas,etheravb-r8a7790" , .data = (void *)RCAR_GEN2 }, { .compatible ="renesas,etheravb-r8a7794" , .data = (void *)RCAR_GEN2 }, + { .compatible ="renesas,etheravb-rcar-gen2" , .data = (void *)RCAR_GEN2 }, { .compatible ="renesas,etheravb-r8a7795" , .data = (void *)RCAR_GEN3 }, + { .compatible ="renesas,etheravb-rcar-gen3" , .data = (void *)RCAR_GEN3 }, { } };MODULE_DEVICE_TABLE (of, ravb_match_table);
Signature · 1 line
1.9.1
PATCH 6/15 dt-bindings: net: ravb : Add support for r8a7743 SoC
In reply to Chris PatersonFrom: Biju Das <[email protected]>
Add a new compatible string for the RZ/G1M (R8A7743) SoC.
(Documented r8a7743 SoC)
Conflicts:
Documentation/devicetree/bindings/net/renesas,ravb.txt
--- .../devicetree/bindings/net/renesas,ravb.txt | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-)
Documentation/devicetree/bindings/net/renesas,ravb.txt +13 -8
@@ -4,15 +4,20 @@ This file provides information on what the device node for the Ethernet AVB interface contains. Required properties: -- compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC. - "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC. - "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC. - "renesas,etheravb-rcar-gen2" for generic R-Car Gen 2 compatible interface. - "renesas,etheravb-rcar-gen3" for generic R-Car Gen 3 compatible interface. +- compatible: Must contain one or more of the following: + - "renesas,etheravb-r8a7743" for the R8A7743 SoC. + - "renesas,etheravb-r8a7790" for the R8A7790 SoC. + - "renesas,etheravb-r8a7794" for the R8A7794 SoC. + - "renesas,etheravb-rcar-gen2" as a fallback for the above + R-Car Gen2 and RZ/G1 devices. - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first - followed by the generic version. + - "renesas,etheravb-r8a7795" for the R8A7795 SoC. + - "renesas,etheravb-rcar-gen3" as a fallback for the above + R-Car Gen3 devices. + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first followed by + the generic version. - reg: offset and length of (1) the register block and (2) the stream buffer. - interrupts: A list of interrupt-specifiers, one for each entry in
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1.9.1
PATCH 7/15 ARM: shmobile: defconfig: Enable Ethernet AVB
In reply to Chris PatersonFrom: Biju Das <[email protected]>
The iWave RZ/G1M Q7 SOM supports Gigabit Ethernet Phy (Micrel KSZ9031MNX). Gigabit Ethernet support is available in Renesas AVB driver. To increase hardware support enable the driver in the shmobile_defconfig multiplatform configuration.
--- arch/arm/configs/shmobile_defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm/configs/shmobile_defconfig +1 -0
@@ -78,6 +78,7 @@ CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_NATSEMI is not set CONFIG_SH_ETH=y +CONFIG_RAVB=y # CONFIG_NET_VENDOR_SEEQ is not set CONFIG_SMSC911X=y # CONFIG_NET_VENDOR_STMICRO is not set
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1.9.1
PATCH 8/15 ARM: dts: r8a7743: Add Ethernet AVB support
In reply to Chris PatersonFrom: Biju Das <[email protected]>
Add Ethernet AVB support for r8a7743 SoC.
(Modified clocks, power-domains property and removed resets property)
Conflicts:
arch/arm/boot/dts/r8a7743.dtsi
--- arch/arm/boot/dts/r8a7743.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +12 -0
@@ -527,6 +527,18 @@ status = "disabled"; }; + avb: ethernet at e6800000 { + compatible = "renesas,etheravb-r8a7743", + "renesas,etheravb-rcar-gen2"; + reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp8_clks R8A7743_CLK_ETHERAVB>; + power-domains = <&cpg_clocks>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>;
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1.9.1
PATCH 9/15 ARM: dts: iwg20d-q7: Add Ethernet AVB support
In reply to Chris PatersonFrom: Biju Das <[email protected]>
Define the iWave RainboW-G20D-Qseven board dependent part of the Ethernet AVB device node.
--- arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts +21 -0
@@ -17,6 +17,7 @@ aliases { serial0 = &scif0; + ethernet0 = &avb; }; };
@@ -25,6 +26,11 @@ groups = "scif0_data_d"; function = "scif0"; }; + + avb_pins: avb { + groups = "avb_mdio", "avb_gmii"; + function = "avb"; + }; }; &scif0 {
@@ -33,3 +39,18 @@ status = "okay"; }; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy3>; + phy-mode = "gmii"; + renesas,no-ether-link; + status = "okay"; + + phy3: ethernet-phy at 3 { + reg = <3>; + micrel,led-mode = <1>; + }; +};
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1.9.1
PATCH 10/15 pinctrl: sh-pfc: r8a7791: Add missing mmc_data8_b pin group
In reply to Chris PatersonFrom: Geert Uytterhoeven <[email protected]>
Pins D6 and D7 of the MMC interface can be muxed to two different sets of pins, but currently only one set is supported.
Add a pin group for the alternative set to fix this.
--- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +14 -1
@@ -2593,6 +2593,17 @@ static const unsigned int mmc_data8_mux[] = {MMC_D0_MARK ,MMC_D1_MARK ,MMC_D2_MARK ,MMC_D3_MARK , MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK, }; +static const unsigned int mmc_data8_b_pins[] = { +/* D[0:7] */ +RCAR_GP_PIN (6 ,18 ),RCAR_GP_PIN (6 ,19 ), +RCAR_GP_PIN (6 ,20 ),RCAR_GP_PIN (6 ,21 ), +RCAR_GP_PIN (6 ,22 ),RCAR_GP_PIN (6 ,23 ), +RCAR_GP_PIN (6 ,6 ),RCAR_GP_PIN (6 ,7 ), +}; +static const unsigned int mmc_data8_b_mux[] = { +MMC_D0_MARK ,MMC_D1_MARK ,MMC_D2_MARK ,MMC_D3_MARK , +MMC_D4_MARK ,MMC_D5_MARK ,MMC_D6_B_MARK ,MMC_D7_B_MARK , +};static const unsigned int mmc_ctrl_pins[] = {/* CLK, CMD */ RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 17),
@@ -4424,7 +4435,7 @@ static const unsigned int vin2_clk_mux[] = { };static const struct { -struct sh_pfc_pin_group common[341 ]; +struct sh_pfc_pin_group common[342 ];struct sh_pfc_pin_group r8a779x[9 ]; } pinmux_groups = { .common = {
@@ -4527,6 +4538,7 @@ static const struct {SH_PFC_PIN_GROUP (mmc_data1),SH_PFC_PIN_GROUP (mmc_data4),SH_PFC_PIN_GROUP (mmc_data8), +SH_PFC_PIN_GROUP (mmc_data8_b),SH_PFC_PIN_GROUP (mmc_ctrl),SH_PFC_PIN_GROUP (msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync),
@@ -4959,6 +4971,7 @@ static const char * const mmc_groups[] = {"mmc_data1" ,"mmc_data4" ,"mmc_data8" , +"mmc_data8_b" , "mmc_ctrl", };
Signature · 1 line
1.9.1
PATCH 11/15 dt-bindings: mmc: sh_mmcif: Document r8a7743 DT bindings
In reply to Chris PatersonConflicts:
Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
--- Documentation/devicetree/bindings/mmc/renesas,mmcif.txt | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/mmc/renesas,mmcif.txt +1 -0
@@ -9,6 +9,7 @@ Required properties: - compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a fallback. Examples with <soctype> are: - "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs + - "renesas,mmcif-r8a7743" for the MMCIF found in r8a7743 SoCs - "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs - "renesas,mmcif-r8a7791" for the MMCIF found in r8a7791 SoCs - "renesas,mmcif-r8a7794" for the MMCIF found in r8a7794 SoCs
Signature · 1 line
1.9.1
PATCH 12/15 ARM: dts: r8a7743: Add MMCIF0 support
In reply to Chris PatersonAdd the MMCIF0 device to the r8a7743 device tree.
(modified the clocks and power-domains property, removed resets property)
Conflicts:
arch/arm/boot/dts/r8a7743.dtsi --- arch/arm/boot/dts/r8a7743.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +15 -0
@@ -539,6 +539,21 @@ status = "disabled"; }; + mmcif0: mmc at ee200000 { + compatible = "renesas,mmcif-r8a7743", + "renesas,sh-mmcif"; + reg = <0 0xee200000 0 0x80>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7743_CLK_MMCIF0>; + dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, + <&dmac1 0xd1>, <&dmac1 0xd2>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&cpg_clocks>; + reg-io-width = <4>; + max-frequency = <97500000>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>;
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1.9.1
PATCH 13/15 ARM: dts: iwg20m: Add MMCIF0 support
In reply to Chris PatersonDefine the iwg20m board dependent part of the MMCIF0 device node.
--- arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20m.dtsi +26 -0
@@ -22,8 +22,34 @@ device_type = "memory"; reg = <2 0x00000000 0 0x20000000>; }; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; }; &extal_clk { clock-frequency = <20000000>; }; + +&pfc { + mmcif0_pins: mmc { + groups = "mmc_data8_b", "mmc_ctrl"; + function = "mmc"; + }; +}; + +&mmcif0 { + pinctrl-0 = <&mmcif0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <®_3p3v>; + bus-width = <8>; + non-removable; + status = "okay"; +};
Signature · 1 line
1.9.1
PATCH 14/15 ARM: dts: iwg20m: Correct indentation of mmcif0 properties
In reply to Chris PatersonFrom: Geert Uytterhoeven <[email protected]>
--- arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/r8a7743-iwg20m.dtsi +6 -6
@@ -45,11 +45,11 @@ }; &mmcif0 { - pinctrl-0 = <&mmcif0_pins>; - pinctrl-names = "default"; + pinctrl-0 = <&mmcif0_pins>; + pinctrl-names = "default"; - vmmc-supply = <®_3p3v>; - bus-width = <8>; - non-removable; - status = "okay"; + vmmc-supply = <®_3p3v>; + bus-width = <8>; + non-removable; + status = "okay"; };
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1.9.1
PATCH 15/15 ARM: debug-ll: Add support for r8a7743
In reply to Chris PatersonEnable low-level debugging support for RZ/G1M (r8a7743). RZ/G1M uses SCIF0 for the debug console, like most of the R-Car Gen2 SoCs.
(removed r8a7792 SoC from the patch)
Conflicts:
arch/arm/Kconfig.debug
--- arch/arm/Kconfig.debug | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/Kconfig.debug +4 -4
@@ -817,12 +817,12 @@ choice via SCIF2 on Renesas R-Car H1 (R8A7779). config DEBUG_RCAR_GEN2_SCIF0 - bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793" - depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793 + bool "Kernel low-level debugging messages via SCIF0 on R-Car Gen2 and RZ/G1" + depends on ARCH_R8A7743 || ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793 help Say Y here if you want kernel low-level debugging support - via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), or - M2-N (R8A7793). + via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790), + M2-W (R8A7791), or M2-N (R8A7793). config DEBUG_RCAR_GEN2_SCIF2 bool "Kernel low-level debugging messages via SCIF2 on R8A7794"
Signature · 1 line
1.9.1
cover Add GPIO, EthernetAVB and MMC support for iWave G20D-Q7 board
In reply to Chris PatersonQuoted 10 lines · Chris Paterson
This patch series adds support for a number of interfaces to the iWave iwg20d-q7 (CIP reference) board which is based on the Renesas r8a7743 SoC.
Support is added for GPIO, EthernetAVB and MMC. In addition there is a patch to add low-level debug support.
This series completes the basic platform support for the Renesas CIP reference platform allowing users to get the platform up and running.
This patch series applies cleanly to and is tested on linux-4.4.y-cip
1e2ef7cc8.
This all looks good. I've applied these patches locally and will push out soon.
I booted it on my board and confirm that Ethernet and eMMC are now working. However, I had to enable EXT4_FS because shmobile_defconfig doesn't. That seems like an (upstream) bug.
Ben.
Quoted 40 lines
Biju Das (7):
ARM: dts: iwg20d-q7: Add pinctl support for scif0
gpio: rcar: Add R8A7743 (RZ/G1M) support
ARM: dts: r8a7743: Add GPIO support
dt-bindings: net: ravb : Add support for r8a7743 SoC
ARM: shmobile: defconfig: Enable Ethernet AVB
ARM: dts: r8a7743: Add Ethernet AVB support
ARM: dts: iwg20d-q7: Add Ethernet AVB supportChris Paterson (4):
dt-bindings: mmc:sh_mmcif: Document r8a7743 DT bindings
ARM: dts: r8a7743: Add MMCIF0 support
ARM: dts: iwg20m: Add MMCIF0 support
ARM: debug-ll: Add support for r8a7743Geert Uytterhoeven (2):
pinctrl: sh-pfc: r8a7791: Add missingmmc_data8_bpin group
ARM: dts: iwg20m: Correct indentation of mmcif0 propertiesSergei Shtylyov (1):
ARM: dts: r8a7743: add PFC supportSimon Horman (1):
ravb: add fallback compatibility strings.../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + .../devicetree/bindings/mmc/renesas,mmcif.txt | 1 + .../devicetree/bindings/net/renesas,ravb.txt | 20 ++- arch/arm/Kconfig.debug | 8 +- arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 31 +++++ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26 ++++ arch/arm/boot/dts/r8a7743.dtsi | 146 ++++++++++++++++++++- arch/arm/configs/shmobile_defconfig | 1 + drivers/gpio/gpio-rcar.c | 4 + drivers/net/ethernet/renesas/ravb_main.c | 2 + drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 15 ++- 11 files changed, 245 insertions(+), 10 deletions(-)
Signature · 2 lines
Ben Hutchings Software Developer, Codethink Ltd.
cover Add GPIO, EthernetAVB and MMC support for iWave G20D-Q7 board
Hello Ben,
Quoted 11 lines
From: Ben Hutchings [mailto:ben.hutchings at codethink.co.uk]
Sent: 04 October 2017 17:39Quoted 2 lines · Chris Paterson
This patch series adds support for a number of interfaces to the iWave iwg20d-q7 (CIP reference) board which is based on the Renesas r8a7743
SoC.
Quoted 4 lines
Support is added for GPIO, EthernetAVB and MMC. In addition there is a patch to add low-level debug support.
Quoted 7 lines
Quoted 4 lines
This series completes the basic platform support for the Renesas CIP reference platform allowing users to get the platform up and running.
This patch series applies cleanly to and is tested on linux-4.4.y-cip
1e2ef7cc8.This all looks good. I've applied these patches locally and will push out soon.
Thank you!
Quoted 3 lines
I booted it on my board and confirm that Ethernet and eMMC are now working.
Thanks for checking, it's good to know that you've got the h/w up and running.
Quoted 2 lines
However, I had to enable
EXT4_FSbecauseshmobile_defconfigdoesn't. That seems like an (upstream) bug.
Yep. shmobile_defconfig omits EXT4_FS. I keep meaning to ask why...
Kind regards, Chris
Quoted 49 lines
Ben.
Quoted 27 lines
Biju Das (7):
ARM: dts: iwg20d-q7: Add pinctl support for scif0
gpio: rcar: Add R8A7743 (RZ/G1M) support
ARM: dts: r8a7743: Add GPIO support
dt-bindings: net: ravb : Add support for r8a7743 SoC
ARM: shmobile: defconfig: Enable Ethernet AVB
ARM: dts: r8a7743: Add Ethernet AVB support
ARM: dts: iwg20d-q7: Add Ethernet AVB supportChris Paterson (4):
dt-bindings: mmc:sh_mmcif: Document r8a7743 DT bindings
ARM: dts: r8a7743: Add MMCIF0 support
ARM: dts: iwg20m: Add MMCIF0 support
ARM: debug-ll: Add support for r8a7743Geert Uytterhoeven (2):
pinctrl: sh-pfc: r8a7791: Add missingmmc_data8_bpin group
ARM: dts: iwg20m: Correct indentation of mmcif0 propertiesSergei Shtylyov (1):
ARM: dts: r8a7743: add PFC supportSimon Horman (1):
ravb: add fallback compatibility stringsQuoted 7 lines
.../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + .../devicetree/bindings/mmc/renesas,mmcif.txt | 1 + .../devicetree/bindings/net/renesas,ravb.txt | 20 ++- arch/arm/Kconfig.debug | 8 +- arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 31 +++++ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 26 ++++ arch/arm/boot/dts/r8a7743.dtsi | 146++++++++++++++++++++-
Quoted 6 lines
arch/arm/configs/shmobile_defconfig | 1 + drivers/gpio/gpio-rcar.c | 4 + drivers/net/ethernet/renesas/ravb_main.c | 2 + drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 15 ++- 11 files changed, 245 insertions(+), 10 deletions(-)--
Ben Hutchings
Software Developer, Codethink Ltd.