Patch "net: phy: Fix mask value write on gmii2rgmii converter speed register" has been added to the 4.13-stable tree
Subsystems (4)
This is a note to let you know that I've just added the patch titled
net: phy: Fix mask value write on gmii2rgmii converter speed register
to the 4.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
net-phy-fix-mask-value-write-on-gmii2rgmii-converter-speed-register.patch
and it can be found in the queue-4.13 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From foo@baz Mon Oct 9 09:32:35 CEST 2017
From: Fahad Kunnathadi <[email protected]>
Date: Fri, 15 Sep 2017 12:01:58 +0530
Subject: net: phy: Fix mask value write on gmii2rgmii converter speed register
From: Fahad Kunnathadi <[email protected]>
[ Upstream commit f2654a4781318dc7ab8d6cde66f1fa39eab980a9 ]
To clear Speed Selection in MDIO control register(0x10), ie, clear bits 6 and 13 to zero while keeping other bits same. Before AND operation,The Mask value has to be perform with bitwise NOT operation (ie, ~ operator)
This patch clears current speed selection before writing the new speed settings to gmii2rgmii converter
--- drivers/net/phy/xilinx_gmii2rgmii.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/net/phy/xilinx_gmii2rgmii.c +1 -1
@@ -44,7 +44,7 @@ static int xgmiitorgmii_read_status(stru priv->phy_drv->read_status (phydev); val =mdiobus_read (phydev->mdio.bus, priv->addr,XILINX_GMII2RGMII_REG ); - val &=XILINX_GMII2RGMII_SPEED_MASK ; + val &= ~XILINX_GMII2RGMII_SPEED_MASK ;if (phydev->speed ==SPEED_1000 ) val |=BMCR_SPEED1000 ;
Patches currently in stable-queue which might be from [email protected] are
queue-4.13/net-phy-fix-mask-value-write-on-gmii2rgmii-converter-speed-register.patch