Patch "iio: trigger: stm32-timer: preset shouldn't be buffered" has been added to the 4.13-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
iio: trigger: stm32-timer: preset shouldn't be buffered
to the 4.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
iio-trigger-stm32-timer-preset-shouldn-t-be-buffered.patch
and it can be found in the queue-4.13 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
0a56eabc4e3f730782e4a9f3af4f60aa03a8a849Mon Sep 17 00:00:00 2001
From: Fabrice Gasnier <[email protected]>
Date: Mon, 18 Sep 2017 12:05:30 +0200
Subject: iio: trigger: stm32-timer: preset shouldn't be buffered
From: Fabrice Gasnier <[email protected]>
commit 0a56eabc4e3f730782e4a9f3af4f60aa03a8a849 upstream.
Currently, setting preset value (ARR) will update directly 'Auto reload value' only on 1st write access. But then, ARPE is set. This makes ARR a shadow register. Preset value should be updated upon each write request: ensure ARPE is 0. This fixes successive writes to preset attribute.
--- drivers/iio/trigger/stm32-timer-trigger.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/iio/trigger/stm32-timer-trigger.c +2 -1
@@ -679,8 +679,9 @@ static ssize_t stm32_count_set_preset(stif (ret)return ret; +/* TIMx_ARR register shouldn't be buffered (ARPE=0) */ +regmap_update_bits (priv->regmap,TIM_CR1 ,TIM_CR1_ARPE ,0 );regmap_write (priv->regmap,TIM_ARR , preset); -regmap_update_bits (priv->regmap,TIM_CR1 ,TIM_CR1_ARPE ,TIM_CR1_ARPE );return len; }
Patches currently in stable-queue which might be from [email protected] are
queue-4.13/iio-adc-stm32-fix-bad-error-check-on-max_channels.patch queue-4.13/iio-trigger-stm32-timer-preset-shouldn-t-be-buffered.patch queue-4.13/iio-trigger-stm32-timer-fix-a-corner-case-to-write-preset.patch