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Patch "spi: armada-3700: Fix failing commands with quad-SPI" has been added to the 4.13-stable tree

PATCH [email protected] 1 participant 1 message Oct 30, 2017

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This is a note to let you know that I've just added the patch titled

spi: armada-3700: Fix failing commands with quad-SPI

to the 4.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
spi-armada-3700-fix-failing-commands-with-quad-spi.patch
and it can be found in the queue-4.13 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 747e1f60470b975363cbbfcde0c41a3166391be5 Mon Sep 17 00:00:00 2001

From: Miquel Raynal <[email protected]>
Date: Wed, 13 Sep 2017 18:21:38 +0200
Subject: spi: armada-3700: Fix failing commands with quad-SPI

From: Miquel Raynal <[email protected]>

commit 747e1f60470b975363cbbfcde0c41a3166391be5 upstream.

A3700 SPI controller datasheet states that only the first line (IO0) is used to receive and send instructions, addresses and dummy bytes, unless for addresses during an RX operation in a quad SPI configuration (see p.821 of the Armada-3720-DB datasheet). Otherwise, some commands such as SPI NOR commands like READ_FROM_CACHE_DUAL_IO(0xeb) and READ_FROM_CACHE_DUAL_IO(0xbb) will fail because these commands must send address bytes through the four pins. Data transfer always use the four bytes with this setup.

Thus, in quad SPI configuration, the A3700_SPI_ADDR_PIN bit must be set only in this case to inform the controller that it must use the number of pins indicated in the {A3700_SPI_DATA_PIN1,A3700_SPI_DATA_PIN0} field during the address cycles of an RX operation.

---
 drivers/spi/spi-armada-3700.c |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
drivers/spi/spi-armada-3700.c +5 -2
@@ -161,7 +161,7 @@ static void a3700_spi_deactivate_cs(stru
 }
 
 static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
-				  unsigned int pin_mode)
+				  unsigned int pin_mode, bool receiving)
 {
 	u32 val;
 
@@ -177,6 +177,9 @@ static int a3700_spi_pin_mode_set(struct
 		break;
 	case SPI_NBITS_QUAD:
 		val |= A3700_SPI_DATA_PIN1;
+		/* RX during address reception uses 4-pin */
+		if (receiving)
+			val |= A3700_SPI_ADDR_PIN;
 		break;
 	default:
 		dev_err(&a3700_spi->master->dev, "wrong pin mode %u", pin_mode);
@@ -654,7 +657,7 @@ static int a3700_spi_transfer_one(struct
 	else if (xfer->rx_buf)
 		nbits = xfer->rx_nbits;
 
-	a3700_spi_pin_mode_set(a3700_spi, nbits);
+	a3700_spi_pin_mode_set(a3700_spi, nbits, xfer->rx_buf ? true : false);
 
 	if (xfer->rx_buf) {
 		/* Set read data length */

Patches currently in stable-queue which might be from [email protected] are

queue-4.13/spi-armada-3700-fix-failing-commands-with-quad-spi.patch