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make stolen resource centric

PATCH In review Matthew Auld 6 participants 19 messages Nov 22, 2017 – Nov 24, 2017

Subsystems (6)
DRM drivers x86 Intel i915 PCI +2 more subsystems
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Matthew Auld

author
#0 lore raw

cover make stolen resource centric

Continuation of Paulo' stolen series[1], addressing the feedback from Joonas and Chris.

[1] https://patchwork.freedesktop.org/series/30923/

Matthew Auld (6):
drm/i915: export the stolen region as a resource drm/i915: s/mappable_end/mappable_size/ drm/i915: make dsm struct resource centric drm/i915: make reserved struct resource centric drm/i915: make mappable struct resource centric drm/i915: prefer resource_size_t for stolen sizes

 arch/x86/kernel/early-quirks.c                |   6 +
 drivers/char/agp/intel-gtt.c                  |  16 +--
 drivers/gpu/drm/i915/gvt/gvt.h                |   4 +-
 drivers/gpu/drm/i915/i915_debugfs.c           |   2 +-
 drivers/gpu/drm/i915/i915_drv.c               |   4 +-
 drivers/gpu/drm/i915/i915_drv.h               |   7 +-
 drivers/gpu/drm/i915/i915_gem.c               |  16 +--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |   4 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 103 +++++-----------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  12 +-
 drivers/gpu/drm/i915/i915_gem_stolen.c        | 162 +++++---------------------
 drivers/gpu/drm/i915/i915_gpu_error.c         |   2 +-
 drivers/gpu/drm/i915/i915_vgpu.c              |  12 +-
 drivers/gpu/drm/i915/i915_vma.c               |   6 +-
 drivers/gpu/drm/i915/intel_display.c          |   2 +-
 drivers/gpu/drm/i915/intel_fbc.c              |   4 +-
 drivers/gpu/drm/i915/intel_fbdev.c            |   2 +-
 drivers/gpu/drm/i915/intel_overlay.c          |   4 +-
 drivers/gpu/drm/i915/intel_pm.c               |  14 +--
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |   6 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c     |  22 ++--
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |   5 +-
 include/drm/i915_drm.h                        |   3 +
 include/drm/intel-gtt.h                       |   4 +-
 24 files changed, 143 insertions(+), 279 deletions(-)
Signature · 6 lines
2.14.3

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author
#1 lore raw

PATCH 1/6 drm/i915: export the stolen region as a resource

We duplicate the stolen discovery code in early-quirks and in i915, however if we just export the region as a resource from early-quirks we can nuke the duplication.

Suggested-by Joonas Lahtinen <[email protected]>
Suggested-by Chris Wilson <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
Cc [email protected]
---
 arch/x86/kernel/early-quirks.c         |   6 ++
 drivers/gpu/drm/i915/i915_gem_gtt.c    |  51 +--------------
 drivers/gpu/drm/i915/i915_gem_stolen.c | 109 +--------------------------------
 include/drm/i915_drm.h                 |   3 +
 4 files changed, 13 insertions(+), 156 deletions(-)
arch/x86/kernel/early-quirks.c +6 -0
index 1e82f787c160..a98a51cd15a7 100644
@@ -531,6 +531,9 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
 	INTEL_CNL_IDS(&gen9_early_ops),
 };
 
+struct resource intel_graphics_stolen_res = DEFINE_RES_MEM(0, 0);
+EXPORT_SYMBOL(intel_graphics_stolen_res);
+
 static void __init
 intel_graphics_stolen(int num, int slot, int func,
 		      const struct intel_early_ops *early_ops)

@@ -548,6 +551,9 @@ intel_graphics_stolen(int num, int slot, int func,
 	printk(KERN_INFO "Reserving Intel graphics memory at %pa-%pa\n",
 	       &base, &end);
 
+	intel_graphics_stolen_res.start = base;
+	intel_graphics_stolen_res.end = end;
+
 	/* Mark this space as reserved */
 	e820__range_add(base, size, E820_TYPE_RESERVED);
 	e820__update_table(e820_table);
drivers/gpu/drm/i915/i915_gem_gtt.c +3 -48

74 lines not on this page · raw message

drivers/gpu/drm/i915/i915_gem_stolen.c +1 -108

123 lines not on this page · raw message

include/drm/i915_drm.h +3 -0
index 4e1b274e1164..c9e5a6621b95 100644
@@ -36,6 +36,9 @@ extern bool i915_gpu_lower(void);
 extern bool i915_gpu_busy(void);
 extern bool i915_gpu_turbo_disable(void);
 
+/* Exported from arch/x86/kernel/early-quirks.c */
+extern struct resource intel_graphics_stolen_res;
+
 /*
  * The Bridge device's PCI config space has information about the
  * fb aperture size and the amount of pre-reserved memory.
Signature · 6 lines
2.14.3

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Acked-by on v1 1/6
#2 lore raw

Re: [PATCH 1/6] drm/i915: export the stolen region as a resource

Quoted 14 lines · Matthew Auld

We duplicate the stolen discovery code in early-quirks and in i915, however if we just export the region as a resource from early-quirks we can nuke the duplication.

Suggested-by Joonas Lahtinen <[email protected]>
Suggested-by Chris Wilson <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
Cc [email protected]
Quoted 6 lines
---
 arch/x86/kernel/early-quirks.c         |   6 ++
 drivers/gpu/drm/i915/i915_gem_gtt.c    |  51 +--------------
 drivers/gpu/drm/i915/i915_gem_stolen.c | 109 +--------------------------------
 include/drm/i915_drm.h                 |   3 +
 4 files changed, 13 insertions(+), 156 deletions(-)

If it's truly identical:

Acked-by Ingo Molnar <[email protected]>

Thanks,

Ingo
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maintainer
#3 lore raw

Re: [PATCH 1/6] drm/i915: export the stolen region as a resource

+ Dave as a heads-up

Quoted 23 lines · Ingo Molnar
Quoted 14 lines · Matthew Auld

We duplicate the stolen discovery code in early-quirks and in i915, however if we just export the region as a resource from early-quirks we can nuke the duplication.

Suggested-by Joonas Lahtinen <[email protected]>
Suggested-by Chris Wilson <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
Cc [email protected]
Quoted 6 lines
---
 arch/x86/kernel/early-quirks.c         |   6 ++
 drivers/gpu/drm/i915/i915_gem_gtt.c    |  51 +--------------
 drivers/gpu/drm/i915/i915_gem_stolen.c | 109 +--------------------------------
 include/drm/i915_drm.h                 |   3 +
 4 files changed, 13 insertions(+), 156 deletions(-)
Quoted 3 lines

If it's truly identical:

Acked-by Ingo Molnar <[email protected]>

Are you fine with us merging this together with the rest of the series through the DRM tree once it's all reviewed?

That'd help not requiring so many backmerges.

Regards, Joonas

Signature · 7 lines
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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#4 lore raw

Re: [PATCH 1/6] drm/i915: export the stolen region as a resource

Quoted 26 lines · Joonas Lahtinen

+ Dave as a heads-up

Quoted 23 lines · Ingo Molnar
Quoted 20 lines · Matthew Auld

We duplicate the stolen discovery code in early-quirks and in i915, however if we just export the region as a resource from early-quirks we can nuke the duplication.

Suggested-by Joonas Lahtinen <[email protected]>
Suggested-by Chris Wilson <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
Cc [email protected]
---
 arch/x86/kernel/early-quirks.c         |   6 ++
 drivers/gpu/drm/i915/i915_gem_gtt.c    |  51 +--------------
 drivers/gpu/drm/i915/i915_gem_stolen.c | 109 +--------------------------------
 include/drm/i915_drm.h                 |   3 +
 4 files changed, 13 insertions(+), 156 deletions(-)
Quoted 8 lines
Quoted 3 lines

If it's truly identical:

Acked-by Ingo Molnar <[email protected]>

Are you fine with us merging this together with the rest of the series through the DRM tree once it's all reviewed?

That'd help not requiring so many backmerges.

Yes, sure, feel free - that's also where most of the relevant testing is done for the affected hardware.

Thanks,

Ingo
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maintainer
#5 lore raw

Re: [PATCH 1/6] drm/i915: export the stolen region as a resource

In reply to Matthew Auld

+ Ville to comment if the removed code loses some meaningful comments or not. I already went through the code doing consolidations, about a year ago, so I may be blind to it.

Quoted 14 lines · Matthew Auld

We duplicate the stolen discovery code in early-quirks and in i915, however if we just export the region as a resource from early-quirks we can nuke the duplication.

Suggested-by Joonas Lahtinen <[email protected]>
Suggested-by Chris Wilson <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
Cc [email protected]

<SNIP>

arch/x86/kernel/early-quirks.c intel_graphics_stolen(int num, int slot, int func, · line 555

Quoted 6 lines
arch/x86/kernel/early-quirks.c +2 -0
@@ -548,6 +551,9 @@ intel_graphics_stolen(int num, int slot, int func,
 	printk(KERN_INFO "Reserving Intel graphics memory at %pa-%pa\n",
 	       &base, &end);
 
+	intel_graphics_stolen_res.start = base;
+	intel_graphics_stolen_res.end = end;

You can take advantage of the newly establisted resource by using %pR in the printk.

I sent a patch to convert the function signatures to resource_size_t for a less painful future.

Maybe squash just the early quirks/header change portion of this patch to that patch, then we can iterate on the i915 changes on a reminder of the series on top of that.

Regards, Joonas

Signature · 7 lines
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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author
#6 lore raw

PATCH 2/6 drm/i915: s/mappable_end/mappable_size/

In reply to Matthew Auld

The name mappable_end seems to suggest the end of the mappable region, but is actually just the size, so make that obvious to the reader.

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/char/agp/intel-gtt.c                  |  4 ++--
 drivers/gpu/drm/i915/gvt/gvt.h                |  2 +-
 drivers/gpu/drm/i915/i915_debugfs.c           |  2 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem.c               |  8 +++----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 30 +++++++++++++--------------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  2 +-
 drivers/gpu/drm/i915/i915_vgpu.c              | 12 +++++------
 drivers/gpu/drm/i915/i915_vma.c               |  4 ++--
 drivers/gpu/drm/i915/intel_fbdev.c            |  2 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  2 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c     | 22 ++++++++++----------
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |  2 +-
 include/drm/intel-gtt.h                       |  2 +-
 15 files changed, 49 insertions(+), 49 deletions(-)
drivers/char/agp/intel-gtt.c +2 -2
index 9b6b6023193b..2a321ee2943a 100644
@@ -1424,12 +1424,12 @@ EXPORT_SYMBOL(intel_gmch_probe);
 void intel_gtt_get(u64 *gtt_total,
 		   u32 *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_end)
+		   u64 *mappable_size)
 {
 	*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;
 	*stolen_size = intel_private.stolen_size;
 	*mappable_base = intel_private.gma_bus_addr;
-	*mappable_end = intel_private.gtt_mappable_entries << PAGE_SHIFT;
+	*mappable_size = intel_private.gtt_mappable_entries << PAGE_SHIFT;
 }
 EXPORT_SYMBOL(intel_gtt_get);
drivers/gpu/drm/i915/gvt/gvt.h +1 -1
index 393066726993..028d00e61bad 100644
@@ -335,7 +335,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
 #define HOST_FENCE 4
 
 /* Aperture/GM space definitions for GVT device */
-#define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_end)
+#define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_size)
 #define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
 
 #define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.base.total)
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
index 28294470ae31..a05e2b92c02c 100644
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
 		   dpy_count, dpy_size);
 
 	seq_printf(m, "%llu [%llu] gtt total\n",
-		   ggtt->base.total, ggtt->mappable_end);
+		   ggtt->base.total, ggtt->mappable_size);
 	seq_printf(m, "Supported page sizes: %s\n",
 		   stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
 					buf, sizeof(buf)));
drivers/gpu/drm/i915/i915_drv.c +1 -1
index 0793a27e2b95..e1bb0c8822aa 100644
@@ -729,7 +729,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 		return -ENOMEM;
 
 	ap->ranges[0].base = ggtt->mappable_base;
-	ap->ranges[0].size = ggtt->mappable_end;
+	ap->ranges[0].size = ggtt->mappable_size;
 
 	primary =
 		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
drivers/gpu/drm/i915/i915_gem.c +4 -4
index 21ca680e9e63..c054f47f6690 100644
@@ -66,7 +66,7 @@ insert_mappable_node(struct i915_ggtt *ggtt,
 	memset(node, 0, sizeof(*node));
 	return drm_mm_insert_node_in_range(&ggtt->base.mm, node,
 					   size, 0, I915_COLOR_UNEVICTABLE,
-					   0, ggtt->mappable_end,
+					   0, ggtt->mappable_size,
 					   DRM_MM_INSERT_LOW);
 }
 

@@ -4158,7 +4158,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
 		 * the object in and out of the Global GTT and
 		 * waste a lot of cycles under the mutex.
 		 */
-		if (obj->base.size > dev_priv->ggtt.mappable_end)
+		if (obj->base.size > dev_priv->ggtt.mappable_size)
 			return ERR_PTR(-E2BIG);
 
 		/* If NONBLOCK is set the caller is optimistically

@@ -4177,7 +4177,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
 		 * we could try to minimise harm to others.
 		 */
 		if (flags & PIN_NONBLOCK &&
-		    obj->base.size > dev_priv->ggtt.mappable_end / 2)
+		    obj->base.size > dev_priv->ggtt.mappable_size / 2)
 			return ERR_PTR(-ENOSPC);
 	}
 

@@ -4191,7 +4191,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
 				return ERR_PTR(-ENOSPC);
 
 			if (flags & PIN_MAPPABLE &&
-			    vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+			    vma->fence_size > dev_priv->ggtt.mappable_size / 2)
 				return ERR_PTR(-ENOSPC);
 		}
drivers/gpu/drm/i915/i915_gem_execbuffer.c +1 -1
index 14d9e61a1e06..8224abbb0f2d 100644
@@ -986,7 +986,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
 			err = drm_mm_insert_node_in_range
 				(&ggtt->base.mm, &cache->node,
 				 PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
-				 0, ggtt->mappable_end,
+				 0, ggtt->mappable_size,
 				 DRM_MM_INSERT_LOW);
 			if (err) /* no inactive aperture space, use cpu reloc */
 				return NULL;
drivers/gpu/drm/i915/i915_gem_gtt.c +15 -15
index cccd0cb51e09..e47299fbdbc7 100644
@@ -2001,7 +2001,7 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
 	if (ret)
 		goto err_out;
 
-	if (ppgtt->node.start < ggtt->mappable_end)
+	if (ppgtt->node.start < ggtt->mappable_size)
 		DRM_DEBUG("Forced to use aperture for PDEs\n");
 
 	ppgtt->pd.base.ggtt_offset =

@@ -2840,7 +2840,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
 	/* Reserve a mappable slot for our lockless error capture */
 	ret = drm_mm_insert_node_in_range(&ggtt->base.mm, &ggtt->error_capture,
 					  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
-					  0, ggtt->mappable_end,
+					  0, ggtt->mappable_size,
 					  DRM_MM_INSERT_LOW);
 	if (ret)
 		return ret;

@@ -3289,7 +3289,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
 	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_end = pci_resource_len(pdev, 2);
+	ggtt->mappable_size = pci_resource_len(pdev, 2);
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)

@@ -3346,13 +3346,13 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_end = pci_resource_len(pdev, 2);
+	ggtt->mappable_size = pci_resource_len(pdev, 2);
 
 	/* 64/512MB is the current min/max we actually know of, but this is just
 	 * a coarse sanity check.
 	 */
-	if (ggtt->mappable_end < (64<<20) || ggtt->mappable_end > (512<<20)) {
-		DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_end);
+	if (ggtt->mappable_size < (64<<20) || ggtt->mappable_size > (512<<20)) {
+		DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_size);
 		return -ENXIO;
 	}
 

@@ -3412,7 +3412,7 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
 	intel_gtt_get(&ggtt->base.total,
 		      &ggtt->stolen_size,
 		      &ggtt->mappable_base,
-		      &ggtt->mappable_end);
+		      &ggtt->mappable_size);
 
 	ggtt->do_idle_maps = needs_idle_maps(dev_priv);
 	ggtt->base.insert_page = i915_ggtt_insert_page;

@@ -3460,7 +3460,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	 */
 	if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) {
 		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
-		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
+		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
 	}
 
 	if ((ggtt->base.total - 1) >> 32) {

@@ -3468,20 +3468,20 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 			  " of address space! Found %lldM!\n",
 			  ggtt->base.total >> 20);
 		ggtt->base.total = 1ULL << 32;
-		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
+		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
 	}
 
-	if (ggtt->mappable_end > ggtt->base.total) {
+	if (ggtt->mappable_size > ggtt->base.total) {
 		DRM_ERROR("mappable aperture extends past end of GGTT,"
 			  " aperture=%llx, total=%llx\n",
-			  ggtt->mappable_end, ggtt->base.total);
-		ggtt->mappable_end = ggtt->base.total;
+			  ggtt->mappable_size, ggtt->base.total);
+		ggtt->mappable_size = ggtt->base.total;
 	}
 
 	/* GMADR is the PCI mmio aperture into the global GTT. */
 	DRM_INFO("Memory usable by graphics device = %lluM\n",
 		 ggtt->base.total >> 20);
-	DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_end >> 20);
+	DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_size >> 20);
 	DRM_DEBUG_DRIVER("GTT stolen size = %uM\n", ggtt->stolen_size >> 20);
 	if (intel_vtd_active())
 		DRM_INFO("VT-d active for gfx access\n");

@@ -3513,12 +3513,12 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
 
 	if (!io_mapping_init_wc(&dev_priv->ggtt.mappable,
 				dev_priv->ggtt.mappable_base,
-				dev_priv->ggtt.mappable_end)) {
+				dev_priv->ggtt.mappable_size)) {
 		ret = -EIO;
 		goto out_gtt_cleanup;
 	}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base, ggtt->mappable_end);
+	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base, ggtt->mappable_size);
 
 	/*
 	 * Initialise stolen early so that we may reserve preallocated
drivers/gpu/drm/i915/i915_gem_gtt.h +1 -1
index 93211a96fdad..922d796983d5 100644
@@ -371,7 +371,7 @@ struct i915_ggtt {
 	struct io_mapping mappable;	/* Mapping to our CPU mappable region */
 
 	phys_addr_t mappable_base;	/* PA of our GMADR */
-	u64 mappable_end;		/* End offset that we can CPU map */
+	u64 mappable_size;		/* Total mappable size that we can CPU map */
 
 	/* Stolen memory is segmented in hardware with different portions
 	 * offlimits to certain functions.
drivers/gpu/drm/i915/i915_vgpu.c +6 -6
index 5fe9f3f39467..d1add5c4e312 100644
@@ -220,17 +220,17 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)
 	DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
 		 unmappable_base, unmappable_size / 1024);
 
-	if (mappable_end > ggtt->mappable_end ||
-	    unmappable_base < ggtt->mappable_end ||
+	if (mappable_end > ggtt->mappable_size ||
+	    unmappable_base < ggtt->mappable_size ||
 	    unmappable_end > ggtt_end) {
 		DRM_ERROR("Invalid ballooning configuration!\n");
 		return -EINVAL;
 	}
 
 	/* Unmappable graphic memory ballooning */
-	if (unmappable_base > ggtt->mappable_end) {
+	if (unmappable_base > ggtt->mappable_size) {
 		ret = vgt_balloon_space(ggtt, &bl_info.space[2],
-					ggtt->mappable_end, unmappable_base);
+					ggtt->mappable_size, unmappable_base);
 
 		if (ret)
 			goto err;

@@ -252,9 +252,9 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)
 			goto err_upon_unmappable;
 	}
 
-	if (mappable_end < ggtt->mappable_end) {
+	if (mappable_end < ggtt->mappable_size) {
 		ret = vgt_balloon_space(ggtt, &bl_info.space[1],
-					mappable_end, ggtt->mappable_end);
+					mappable_end, ggtt->mappable_size);
 
 		if (ret)
 			goto err_below_mappable;
drivers/gpu/drm/i915/i915_vma.c +2 -2
index bf6d8d1eaabe..a9413b601230 100644
@@ -401,7 +401,7 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
 	fenceable = (vma->node.size >= vma->fence_size &&
 		     IS_ALIGNED(vma->node.start, vma->fence_alignment));
 
-	mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end;
+	mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_size;
 
 	if (mappable && fenceable)
 		vma->flags |= I915_VMA_CAN_FENCE;

@@ -486,7 +486,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 
 	end = vma->vm->total;
 	if (flags & PIN_MAPPABLE)
-		end = min_t(u64, end, dev_priv->ggtt.mappable_end);
+		end = min_t(u64, end, dev_priv->ggtt.mappable_size);
 	if (flags & PIN_ZONE_4G)
 		end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
 	GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
drivers/gpu/drm/i915/intel_fbdev.c +1 -1
index b8af35187d22..e56262d1bc87 100644
@@ -237,7 +237,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
 
 	/* setup aperture base/size for vesafb takeover */
 	info->apertures->ranges[0].base = dev->mode_config.fb_base;
-	info->apertures->ranges[0].size = ggtt->mappable_end;
+	info->apertures->ranges[0].size = ggtt->mappable_size;
 
 	info->fix.smem_start = dev->mode_config.fb_base + i915_ggtt_offset(vma);
 	info->fix.smem_len = vma->node.size;
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +1 -1
index 6491cf0a4f46..e97ae4b4a684 100644
@@ -1054,7 +1054,7 @@ static int igt_ggtt_page(void *arg)
 	err = drm_mm_insert_node_in_range(&ggtt->base.mm, &tmp,
 					  1024 * PAGE_SIZE, 0,
 					  I915_COLOR_UNEVICTABLE,
-					  0, ggtt->mappable_end,
+					  0, ggtt->mappable_size,
 					  DRM_MM_INSERT_LOW);
 	if (err)
 		goto out_unpin;
drivers/gpu/drm/i915/selftests/i915_vma.c +11 -11
index eb89e301b602..f2e15bc1b82a 100644
@@ -257,30 +257,30 @@ static int igt_vma_pin1(void *arg)
 
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 4096),
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 8192),
-		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
-		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
+		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
+		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
 
-		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
-		INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | i915->ggtt.mappable_end),
+		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_size - 4096)),
+		INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | i915->ggtt.mappable_size),
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
 		INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | i915->ggtt.base.total),
 		INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | round_down(U64_MAX, PAGE_SIZE)),
 
 		VALID(4096, PIN_GLOBAL),
 		VALID(8192, PIN_GLOBAL),
-		VALID(i915->ggtt.mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE),
-		VALID(i915->ggtt.mappable_end, PIN_GLOBAL | PIN_MAPPABLE),
-		NOSPACE(i915->ggtt.mappable_end + 4096, PIN_GLOBAL | PIN_MAPPABLE),
+		VALID(i915->ggtt.mappable_size - 4096, PIN_GLOBAL | PIN_MAPPABLE),
+		VALID(i915->ggtt.mappable_size, PIN_GLOBAL | PIN_MAPPABLE),
+		NOSPACE(i915->ggtt.mappable_size + 4096, PIN_GLOBAL | PIN_MAPPABLE),
 		VALID(i915->ggtt.base.total - 4096, PIN_GLOBAL),
 		VALID(i915->ggtt.base.total, PIN_GLOBAL),
 		NOSPACE(i915->ggtt.base.total + 4096, PIN_GLOBAL),
 		NOSPACE(round_down(U64_MAX, PAGE_SIZE), PIN_GLOBAL),
-		INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
+		INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_size - 4096)),
 		INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
 		INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (round_down(U64_MAX, PAGE_SIZE) - 4096)),
 
-		VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
+		VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
 
 #if !IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
 		/* Misusing BIAS is a programming error (it is not controllable

@@ -288,9 +288,9 @@ static int igt_vma_pin1(void *arg)
 		 * However, the tests are still quite interesting for checking
 		 * variable start, end and size.
 		 */
-		NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | i915->ggtt.mappable_end),
+		NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | i915->ggtt.mappable_size),
 		NOSPACE(0, PIN_GLOBAL | PIN_OFFSET_BIAS | i915->ggtt.base.total),
-		NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
+		NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
 		NOSPACE(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
 #endif
 		{ },
drivers/gpu/drm/i915/selftests/mock_gtt.c +1 -1
index 336e1afb250f..d3155f36de89 100644
@@ -111,7 +111,7 @@ void mock_init_ggtt(struct drm_i915_private *i915)
 	ggtt->base.i915 = i915;
 
 	ggtt->mappable_base = 0;
-	ggtt->mappable_end = 2048 * PAGE_SIZE;
+	ggtt->mappable_size = 2048 * PAGE_SIZE;
 	ggtt->base.total = 4096 * PAGE_SIZE;
 
 	ggtt->base.clear_range = nop_clear_range;
include/drm/intel-gtt.h +1 -1
index c5db7975c640..e901de0b6dd8 100644
@@ -7,7 +7,7 @@
 void intel_gtt_get(u64 *gtt_total,
 		   u32 *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_end);
+		   u64 *mappable_size);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 		     struct agp_bridge_data *bridge);
Signature · 6 lines
2.14.3

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#7 lore raw

Re: [PATCH 2/6] drm/i915: s/mappable_end/mappable_size/

Quoting Matthew Auld (2017-11-22 21:19:16)

Quoted 1 line

The name mappable_end seems to suggest the end of the mappable region,

This seems to be arguing for using _end :)

Quoted 1 line

but is actually just the size, so make that obvious to the reader.

We didn't choose size because it is a subregion within the larger GTT.

At this point, I'm not sold on the conversion. Some examples of confusion would help, or comparison to other idioms in the code. -Chris
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#8 lore raw

Re: [PATCH 2/6] drm/i915: s/mappable_end/mappable_size/

Quoted 11 lines · Chris Wilson

Quoting Matthew Auld (2017-11-22 21:19:16)

Quoted 1 line

The name mappable_end seems to suggest the end of the mappable region,

This seems to be arguing for using _end :)

Quoted 1 line

but is actually just the size, so make that obvious to the reader.

We didn't choose size because it is a subregion within the larger GTT.

At this point, I'm not sold on the conversion. Some examples of confusion would help, or comparison to other idioms in the code.

Assuming we move forward with 'struct resource mappable', we would now have both:

mappable.end
mappable_end

Where mappable.end is the end of the resource, and mappable_end is the size of the resource, which I found to be more than a little confusing.

Quoted 5 lines

-Chris
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author
#9 lore raw

PATCH 3/6 drm/i915: make dsm struct resource centric

In reply to Matthew Auld
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/i915_drv.h        |  5 ++---
 drivers/gpu/drm/i915/i915_gem_stolen.c | 19 +++++++++++--------
 drivers/gpu/drm/i915/intel_fbc.c       |  4 ++--
 drivers/gpu/drm/i915/intel_pm.c        |  8 ++++----
 4 files changed, 19 insertions(+), 17 deletions(-)
drivers/gpu/drm/i915/i915_drv.h +2 -3
index d575a56fc100..6136f92d5188 100644
@@ -1536,9 +1536,6 @@ struct i915_gem_mm {
 	 */
 	struct pagevec wc_stash;
 
-	/** Usable portion of the GTT for GEM */
-	dma_addr_t stolen_base; /* limited to low memory (32-bit) */
-
 	/**
 	 * tmpfs instance used for shmem backed objects
 	 */

@@ -2252,6 +2249,8 @@ struct drm_i915_private {
 
 	const struct intel_device_info info;
 
+	struct resource dsm;
+
 	void __iomem *regs;
 
 	struct intel_uncore uncore;
drivers/gpu/drm/i915/i915_gem_stolen.c +11 -8
index f1b8eeda0058..36c8ec04fd7a 100644
@@ -185,7 +185,7 @@ static void g4x_get_stolen_reserved(struct drm_i915_private *dev_priv,
 	uint32_t reg_val = I915_READ(IS_GM45(dev_priv) ?
 				     CTG_STOLEN_RESERVED :
 				     ELK_STOLEN_RESERVED);
-	dma_addr_t stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+	dma_addr_t stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
 
 	if ((reg_val & G4X_STOLEN_RESERVED_ENABLE) == 0) {
 		*base = 0;

@@ -316,7 +316,7 @@ static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
 		return;
 	}
 
-	stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+	stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
 
 	*base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
 

@@ -352,11 +352,14 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 	if (ggtt->stolen_size == 0)
 		return 0;
 
-	dev_priv->mm.stolen_base = i915_stolen_to_dma(dev_priv);
-	if (dev_priv->mm.stolen_base == 0)
+	dev_priv->dsm.start = i915_stolen_to_dma(dev_priv);
+	if (dev_priv->dsm.start == 0)
 		return 0;
 
-	stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+	dev_priv->dsm.end = dev_priv->dsm.start + ggtt->stolen_size - 1;
+	dev_priv->dsm.flags = IORESOURCE_MEM;
+
+	stolen_top = dev_priv->dsm.end + 1;
 	reserved_base = 0;
 	reserved_size = 0;
 

@@ -397,12 +400,12 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 		reserved_base = stolen_top;
 	}
 
-	if (reserved_base < dev_priv->mm.stolen_base ||
+	if (reserved_base < dev_priv->dsm.start ||
 	    reserved_base + reserved_size > stolen_top) {
 		dma_addr_t reserved_top = reserved_base + reserved_size;
 		DRM_ERROR("Stolen reserved area [%pad - %pad] outside stolen memory [%pad - %pad]\n",
 			  &reserved_base, &reserved_top,
-			  &dev_priv->mm.stolen_base, &stolen_top);
+			  &dev_priv->dsm.start, &stolen_top);
 		return 0;
 	}
 

@@ -460,7 +463,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
 	sg->offset = 0;
 	sg->length = size;
 
-	sg_dma_address(sg) = (dma_addr_t)dev_priv->mm.stolen_base + offset;
+	sg_dma_address(sg) = (dma_addr_t)dev_priv->dsm.start + offset;
 	sg_dma_len(sg) = size;
 
 	return st;
drivers/gpu/drm/i915/intel_fbc.c +2 -2
index 4aefc658a5cf..374cfe8a33ad 100644
@@ -616,9 +616,9 @@ static int intel_fbc_alloc_cfb(struct intel_crtc *crtc)
 		fbc->compressed_llb = compressed_llb;
 
 		I915_WRITE(FBC_CFB_BASE,
-			   dev_priv->mm.stolen_base + fbc->compressed_fb.start);
+			   dev_priv->dsm.start + fbc->compressed_fb.start);
 		I915_WRITE(FBC_LL_BASE,
-			   dev_priv->mm.stolen_base + compressed_llb->start);
+			   dev_priv->dsm.start + compressed_llb->start);
 	}
 
 	DRM_DEBUG_KMS("reserved %llu bytes of contiguous stolen space for FBC, threshold: %d\n",
drivers/gpu/drm/i915/intel_pm.c +4 -4
index 7d41aad79166..4a326bbdac6c 100644
@@ -7070,7 +7070,7 @@ static void valleyview_check_pctx(struct drm_i915_private *dev_priv)
 {
 	unsigned long pctx_addr = I915_READ(VLV_PCBR) & ~4095;
 
-	WARN_ON(pctx_addr != dev_priv->mm.stolen_base +
+	WARN_ON(pctx_addr != dev_priv->dsm.start +
 			     dev_priv->vlv_pctx->stolen->start);
 }
 

@@ -7093,7 +7093,7 @@ static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
 	pcbr = I915_READ(VLV_PCBR);
 	if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {
 		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
-		paddr = (dev_priv->mm.stolen_base +
+		paddr = (dev_priv->dsm.start +
 			 (ggtt->stolen_size - pctx_size));
 
 		pctx_paddr = (paddr & (~4095));

@@ -7115,7 +7115,7 @@ static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
 		/* BIOS set it up already, grab the pre-alloc'd space */
 		int pcbr_offset;
 
-		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
+		pcbr_offset = (pcbr & (~4095)) - dev_priv->dsm.start;
 		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv,
 								      pcbr_offset,
 								      I915_GTT_OFFSET_NONE,

@@ -7139,7 +7139,7 @@ static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
 		goto out;
 	}
 
-	pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start;
+	pctx_paddr = dev_priv->dsm.start + pctx->stolen->start;
 	I915_WRITE(VLV_PCBR, pctx_paddr);
 
 out:
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#10 lore raw

Re: [PATCH 3/6] drm/i915: make dsm struct resource centric

Quoting Matthew Auld (2017-11-22 21:19:17)

Quoted 26 lines
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/i915_drv.h        |  5 ++---
 drivers/gpu/drm/i915/i915_gem_stolen.c | 19 +++++++++++--------
 drivers/gpu/drm/i915/intel_fbc.c       |  4 ++--
 drivers/gpu/drm/i915/intel_pm.c        |  8 ++++----
 4 files changed, 19 insertions(+), 17 deletions(-)
drivers/gpu/drm/i915/i915_drv.h +0 -3
index d575a56fc100..6136f92d5188 100644
@@ -1536,9 +1536,6 @@ struct i915_gem_mm {
         */
        struct pagevec wc_stash;
 
-       /** Usable portion of the GTT for GEM */
-       dma_addr_t stolen_base; /* limited to low memory (32-bit) */
-
        /**
         * tmpfs instance used for shmem backed objects
         */

drivers/gpu/drm/i915/i915_drv.h struct drm_i915_private { · line 2253

Quoted 5 lines
drivers/gpu/drm/i915/i915_drv.h +2 -0
@@ -2252,6 +2249,8 @@ struct drm_i915_private {
 
        const struct intel_device_info info;
 
+       struct resource dsm;
+

Next patch, keep the dsm grouped. Don't forget some comment here, if at least to expand the acronym and explanation of where it comes from and what purpose we could use it for, trying to keep it reasonably general.

drivers/gpu/drm/i915/i915_gem_stolen.c static void g4x_get_stolen_reserved(struct drm_i915_private *dev_priv, · line 188

Quoted 13 lines
drivers/gpu/drm/i915/i915_drv.h +0 -0
        void __iomem *regs;
 
        struct intel_uncore uncore;
drivers/gpu/drm/i915/i915_gem_stolen.c +1 -1
index f1b8eeda0058..36c8ec04fd7a 100644
@@ -185,7 +185,7 @@ static void g4x_get_stolen_reserved(struct drm_i915_private *dev_priv,
        uint32_t reg_val = I915_READ(IS_GM45(dev_priv) ?
                                     CTG_STOLEN_RESERVED :
                                     ELK_STOLEN_RESERVED);
-       dma_addr_t stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+       dma_addr_t stolen_top = dev_priv->dsm.start + ggtt->stolen_size;

Did you update stolen_top to resource_size_t ?

Quoted 59 lines
drivers/gpu/drm/i915/i915_gem_stolen.c +10 -7
        if ((reg_val & G4X_STOLEN_RESERVED_ENABLE) == 0) {
                *base = 0;

@@ -316,7 +316,7 @@ static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
                return;
        }
 
-       stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+       stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
 
        *base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
 

@@ -352,11 +352,14 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
        if (ggtt->stolen_size == 0)
                return 0;
 
-       dev_priv->mm.stolen_base = i915_stolen_to_dma(dev_priv);
-       if (dev_priv->mm.stolen_base == 0)
+       dev_priv->dsm.start = i915_stolen_to_dma(dev_priv);
+       if (dev_priv->dsm.start == 0)
                return 0;
 
-       stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+       dev_priv->dsm.end = dev_priv->dsm.start + ggtt->stolen_size - 1;
+       dev_priv->dsm.flags = IORESOURCE_MEM;
+
+       stolen_top = dev_priv->dsm.end + 1;
        reserved_base = 0;
        reserved_size = 0;
 

@@ -397,12 +400,12 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
                reserved_base = stolen_top;
        }
 
-       if (reserved_base < dev_priv->mm.stolen_base ||
+       if (reserved_base < dev_priv->dsm.start ||
            reserved_base + reserved_size > stolen_top) {
                dma_addr_t reserved_top = reserved_base + reserved_size;
                DRM_ERROR("Stolen reserved area [%pad - %pad] outside stolen memory [%pad - %pad]\n",
                          &reserved_base, &reserved_top,
-                         &dev_priv->mm.stolen_base, &stolen_top);
+                         &dev_priv->dsm.start, &stolen_top);
                return 0;
        }
 

@@ -460,7 +463,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
        sg->offset = 0;
        sg->length = size;
 
-       sg_dma_address(sg) = (dma_addr_t)dev_priv->mm.stolen_base + offset;
+       sg_dma_address(sg) = (dma_addr_t)dev_priv->dsm.start + offset;
        sg_dma_len(sg) = size;
 
        return st;
drivers/gpu/drm/i915/intel_fbc.c +0 -0
index 4aefc658a5cf..374cfe8a33ad 100644

drivers/gpu/drm/i915/intel_fbc.c static int intel_fbc_alloc_cfb(struct intel_crtc *crtc) · line 621

Quoted 8 lines
drivers/gpu/drm/i915/intel_fbc.c +2 -2
@@ -616,9 +616,9 @@ static int intel_fbc_alloc_cfb(struct intel_crtc *crtc)
                fbc->compressed_llb = compressed_llb;
 
                I915_WRITE(FBC_CFB_BASE,
-                          dev_priv->mm.stolen_base + fbc->compressed_fb.start);
+                          dev_priv->dsm.start + fbc->compressed_fb.start);
                I915_WRITE(FBC_LL_BASE,
-                          dev_priv->mm.stolen_base + compressed_llb->start);
+                          dev_priv->dsm.start + compressed_llb->start);

Around here we need

GEM_BUG_ON(range_overflow(dev_priv->dsm.start, blah->start, U32_MAX));

Similarly for all the write into 32bit registers.

Quoted 26 lines
drivers/gpu/drm/i915/intel_fbc.c +0 -0
        }
 
        DRM_DEBUG_KMS("reserved %llu bytes of contiguous stolen space for FBC, threshold: %d\n",
drivers/gpu/drm/i915/intel_pm.c +2 -2
index 7d41aad79166..4a326bbdac6c 100644
@@ -7070,7 +7070,7 @@ static void valleyview_check_pctx(struct drm_i915_private *dev_priv)
 {
        unsigned long pctx_addr = I915_READ(VLV_PCBR) & ~4095;
 
-       WARN_ON(pctx_addr != dev_priv->mm.stolen_base +
+       WARN_ON(pctx_addr != dev_priv->dsm.start +
                             dev_priv->vlv_pctx->stolen->start);
 }
 

@@ -7093,7 +7093,7 @@ static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
        pcbr = I915_READ(VLV_PCBR);
        if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {
                DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
-               paddr = (dev_priv->mm.stolen_base +
+               paddr = (dev_priv->dsm.start +
                         (ggtt->stolen_size - pctx_size));
 
                pctx_paddr = (paddr & (~4095));

drivers/gpu/drm/i915/intel_pm.c static void valleyview_setup_pctx(struct drm_i915_private *dev_priv) · line 7120

Quoted 7 lines
drivers/gpu/drm/i915/intel_pm.c +1 -1
@@ -7115,7 +7115,7 @@ static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
                /* BIOS set it up already, grab the pre-alloc'd space */
                int pcbr_offset;
 
-               pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
+               pcbr_offset = (pcbr & (~4095)) - dev_priv->dsm.start;
                pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv,
                                                                      pcbr_offset,

These stolen interfaces should also be updated to take resource_size_t. -Chris
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

author
#11 lore raw

PATCH 4/6 drm/i915: make reserved struct resource centric

In reply to Matthew Auld
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/i915_drv.h        |  2 ++
 drivers/gpu/drm/i915/i915_gem_gtt.h    |  2 --
 drivers/gpu/drm/i915/i915_gem_stolen.c | 16 ++++++++--------
 drivers/gpu/drm/i915/intel_pm.c        |  6 ++----
 4 files changed, 12 insertions(+), 14 deletions(-)
drivers/gpu/drm/i915/i915_drv.h +2 -0
index 6136f92d5188..fb987e8ffe23 100644
@@ -2251,6 +2251,8 @@ struct drm_i915_private {
 
 	struct resource dsm;
 
+	struct resource dsm_reserved;
+
 	void __iomem *regs;
 
 	struct intel_uncore uncore;
drivers/gpu/drm/i915/i915_gem_gtt.h +0 -2
index 922d796983d5..6eb34fd2c4ba 100644
@@ -383,8 +383,6 @@ struct i915_ggtt {
 	 */
 	u32 stolen_size;		/* Total size of stolen memory */
 	u32 stolen_usable_size;	/* Total size minus reserved ranges */
-	u32 stolen_reserved_base;
-	u32 stolen_reserved_size;
 
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
drivers/gpu/drm/i915/i915_gem_stolen.c +8 -8
index 36c8ec04fd7a..2b7af60dfce0 100644
@@ -333,6 +333,7 @@ static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
 int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 {
 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
+	struct resource reserved = DEFINE_RES_MEM(0, 0);
 	dma_addr_t reserved_base, stolen_top;
 	u32 reserved_total, reserved_size;
 	u32 stolen_usable_start;

@@ -400,17 +401,16 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 		reserved_base = stolen_top;
 	}
 
-	if (reserved_base < dev_priv->dsm.start ||
-	    reserved_base + reserved_size > stolen_top) {
-		dma_addr_t reserved_top = reserved_base + reserved_size;
-		DRM_ERROR("Stolen reserved area [%pad - %pad] outside stolen memory [%pad - %pad]\n",
-			  &reserved_base, &reserved_top,
-			  &dev_priv->dsm.start, &stolen_top);
+	reserved.start = reserved_base;
+	reserved.end = reserved_base + reserved_size - 1;
+
+	if (!resource_contains(&dev_priv->dsm, &reserved)) {
+		DRM_ERROR("Stolen reserved area %pR outside stolen memory %pR\n",
+			  &reserved, &dev_priv->dsm);
 		return 0;
 	}
 
-	ggtt->stolen_reserved_base = reserved_base;
-	ggtt->stolen_reserved_size = reserved_size;
+	dev_priv->dsm_reserved = reserved;
 
 	/* It is possible for the reserved area to end before the end of stolen
 	 * memory, so just consider the start. */
drivers/gpu/drm/i915/intel_pm.c +2 -4
index 4a326bbdac6c..bebe355d1660 100644
@@ -6439,7 +6439,6 @@ static void intel_print_rc6_info(struct drm_i915_private *dev_priv, u32 mode)
 
 static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
 {
-	struct i915_ggtt *ggtt = &dev_priv->ggtt;
 	bool enable_rc6 = true;
 	unsigned long rc6_ctx_base;
 	u32 rc_ctl;

@@ -6464,9 +6463,8 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
 	 * for this check.
 	 */
 	rc6_ctx_base = I915_READ(RC6_CTX_BASE) & RC6_CTX_BASE_MASK;
-	if (!((rc6_ctx_base >= ggtt->stolen_reserved_base) &&
-	      (rc6_ctx_base + PAGE_SIZE <= ggtt->stolen_reserved_base +
-					ggtt->stolen_reserved_size))) {
+	if (!((rc6_ctx_base >= dev_priv->dsm_reserved.start) &&
+	      (rc6_ctx_base + PAGE_SIZE <= dev_priv->dsm_reserved.end + 1))) {
 		DRM_DEBUG_DRIVER("RC6 Base address not as expected.\n");
 		enable_rc6 = false;
 	}
Signature · 6 lines
2.14.3

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
#12 lore raw

Re: [PATCH 4/6] drm/i915: make reserved struct resource centric

Quoting Matthew Auld (2017-11-22 21:19:18)

Quoted 6 lines
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>

---

drivers/gpu/drm/i915/intel_pm.c static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv) · line 6467

Quoted 8 lines
drivers/gpu/drm/i915/intel_pm.c +2 -3
@@ -6464,9 +6463,8 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
         * for this check.
         */
        rc6_ctx_base = I915_READ(RC6_CTX_BASE) & RC6_CTX_BASE_MASK;
-       if (!((rc6_ctx_base >= ggtt->stolen_reserved_base) &&
-             (rc6_ctx_base + PAGE_SIZE <= ggtt->stolen_reserved_base +
-                                       ggtt->stolen_reserved_size))) {
+       if (!((rc6_ctx_base >= dev_priv->dsm_reserved.start) &&
+             (rc6_ctx_base + PAGE_SIZE <= dev_priv->dsm_reserved.end + 1))) {

s/<= end + 1/< end/
-Chris
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

author
#13 lore raw

PATCH 5/6 drm/i915: make mappable struct resource centric

In reply to Matthew Auld
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/gvt/gvt.h                |  2 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem.c               |  8 ++++----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 28 ++++++++++++++++-----------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  4 ++--
 drivers/gpu/drm/i915/i915_gpu_error.c         |  2 +-
 drivers/gpu/drm/i915/i915_vma.c               |  2 +-
 drivers/gpu/drm/i915/intel_display.c          |  2 +-
 drivers/gpu/drm/i915/intel_overlay.c          |  4 ++--
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  4 ++--
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |  3 ++-
 12 files changed, 35 insertions(+), 28 deletions(-)
drivers/gpu/drm/i915/gvt/gvt.h +1 -1
index 028d00e61bad..601e5fee8957 100644
@@ -336,7 +336,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
 
 /* Aperture/GM space definitions for GVT device */
 #define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_size)
-#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
+#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable.start)
 
 #define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.base.total)
 #define gvt_ggtt_sz(gvt) \
drivers/gpu/drm/i915/i915_drv.c +1 -1
index e1bb0c8822aa..be29895a56f6 100644
@@ -728,7 +728,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 	if (!ap)
 		return -ENOMEM;
 
-	ap->ranges[0].base = ggtt->mappable_base;
+	ap->ranges[0].base = ggtt->mappable.start;
 	ap->ranges[0].size = ggtt->mappable_size;
 
 	primary =
drivers/gpu/drm/i915/i915_gem.c +4 -4
index c054f47f6690..49a2c867d910 100644
@@ -1106,7 +1106,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
 			page_base += offset & PAGE_MASK;
 		}
 
-		if (gtt_user_read(&ggtt->mappable, page_base, page_offset,
+		if (gtt_user_read(&ggtt->mappable_io, page_base, page_offset,
 				  user_data, page_length)) {
 			ret = -EFAULT;
 			break;

@@ -1314,7 +1314,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
 		 * If the object is non-shmem backed, we retry again with the
 		 * path that handles page fault.
 		 */
-		if (ggtt_write(&ggtt->mappable, page_base, page_offset,
+		if (ggtt_write(&ggtt->mappable_io, page_base, page_offset,
 			       user_data, page_length)) {
 			ret = -EFAULT;
 			break;

@@ -1960,9 +1960,9 @@ int i915_gem_fault(struct vm_fault *vmf)
 	/* Finally, remap it using the new GTT offset */
 	ret = remap_io_mapping(area,
 			       area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT),
-			       (ggtt->mappable_base + vma->node.start) >> PAGE_SHIFT,
+			       (ggtt->mappable.start + vma->node.start) >> PAGE_SHIFT,
 			       min_t(u64, vma->size, area->vm_end - area->vm_start),
-			       &ggtt->mappable);
+			       &ggtt->mappable_io);
 	if (ret)
 		goto err_fence;
drivers/gpu/drm/i915/i915_gem_execbuffer.c +1 -1
index 8224abbb0f2d..da4db769e1e2 100644
@@ -1012,7 +1012,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
 		offset += page << PAGE_SHIFT;
 	}
 
-	vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable,
+	vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable_io,
 							 offset);
 	cache->page = page;
 	cache->vaddr = (unsigned long)vaddr;
drivers/gpu/drm/i915/i915_gem_gtt.c +17 -11
index e47299fbdbc7..8313b3f494ec 100644
@@ -2912,7 +2912,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
 	arch_phys_wc_del(ggtt->mtrr);
-	io_mapping_fini(&ggtt->mappable);
+	io_mapping_fini(&ggtt->mappable_io);
 }
 
 static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)

@@ -3288,8 +3288,9 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
-	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_size = pci_resource_len(pdev, 2);
+	ggtt->mappable.start = pci_resource_start(pdev, 2);
+	ggtt->mappable.end = ggtt->mappable.start + pci_resource_len(pdev, 2) - 1;
+	ggtt->mappable_size = resource_size(&ggtt->mappable);
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)

@@ -3345,8 +3346,9 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 	u16 snb_gmch_ctl;
 	int err;
 
-	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_size = pci_resource_len(pdev, 2);
+	ggtt->mappable.start = pci_resource_start(pdev, 2);
+	ggtt->mappable.end = ggtt->mappable.start + pci_resource_len(pdev, 2) - 1;
+	ggtt->mappable_size = resource_size(&ggtt->mappable);
 
 	/* 64/512MB is the current min/max we actually know of, but this is just
 	 * a coarse sanity check.

@@ -3401,6 +3403,7 @@ static void i915_gmch_remove(struct i915_address_space *vm)
 static int i915_gmch_probe(struct i915_ggtt *ggtt)
 {
 	struct drm_i915_private *dev_priv = ggtt->base.i915;
+	phys_addr_t mappable_base;
 	int ret;
 
 	ret = intel_gmch_probe(dev_priv->bridge_dev, dev_priv->drm.pdev, NULL);

@@ -3411,9 +3414,12 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
 
 	intel_gtt_get(&ggtt->base.total,
 		      &ggtt->stolen_size,
-		      &ggtt->mappable_base,
+		      &mappable_base,
 		      &ggtt->mappable_size);
 
+	ggtt->mappable.start = mappable_base;
+	ggtt->mappable.end = ggtt->mappable.start + ggtt->mappable_size - 1;
+
 	ggtt->do_idle_maps = needs_idle_maps(dev_priv);
 	ggtt->base.insert_page = i915_ggtt_insert_page;
 	ggtt->base.insert_entries = i915_ggtt_insert_entries;

@@ -3481,8 +3487,8 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	/* GMADR is the PCI mmio aperture into the global GTT. */
 	DRM_INFO("Memory usable by graphics device = %lluM\n",
 		 ggtt->base.total >> 20);
-	DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_size >> 20);
-	DRM_DEBUG_DRIVER("GTT stolen size = %uM\n", ggtt->stolen_size >> 20);
+	DRM_DEBUG_DRIVER("GMADR size = %lluM\n", (u64)ggtt->mappable_size >> 20);
+	DRM_DEBUG_DRIVER("GTT stolen size = %lluM\n", (u64)ggtt->stolen_size >> 20);
 	if (intel_vtd_active())
 		DRM_INFO("VT-d active for gfx access\n");
 

@@ -3511,14 +3517,14 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
 		ggtt->base.mm.color_adjust = i915_gtt_color_adjust;
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
-	if (!io_mapping_init_wc(&dev_priv->ggtt.mappable,
-				dev_priv->ggtt.mappable_base,
+	if (!io_mapping_init_wc(&dev_priv->ggtt.mappable_io,
+				dev_priv->ggtt.mappable.start,
 				dev_priv->ggtt.mappable_size)) {
 		ret = -EIO;
 		goto out_gtt_cleanup;
 	}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base, ggtt->mappable_size);
+	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable.start, ggtt->mappable_size);
 
 	/*
 	 * Initialise stolen early so that we may reserve preallocated
drivers/gpu/drm/i915/i915_gem_gtt.h +2 -2
index 6eb34fd2c4ba..a91281a55b91 100644
@@ -368,9 +368,9 @@ i915_vm_has_scratch_64K(struct i915_address_space *vm)
  */
 struct i915_ggtt {
 	struct i915_address_space base;
-	struct io_mapping mappable;	/* Mapping to our CPU mappable region */
 
-	phys_addr_t mappable_base;	/* PA of our GMADR */
+	struct io_mapping mappable_io;	/* Mapping to our CPU mappable region */
+	struct resource mappable;       /* GMADR resource */
 	u64 mappable_size;		/* Total mappable size that we can CPU map */
 
 	/* Stolen memory is segmented in hardware with different portions
drivers/gpu/drm/i915/i915_gpu_error.c +1 -1
index 3d18d67d065f..95e76786f4d8 100644
@@ -953,7 +953,7 @@ i915_error_object_create(struct drm_i915_private *i915,
 		ggtt->base.insert_page(&ggtt->base, dma, slot,
 				       I915_CACHE_NONE, 0);
 
-		s = io_mapping_map_atomic_wc(&ggtt->mappable, slot);
+		s = io_mapping_map_atomic_wc(&ggtt->mappable_io, slot);
 		ret = compress_page(&compress, (void  __force *)s, dst);
 		io_mapping_unmap_atomic(s);
drivers/gpu/drm/i915/i915_vma.c +1 -1
index a9413b601230..e4f080ebdebb 100644
@@ -305,7 +305,7 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 
 	ptr = vma->iomap;
 	if (ptr == NULL) {
-		ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->mappable,
+		ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->mappable_io,
 					vma->node.start,
 					vma->node.size);
 		if (ptr == NULL) {
drivers/gpu/drm/i915/intel_display.c +1 -1
index 60d0a2d8534c..7f5e60180eec 100644
@@ -14592,7 +14592,7 @@ int intel_modeset_init(struct drm_device *dev)
 		dev->mode_config.cursor_height = MAX_CURSOR_HEIGHT;
 	}
 
-	dev->mode_config.fb_base = ggtt->mappable_base;
+	dev->mode_config.fb_base = ggtt->mappable.start;
 
 	DRM_DEBUG_KMS("%d display pipe%s available.\n",
 		      INTEL_INFO(dev_priv)->num_pipes,
drivers/gpu/drm/i915/intel_overlay.c +2 -2
index 1b397b41cb4f..d3d3aa147695 100644
@@ -219,7 +219,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
 	if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
 		regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
 	else
-		regs = io_mapping_map_wc(&dev_priv->ggtt.mappable,
+		regs = io_mapping_map_wc(&dev_priv->ggtt.mappable_io,
 					 overlay->flip_addr,
 					 PAGE_SIZE);
 

@@ -1508,7 +1508,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
 		regs = (struct overlay_registers __iomem *)
 			overlay->reg_bo->phys_handle->vaddr;
 	else
-		regs = io_mapping_map_atomic_wc(&dev_priv->ggtt.mappable,
+		regs = io_mapping_map_atomic_wc(&dev_priv->ggtt.mappable_io,
 						overlay->flip_addr);
 
 	return regs;
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +2 -2
index e97ae4b4a684..82f8e745842b 100644
@@ -1074,7 +1074,7 @@ static int igt_ggtt_page(void *arg)
 				       i915_gem_object_get_dma_address(obj, 0),
 				       offset, I915_CACHE_NONE, 0);
 
-		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable, offset);
+		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable_io, offset);
 		iowrite32(n, vaddr + n);
 		io_mapping_unmap_atomic(vaddr);
 

@@ -1092,7 +1092,7 @@ static int igt_ggtt_page(void *arg)
 				       i915_gem_object_get_dma_address(obj, 0),
 				       offset, I915_CACHE_NONE, 0);
 
-		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable, offset);
+		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable_io, offset);
 		val = ioread32(vaddr + n);
 		io_mapping_unmap_atomic(vaddr);
drivers/gpu/drm/i915/selftests/mock_gtt.c +2 -1
index d3155f36de89..61e50eea38f4 100644
@@ -110,8 +110,9 @@ void mock_init_ggtt(struct drm_i915_private *i915)
 
 	ggtt->base.i915 = i915;
 
-	ggtt->mappable_base = 0;
+	ggtt->mappable.start = 0;
 	ggtt->mappable_size = 2048 * PAGE_SIZE;
+	ggtt->mappable.end = ggtt->mappable_size - 1;
 	ggtt->base.total = 4096 * PAGE_SIZE;
 
 	ggtt->base.clear_range = nop_clear_range;
Signature · 6 lines
2.14.3

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
#14 lore raw

Re: [PATCH 5/6] drm/i915: make mappable struct resource centric

Quoting Matthew Auld (2017-11-22 21:19:19)

Quoted 37 lines
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/gvt/gvt.h                |  2 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem.c               |  8 ++++----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 28 ++++++++++++++++-----------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  4 ++--
 drivers/gpu/drm/i915/i915_gpu_error.c         |  2 +-
 drivers/gpu/drm/i915/i915_vma.c               |  2 +-
 drivers/gpu/drm/i915/intel_display.c          |  2 +-
 drivers/gpu/drm/i915/intel_overlay.c          |  4 ++--
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  4 ++--
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |  3 ++-
 12 files changed, 35 insertions(+), 28 deletions(-)
drivers/gpu/drm/i915/gvt/gvt.h +1 -1
index 028d00e61bad..601e5fee8957 100644
@@ -336,7 +336,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
 
 /* Aperture/GM space definitions for GVT device */
 #define gvt_aperture_sz(gvt)     (gvt->dev_priv->ggtt.mappable_size)
-#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
+#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable.start)
 
 #define gvt_ggtt_gm_sz(gvt)      (gvt->dev_priv->ggtt.base.total)
 #define gvt_ggtt_sz(gvt) \
drivers/gpu/drm/i915/i915_drv.c +0 -0
index e1bb0c8822aa..be29895a56f6 100644

drivers/gpu/drm/i915/i915_drv.c static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) · line 732

Quoted 6 lines
drivers/gpu/drm/i915/i915_drv.c +1 -1
@@ -728,7 +728,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
        if (!ap)
                return -ENOMEM;
 
-       ap->ranges[0].base = ggtt->mappable_base;
+       ap->ranges[0].base = ggtt->mappable.start;
        ap->ranges[0].size = ggtt->mappable_size;

Do we need a type overflow check here? Probably.
-Chris
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author
#15 lore raw

PATCH 6/6 drm/i915: prefer resource_size_t for stolen sizes

In reply to Matthew Auld

Keeps things consistent now that we make use of struct resource. This should keep us covered in case we ever get huge amounts of stolen memory.

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/char/agp/intel-gtt.c           | 14 +++++++-------
 drivers/gpu/drm/i915/i915_debugfs.c    |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c    | 10 +++++-----
 drivers/gpu/drm/i915/i915_gem_gtt.h    |  6 +++---
 drivers/gpu/drm/i915/i915_gem_stolen.c | 22 +++++++++++-----------
 include/drm/intel-gtt.h                |  4 ++--
 6 files changed, 29 insertions(+), 29 deletions(-)
drivers/char/agp/intel-gtt.c +7 -7
index 2a321ee2943a..312c4cc440bc 100644
@@ -80,7 +80,7 @@ static struct _intel_private {
 	unsigned int needs_dmar : 1;
 	phys_addr_t gma_bus_addr;
 	/*  Size of memory reserved for graphics by the BIOS */
-	unsigned int stolen_size;
+	resource_size_t stolen_size;
 	/* Total number of gtt entries. */
 	unsigned int gtt_total_entries;
 	/* Part of the gtt that is mappable by the cpu, for those chips where

@@ -333,13 +333,13 @@ static void i810_write_entry(dma_addr_t addr, unsigned int entry,
 	writel_relaxed(addr | pte_flags, intel_private.gtt + entry);
 }
 
-static unsigned int intel_gtt_stolen_size(void)
+static resource_size_t intel_gtt_stolen_size(void)
 {
 	u16 gmch_ctrl;
 	u8 rdct;
 	int local = 0;
 	static const int ddt[4] = { 0, 16, 32, 64 };
-	unsigned int stolen_size = 0;
+	resource_size_t stolen_size = 0;
 
 	if (INTEL_GTT_GEN == 1)
 		return 0; /* no stolen mem on i81x */

@@ -417,8 +417,8 @@ static unsigned int intel_gtt_stolen_size(void)
 	}
 
 	if (stolen_size > 0) {
-		dev_info(&intel_private.bridge_dev->dev, "detected %dK %s memory\n",
-		       stolen_size / KB(1), local ? "local" : "stolen");
+		dev_info(&intel_private.bridge_dev->dev, "detected %lluK %s memory\n",
+		       (u64)stolen_size / KB(1), local ? "local" : "stolen");
 	} else {
 		dev_info(&intel_private.bridge_dev->dev,
 		       "no pre-allocated video memory detected\n");

@@ -1422,9 +1422,9 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 EXPORT_SYMBOL(intel_gmch_probe);
 
 void intel_gtt_get(u64 *gtt_total,
-		   u32 *stolen_size,
+		   resource_size_t *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_size)
+		   resource_size_t *mappable_size)
 {
 	*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;
 	*stolen_size = intel_private.stolen_size;
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
index a05e2b92c02c..248d18a255d8 100644
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
 		   dpy_count, dpy_size);
 
 	seq_printf(m, "%llu [%llu] gtt total\n",
-		   ggtt->base.total, ggtt->mappable_size);
+		   ggtt->base.total, (u64)ggtt->mappable_size);
 	seq_printf(m, "Supported page sizes: %s\n",
 		   stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
 					buf, sizeof(buf)));
drivers/gpu/drm/i915/i915_gem_gtt.c +5 -5
index 8313b3f494ec..87cd555bb363 100644
@@ -3354,7 +3354,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 	 * a coarse sanity check.
 	 */
 	if (ggtt->mappable_size < (64<<20) || ggtt->mappable_size > (512<<20)) {
-		DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_size);
+		DRM_ERROR("Unknown GMADR size (%pa)\n", &ggtt->mappable_size);
 		return -ENXIO;
 	}
 

@@ -3466,7 +3466,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	 */
 	if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) {
 		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
-		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
+		ggtt->mappable_size = min_t(u64, ggtt->mappable_size, ggtt->base.total);
 	}
 
 	if ((ggtt->base.total - 1) >> 32) {

@@ -3474,13 +3474,13 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 			  " of address space! Found %lldM!\n",
 			  ggtt->base.total >> 20);
 		ggtt->base.total = 1ULL << 32;
-		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
+		ggtt->mappable_size = min_t(u64, ggtt->mappable_size, ggtt->base.total);
 	}
 
 	if (ggtt->mappable_size > ggtt->base.total) {
 		DRM_ERROR("mappable aperture extends past end of GGTT,"
-			  " aperture=%llx, total=%llx\n",
-			  ggtt->mappable_size, ggtt->base.total);
+			  " aperture=%pa, total=%llx\n",
+			  &ggtt->mappable_size, ggtt->base.total);
 		ggtt->mappable_size = ggtt->base.total;
 	}
drivers/gpu/drm/i915/i915_gem_gtt.h +3 -3
index a91281a55b91..6f7c640885ed 100644
@@ -371,7 +371,7 @@ struct i915_ggtt {
 
 	struct io_mapping mappable_io;	/* Mapping to our CPU mappable region */
 	struct resource mappable;       /* GMADR resource */
-	u64 mappable_size;		/* Total mappable size that we can CPU map */
+	resource_size_t mappable_size;	/* Total mappable size that we can CPU map */
 
 	/* Stolen memory is segmented in hardware with different portions
 	 * offlimits to certain functions.

@@ -381,8 +381,8 @@ struct i915_ggtt {
 	 * avoid the first page! The upper end of stolen memory is reserved for
 	 * hardware functions and similarly removed from the accessible range.
 	 */
-	u32 stolen_size;		/* Total size of stolen memory */
-	u32 stolen_usable_size;	/* Total size minus reserved ranges */
+	resource_size_t stolen_size;		/* Total size of stolen memory */
+	resource_size_t stolen_usable_size;	/* Total size minus reserved ranges */
 
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
drivers/gpu/drm/i915/i915_gem_stolen.c +11 -11
index 2b7af60dfce0..dc7cc977bfe8 100644
@@ -179,7 +179,7 @@ void i915_gem_cleanup_stolen(struct drm_device *dev)
 }
 
 static void g4x_get_stolen_reserved(struct drm_i915_private *dev_priv,
-				    dma_addr_t *base, u32 *size)
+				    dma_addr_t *base, resource_size_t *size)
 {
 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
 	uint32_t reg_val = I915_READ(IS_GM45(dev_priv) ?

@@ -214,7 +214,7 @@ static void g4x_get_stolen_reserved(struct drm_i915_private *dev_priv,
 }
 
 static void gen6_get_stolen_reserved(struct drm_i915_private *dev_priv,
-				     dma_addr_t *base, u32 *size)
+				     dma_addr_t *base, resource_size_t *size)
 {
 	uint32_t reg_val = I915_READ(GEN6_STOLEN_RESERVED);
 

@@ -246,7 +246,7 @@ static void gen6_get_stolen_reserved(struct drm_i915_private *dev_priv,
 }
 
 static void gen7_get_stolen_reserved(struct drm_i915_private *dev_priv,
-				     dma_addr_t *base, u32 *size)
+				     dma_addr_t *base, resource_size_t *size)
 {
 	uint32_t reg_val = I915_READ(GEN6_STOLEN_RESERVED);
 

@@ -272,7 +272,7 @@ static void gen7_get_stolen_reserved(struct drm_i915_private *dev_priv,
 }
 
 static void chv_get_stolen_reserved(struct drm_i915_private *dev_priv,
-				    dma_addr_t *base, u32 *size)
+				    dma_addr_t *base, resource_size_t *size)
 {
 	uint32_t reg_val = I915_READ(GEN6_STOLEN_RESERVED);
 

@@ -304,7 +304,7 @@ static void chv_get_stolen_reserved(struct drm_i915_private *dev_priv,
 }
 
 static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
-				    dma_addr_t *base, u32 *size)
+				    dma_addr_t *base, resource_size_t *size)
 {
 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
 	uint32_t reg_val = I915_READ(GEN6_STOLEN_RESERVED);

@@ -335,8 +335,8 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
 	struct resource reserved = DEFINE_RES_MEM(0, 0);
 	dma_addr_t reserved_base, stolen_top;
-	u32 reserved_total, reserved_size;
-	u32 stolen_usable_start;
+	resource_size_t reserved_total, reserved_size;
+	resource_size_t stolen_usable_start;
 
 	mutex_init(&dev_priv->mm.stolen_lock);
 

@@ -416,9 +416,9 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 	 * memory, so just consider the start. */
 	reserved_total = stolen_top - reserved_base;
 
-	DRM_DEBUG_KMS("Memory reserved for graphics device: %uK, usable: %uK\n",
-		      ggtt->stolen_size >> 10,
-		      (ggtt->stolen_size - reserved_total) >> 10);
+	DRM_DEBUG_KMS("Memory reserved for graphics device: %lluK, usable: %lluK\n",
+		      (u64)ggtt->stolen_size >> 10,
+		      (u64)(ggtt->stolen_size - reserved_total) >> 10);
 
 	stolen_usable_start = 0;
 	/* WaSkipStolenMemoryFirstPage:bdw+ */

@@ -437,7 +437,7 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 
 static struct sg_table *
 i915_pages_create_for_stolen(struct drm_device *dev,
-			     u32 offset, u32 size)
+			     resource_size_t offset, resource_size_t size)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct sg_table *st;
include/drm/intel-gtt.h +2 -2
index e901de0b6dd8..71505a5e376d 100644
@@ -5,9 +5,9 @@
 #define	_DRM_INTEL_GTT_H
 
 void intel_gtt_get(u64 *gtt_total,
-		   u32 *stolen_size,
+		   resource_size_t *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_size);
+		   resource_size_t *mappable_size);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 		     struct agp_bridge_data *bridge);
Signature · 6 lines
2.14.3

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
#16 lore raw

Re: [PATCH 6/6] drm/i915: prefer resource_size_t for stolen sizes

Quoting Matthew Auld (2017-11-22 21:19:20)

Quoted 6 lines
include/drm/intel-gtt.h +0 -0
index e901de0b6dd8..71505a5e376d 100644
@@ -5,9 +5,9 @@
 #define        _DRM_INTEL_GTT_H

include/drm/intel-gtt.h line 13

Quoted 10 lines
include/drm/intel-gtt.h +2 -2
 
 void intel_gtt_get(u64 *gtt_total,
-                  u32 *stolen_size,
+                  resource_size_t *stolen_size,
                   phys_addr_t *mappable_base,
-                  u64 *mappable_size);
+                  resource_size_t *mappable_size);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
                     struct agp_bridge_data *bridge);

Tempted to pull this into i915.ko yet?
Admit it, you know you are.
-Chris
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CI
#17 lore raw

✓ Fi.CI.BAT: success for make stolen resource centric

In reply to Matthew Auld
== Series Details ==

== Series Details ==

Series: make stolen resource centric
URL : https://patchwork.freedesktop.org/series/34256/
State : success

== Summary ==

Series 34256v1 make stolen resource centric
https://patchwork.freedesktop.org/api/1.0/series/34256/revisions/1/mbox/

Test kms_pipe_crc_basic:

        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:447s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:452s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:383s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:545s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:278s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:502s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:508s
fi-byt-j1900     total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  time:503s
fi-byt-n2820     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:494s
fi-cfl-s2        total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:609s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:435s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:268s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:541s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:430s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:439s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:427s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:480s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:458s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:476s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:530s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:478s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:530s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:577s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:554s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:567s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:519s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:456s
fi-snb-2520m     total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:428s
Blacklisted hosts:
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:549s
fi-glk-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:497s

a3f080ee939e8befca924f1ab83deeabfa7ff98e drm-tip: 2017y-11m-22d-18h-37m-24s UTC integration manifest 6c1e0ea249cf drm/i915: prefer resource_size_t for stolen sizes
f1b878acae4c drm/i915: make mappable struct resource centric
3a9e1016bf01 drm/i915: make reserved struct resource centric
728dd7c03606 drm/i915: make dsm struct resource centric
73ecc370c059 drm/i915: s/mappable_end/mappable_size/
8e2e5efd125a drm/i915: export the stolen region as a resource

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7241/
_______________________________________________
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CI
#18 lore raw

✗ Fi.CI.IGT: warning for make stolen resource centric

In reply to Matthew Auld
== Series Details ==

== Series Details ==

Series: make stolen resource centric
URL : https://patchwork.freedesktop.org/series/34256/
State : warning

== Summary ==

Test kms_draw_crc:

        Subgroup draw-method-xrgb2101010-pwrite-untiled:
                pass       -> SKIP       (shard-snb)
Test kms_cursor_crc:
        Subgroup cursor-256x256-suspend:
                pass       -> FAIL       (shard-snb) fdo#102365
Test gem_busy:
        Subgroup close-race:
                fail       -> PASS       (shard-snb) fdo#103829
Test drv_module_reload:
        Subgroup basic-no-display:
                pass       -> DMESG-WARN (shard-snb) fdo#102707 +1
Test kms_flip:
        Subgroup dpms-vs-vblank-race-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#103060
Test perf:
        Subgroup blocking:
                pass       -> FAIL       (shard-hsw) fdo#102252
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-pri-indfb-multidraw:
                incomplete -> PASS       (shard-hsw) fdo#103167

fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
fdo#103829 https://bugs.freedesktop.org/show_bug.cgi?id=103829
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167

shard-hsw        total:2667 pass:1523 dwarn:2   dfail:0   fail:20  skip:1122 time:9494s
shard-snb        total:2572 pass:1251 dwarn:2   dfail:0   fail:18  skip:1299 time:7634s

Blacklisted hosts:
shard-apl total:2571 pass:1616 dwarn:2 dfail:0 fail:24 skip:927 time:12636s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7241/shards.html
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