ARM: dts: imx51-babbage: Pass the USB PHY regulator
Subsystems (2)
Fabio Estevam
reviewerPATCH 1/2 ARM: dts: imx51-babbage: Pass the USB PHY regulator
From: Fabio Estevam <[email protected]>
The USB PHYs are supplied via MC13892 VUSB regulator rail, so properly describe this in the device tree.
--- arch/arm/boot/dts/imx51-babbage.dts | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/boot/dts/imx51-babbage.dts +9 -0
@@ -165,6 +165,7 @@ clocks = <&clks IMX5_CLK_DUMMY>; clock-names = "main_clk"; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; + vcc-supply = <&vusb_reg>; #phy-cells = <0>; }; };
@@ -241,6 +242,10 @@ regulator-max-microvolt = <3150000>; }; + vusb_reg: vusb { + regulator-boot-on; + }; + vusb2_reg: vusb2 { regulator-min-microvolt = <2400000>; regulator-max-microvolt = <2775000>;
@@ -414,6 +419,10 @@ status = "okay"; }; +&usbphy0 { + vcc-supply = <&vusb_reg>; +}; + &usbotg { dr_mode = "otg"; disable-over-current;
Signature · 1 line
2.7.4
Fabio Estevam
reviewerPATCH 2/2 ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
From: Fabio Estevam <[email protected]>
On imx51-babbage there is a 26MHz oscillator that is gated by GPIO3_1.
The output of this clock feeds audio codec clock and USB PHY clocks, which are gated by GPIO4_26 and GPIO2_1 respectively.
Fix the clock representation by properly using gpio-gate-clock.
The clock nodes can be moved out of the 'clocks' node.
Based on a commit from Lucas Stach for imx51-zii-rdu1 board.
This also fixes the following build warning with W=1:
arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit name
--- arch/arm/boot/dts/imx51-babbage.dts | 67 +++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 17 deletions(-)
arch/arm/boot/dts/imx51-babbage.dts +50 -17
@@ -25,18 +25,41 @@ reg = <0x90000000 0x20000000>; }; - clocks { - ckih1 { - clock-frequency = <22579200>; - }; + ckih1 { + clock-frequency = <22579200>; + }; - clk_26M: codec_clock { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <26000000>; - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; - }; + clk_26M_osc: 26M_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_26M_osc_gate: 26M_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_osc>; + clocks = <&clk_26M_osc>; + #clock-cells = <0>; + enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>; + }; + + clk_26M_audio: audio_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_audio>; + clocks = <&clk_26M_osc_gate>; + #clock-cells = <0>; + enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + }; + + clk_26M_usb: usbhost_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_usb>; + clocks = <&clk_26M_osc_gate>; + #clock-cells = <0>; + enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; }; display1: disp1 {
@@ -162,7 +185,7 @@ usbh1phy: usbh1phy at 0 { compatible = "usb-nop-xceiv"; reg = <0>; - clocks = <&clks IMX5_CLK_DUMMY>; + clocks = <&clk_26M_usb>; clock-names = "main_clk"; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; vcc-supply = <&vusb_reg>;
@@ -345,10 +368,8 @@ sgtl5000: codec at a { compatible = "fsl,sgtl5000"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_clkcodec>; reg = <0x0a>; - clocks = <&clk_26M>; + clocks = <&clk_26M_audio>; VDDA-supply = <&vdig_reg>; VDDIO-supply = <&vvideo_reg>; };
@@ -441,9 +462,21 @@ >; }; - pinctrl_clkcodec: clkcodecgrp { + pinctrl_clk26mhz_audio: clk26mhzaudiocgrp { + fsl,pins = < + MX51_PAD_CSPI1_RDY__GPIO4_26 0x85 + >; + }; + + pinctrl_clk26mhz_osc: clk26mhzoscgrp { + fsl,pins = < + MX51_PAD_DI1_PIN12__GPIO3_1 0x85 + >; + }; + + pinctrl_clk26mhz_usb: clk26mhzusbgrp { fsl,pins = < - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 + MX51_PAD_EIM_D17__GPIO2_1 0x85 >; };
Signature · 1 line
2.7.4
PATCH 2/2 ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
Quoted 36 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
On imx51-babbage there is a 26MHz oscillator that is gated by
GPIO3_1.The output of this clock feeds audio codec clock and USB PHY clocks, which are gated by
GPIO4_26andGPIO2_1respectively.Fix the clock representation by properly using gpio-gate-clock.
The clock nodes can be moved out of the 'clocks' node.
Based on a commit from Lucas Stach for imx51-zii-rdu1 board.
This also fixes the following build warning with W=1:
arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit nameSigned-off-by Fabio Estevam <[email protected]>--- arch/arm/boot/dts/imx51-babbage.dts | 67 +++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 17 deletions(-)arch/arm/boot/dts/imx51-babbage.dts +2
-4@@ -25,18 +25,41 @@ reg = <0x90000000 0x20000000>; }; - clocks { - ckih1 { - clock-frequency = <22579200>; - }; + ckih1 { + clock-frequency = <22579200>;
arch/arm/boot/dts/imx51-babbage.dts line 32
Quoted 10 lines
arch/arm/boot/dts/imx51-babbage.dts +2
-7+ }; - clk_26M: codec_clock { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <26000000>; - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; - }; + clk_26M_osc: 26M_osc {
While at it, I suggest we use hyphen rather than underscore in node name, and all lowercase for node name.
Shawn
Quoted 81 lines
arch/arm/boot/dts/imx51-babbage.dts +46
-6+ compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_26M_osc_gate: 26M_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_osc>; + clocks = <&clk_26M_osc>; + #clock-cells = <0>; + enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>; + }; + + clk_26M_audio: audio_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_audio>; + clocks = <&clk_26M_osc_gate>; + #clock-cells = <0>; + enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + }; + + clk_26M_usb: usbhost_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_usb>; + clocks = <&clk_26M_osc_gate>; + #clock-cells = <0>; + enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; }; display1: disp1 {@@ -162,7 +185,7 @@ usbh1phy: usbh1phy at 0 { compatible = "usb-nop-xceiv"; reg = <0>; - clocks = <&clks IMX5_CLK_DUMMY>; + clocks = <&clk_26M_usb>; clock-names = "main_clk"; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; vcc-supply = <&vusb_reg>;@@ -345,10 +368,8 @@ sgtl5000: codec at a { compatible = "fsl,sgtl5000"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_clkcodec>; reg = <0x0a>; - clocks = <&clk_26M>; + clocks = <&clk_26M_audio>; VDDA-supply = <&vdig_reg>; VDDIO-supply = <&vvideo_reg>; };@@ -441,9 +462,21 @@ >; }; - pinctrl_clkcodec: clkcodecgrp { + pinctrl_clk26mhz_audio: clk26mhzaudiocgrp { + fsl,pins = < + MX51_PAD_CSPI1_RDY__GPIO4_26 0x85 + >; + }; + + pinctrl_clk26mhz_osc: clk26mhzoscgrp { + fsl,pins = < + MX51_PAD_DI1_PIN12__GPIO3_1 0x85 + >; + }; + + pinctrl_clk26mhz_usb: clk26mhzusbgrp { fsl,pins = < - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 + MX51_PAD_EIM_D17__GPIO2_1 0x85 >; };Signature · 1 line
2.7.4
Shawn Guo
AppliedPATCH 1/2 ARM: dts: imx51-babbage: Pass the USB PHY regulator
In reply to Fabio EstevamQuoted 6 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
The USB PHYs are supplied via MC13892 VUSB regulator rail, so properly describe this in the device tree.
Signed-off-by Fabio Estevam <[email protected]>
Applied this one, thanks.