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soc: qcom: Separate kryo l2 accessors from PMU driver

PATCH New Ilia Lin 2 participants 6 messages Dec 5, 2017 – Dec 11, 2017

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Ilia Lin

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#0 lore raw

PATCH 1/1 soc: qcom: Separate kryo l2 accessors from PMU driver

The driver provides kernel level API for other drivers to access the MSM8996 L2 cache registers. Separating the L2 access code from the PMU driver and making it public to allow other drivers use it. The accesses must be separated with a single spinlock, maintained in this driver.

Change-Id I2865e888491e85d678e298279400c371427e30ea
Signed-off-by Ilia Lin <[email protected]>
---
 arch/arm64/Kconfig.platforms         |  7 ++++
 drivers/perf/qcom_l2_pmu.c           | 48 +--------------------------
 drivers/soc/qcom/Makefile            |  1 +
 drivers/soc/qcom/kryo-l2-accessors.c | 64 ++++++++++++++++++++++++++++++++++++
 include/soc/qcom/kryo-l2-accessors.h | 27 +++++++++++++++
 5 files changed, 100 insertions(+), 47 deletions(-)
 create mode 100644 drivers/soc/qcom/kryo-l2-accessors.c
 create mode 100644 include/soc/qcom/kryo-l2-accessors.h
arch/arm64/Kconfig.platforms +7 -0
index 2401373..1cfed45 100644
@@ -138,6 +138,13 @@ config ARCH_QCOM
 	help
 	  This enables support for the ARMv8 based Qualcomm chipsets.
 
+config ARCH_MSM8996
+    bool "Enable Support for Qualcomm Technologies, Inc. MSM8996"
+	depends on ARCH_QCOM
+	help
+	This enables support for the MSM8996 chipset. If you do not
+	wish to build a kernel that runs on this chipset, say 'N' here.
+
 config ARCH_REALTEK
 	bool "Realtek Platforms"
 	help
drivers/perf/qcom_l2_pmu.c +1 -47

66 lines not on this page · raw message

drivers/soc/qcom/Makefile +1 -0
index 40c56f6..2bf8d93 100644
@@ -10,3 +10,4 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
 obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+obj-$(CONFIG_ARCH_MSM8996) +=	kryo-l2-accessors.o
drivers/soc/qcom/kryo-l2-accessors.c new file +64 -0

64 lines not on this page · raw message

include/soc/qcom/kryo-l2-accessors.h new file +27 -0
new file mode 100644
index 0000000..2bebce1
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H
+#define __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H
+
+#ifdef CONFIG_ARCH_QCOM
+void set_l2_indirect_reg(u64 reg_addr, u64 val);
+u64 get_l2_indirect_reg(u64 reg_addr);
+#else
+static inline void set_l2_indirect_reg(u32 reg_addr, u32 val) {}
+static inline u32 get_l2_indirect_reg(u32 reg_addr)
+{
+	return 0;
+}
+#endif
+#endif
Signature · 1 line
1.9.1
maintainer
#1 lore raw

PATCH 1/1 soc: qcom: Separate kryo l2 accessors from PMU driver

Hi,

Quoted 9 lines · Ilia Lin

The driver provides kernel level API for other drivers to access the MSM8996 L2 cache registers. Separating the L2 access code from the PMU driver and making it public to allow other drivers use it. The accesses must be separated with a single spinlock, maintained in this driver.

Change-Id I2865e888491e85d678e298279400c371427e30ea
Signed-off-by Ilia Lin <[email protected]>

What other driver is going to use this?

Until there is another driver, I don't see much point in factoring this out.

Thanks,
Mark.

Quoted 221 lines
---
 arch/arm64/Kconfig.platforms         |  7 ++++
 drivers/perf/qcom_l2_pmu.c           | 48 +--------------------------
 drivers/soc/qcom/Makefile            |  1 +
 drivers/soc/qcom/kryo-l2-accessors.c | 64 ++++++++++++++++++++++++++++++++++++
 include/soc/qcom/kryo-l2-accessors.h | 27 +++++++++++++++
 5 files changed, 100 insertions(+), 47 deletions(-)
 create mode 100644 drivers/soc/qcom/kryo-l2-accessors.c
 create mode 100644 include/soc/qcom/kryo-l2-accessors.h
arch/arm64/Kconfig.platforms +7 -0
index 2401373..1cfed45 100644
@@ -138,6 +138,13 @@ config ARCH_QCOM
 	help
 	  This enables support for the ARMv8 based Qualcomm chipsets.
 
+config ARCH_MSM8996
+    bool "Enable Support for Qualcomm Technologies, Inc. MSM8996"
+	depends on ARCH_QCOM
+	help
+	This enables support for the MSM8996 chipset. If you do not
+	wish to build a kernel that runs on this chipset, say 'N' here.
+
 config ARCH_REALTEK
 	bool "Realtek Platforms"
 	help
drivers/perf/qcom_l2_pmu.c +1 -47
index 4fdc848..ba5f241 100644
@@ -30,7 +30,7 @@
 
 #include <asm/barrier.h>
 #include <asm/local64.h>
-#include <asm/sysreg.h>
+#include <soc/qcom/kryo-l2-accessors.h>
 
 #define MAX_L2_CTRS             9
 

@@ -87,9 +87,6 @@
 #define L2_COUNTER_RELOAD       BIT_ULL(31)
 #define L2_CYCLE_COUNTER_RELOAD BIT_ULL(63)
 
-#define L2CPUSRSELR_EL1         sys_reg(3, 3, 15, 0, 6)
-#define L2CPUSRDR_EL1           sys_reg(3, 3, 15, 0, 7)
-
 #define reg_idx(reg, i)         (((i) * IA_L2_REG_OFFSET) + reg##_BASE)
 
 /*

@@ -107,49 +104,6 @@
 #define L2_EVENT_STREX                     0x421
 #define L2_EVENT_CLREX                     0x422
 
-static DEFINE_RAW_SPINLOCK(l2_access_lock);
-
-/**
- * set_l2_indirect_reg: write value to an L2 register
- * @reg: Address of L2 register.
- * @value: Value to be written to register.
- *
- * Use architecturally required barriers for ordering between system register
- * accesses
- */
-static void set_l2_indirect_reg(u64 reg, u64 val)
-{
-	unsigned long flags;
-
-	raw_spin_lock_irqsave(&l2_access_lock, flags);
-	write_sysreg_s(reg, L2CPUSRSELR_EL1);
-	isb();
-	write_sysreg_s(val, L2CPUSRDR_EL1);
-	isb();
-	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
-}
-
-/**
- * get_l2_indirect_reg: read an L2 register value
- * @reg: Address of L2 register.
- *
- * Use architecturally required barriers for ordering between system register
- * accesses
- */
-static u64 get_l2_indirect_reg(u64 reg)
-{
-	u64 val;
-	unsigned long flags;
-
-	raw_spin_lock_irqsave(&l2_access_lock, flags);
-	write_sysreg_s(reg, L2CPUSRSELR_EL1);
-	isb();
-	val = read_sysreg_s(L2CPUSRDR_EL1);
-	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
-
-	return val;
-}
-
 struct cluster_pmu;
 
 /*
drivers/soc/qcom/Makefile +1 -0
index 40c56f6..2bf8d93 100644
@@ -10,3 +10,4 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
 obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+obj-$(CONFIG_ARCH_MSM8996) +=	kryo-l2-accessors.o
drivers/soc/qcom/kryo-l2-accessors.c new file +64 -0
new file mode 100644
index 0000000..6be57e6
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2014-2015, 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/spinlock.h>
+#include <asm/sysreg.h>
+#include <soc/qcom/kryo-l2-accessors.h>
+
+#define L2CPUSRSELR_EL1         sys_reg(3, 3, 15, 0, 6)
+#define L2CPUSRDR_EL1           sys_reg(3, 3, 15, 0, 7)
+
+static DEFINE_RAW_SPINLOCK(l2_access_lock);
+
+/**
+ * set_l2_indirect_reg: write value to an L2 register
+ * @reg: Address of L2 register.
+ * @value: Value to be written to register.
+ *
+ * Use architecturally required barriers for ordering between system register
+ * accesses, and system registers with respect to device memory
+ */
+void set_l2_indirect_reg(u64 reg, u64 val)
+{
+	unsigned long flags;
+	mb();
+	raw_spin_lock_irqsave(&l2_access_lock, flags);
+	write_sysreg_s(reg, L2CPUSRSELR_EL1);
+	isb();
+	write_sysreg_s(val, L2CPUSRDR_EL1);
+	isb();
+	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
+}
+EXPORT_SYMBOL(set_l2_indirect_reg);
+
+/**
+ * get_l2_indirect_reg: read an L2 register value
+ * @reg: Address of L2 register.
+ *
+ * Use architecturally required barriers for ordering between system register
+ * accesses, and system registers with respect to device memory
+ */
+u64 get_l2_indirect_reg(u64 reg)
+{
+	u64 val;
+	unsigned long flags;
+
+	raw_spin_lock_irqsave(&l2_access_lock, flags);
+	write_sysreg_s(reg, L2CPUSRSELR_EL1);
+	isb();
+	val = read_sysreg_s(L2CPUSRDR_EL1);
+	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
+
+	return val;
+}
+EXPORT_SYMBOL(get_l2_indirect_reg);
include/soc/qcom/kryo-l2-accessors.h new file +27 -0
new file mode 100644
index 0000000..2bebce1
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H
+#define __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H
+
+#ifdef CONFIG_ARCH_QCOM
+void set_l2_indirect_reg(u64 reg_addr, u64 val);
+u64 get_l2_indirect_reg(u64 reg_addr);
+#else
+static inline void set_l2_indirect_reg(u32 reg_addr, u32 val) {}
+static inline u32 get_l2_indirect_reg(u32 reg_addr)
+{
+	return 0;
+}
+#endif
+#endif
Signature · 7 lines
1.9.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
author
#2 lore raw

PATCH 1/1 soc: qcom: Separate kryo l2 accessors from PMU driver

Hello Mark,

Quoted 17 lines

-----Original Message-----
From: Mark Rutland [mailto:mark.rutland at arm.com]
Sent: Tuesday, December 5, 2017 12:35 PM
To: Ilia Lin <[email protected]>
Cc: linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH] soc: qcom: Separate kryo l2 accessors from PMU driver

Hi,

Quoted 7 lines · Ilia Lin

The driver provides kernel level API for other drivers to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and making it public to allow other drivers use it.
The accesses must be separated with a single spinlock, maintained in this driver.

Quoted 6 lines
Quoted 2 lines
Change-Id I2865e888491e85d678e298279400c371427e30ea
Signed-off-by Ilia Lin <[email protected]>

What other driver is going to use this?

Until there is another driver, I don't see much point in factoring this

out.

The other driver currently is the CPU clock driver, which needs configuring the L2 registers. The clock driver will be submitted through the linux-clk list and will depend on the kryo-l2-accessors driver then.

Thanks,
Ilia

Quoted 112 lines

Thanks,
Mark.

drivers/soc/qcom/Makefile obj-$(CONFIG_QCOM_SMEM_STATE) +=

Quoted 107 lines
---
 arch/arm64/Kconfig.platforms         |  7 ++++
 drivers/perf/qcom_l2_pmu.c           | 48 +--------------------------
 drivers/soc/qcom/Makefile            |  1 +
 drivers/soc/qcom/kryo-l2-accessors.c | 64
++++++++++++++++++++++++++++++++++++
 include/soc/qcom/kryo-l2-accessors.h | 27 +++++++++++++++
 5 files changed, 100 insertions(+), 47 deletions(-)  create mode
100644 drivers/soc/qcom/kryo-l2-accessors.c
 create mode 100644 include/soc/qcom/kryo-l2-accessors.h
(quoted diff) +0 -0

b/arch/arm64/Kconfig.platforms index 2401373..1cfed45 100644

arch/arm64/Kconfig.platforms +7 -0
@@ -138,6 +138,13 @@ config ARCH_QCOM
 	help
 	  This enables support for the ARMv8 based Qualcomm chipsets.
 
+config ARCH_MSM8996
+    bool "Enable Support for Qualcomm Technologies, Inc. MSM8996"
+	depends on ARCH_QCOM
+	help
+	This enables support for the MSM8996 chipset. If you do not
+	wish to build a kernel that runs on this chipset, say 'N' here.
+
 config ARCH_REALTEK
 	bool "Realtek Platforms"
 	help
drivers/perf/qcom_l2_pmu.c +1 -12
index 4fdc848..ba5f241 100644
@@ -30,7 +30,7 @@
 
 #include <asm/barrier.h>
 #include <asm/local64.h>
-#include <asm/sysreg.h>
+#include <soc/qcom/kryo-l2-accessors.h>
 
 #define MAX_L2_CTRS             9
 

@@ -87,9 +87,6 @@
 #define L2_COUNTER_RELOAD       BIT_ULL(31)
 #define L2_CYCLE_COUNTER_RELOAD BIT_ULL(63)
 
-#define L2CPUSRSELR_EL1         sys_reg(3, 3, 15, 0, 6)
-#define L2CPUSRDR_EL1           sys_reg(3, 3, 15, 0, 7)
-
 #define reg_idx(reg, i)         (((i) * IA_L2_REG_OFFSET) + reg##_BASE)
 
 /*

@@ -107,49 +104,6 @@
 #define L2_EVENT_STREX                     0x421
 #define L2_EVENT_CLREX                     0x422
 
-static DEFINE_RAW_SPINLOCK(l2_access_lock);
-
-/**
- * set_l2_indirect_reg: write value to an L2 register
- * @reg: Address of L2 register.
- * @value: Value to be written to register.
- *
- * Use architecturally required barriers for ordering between system

register
- * accesses
- */

drivers/perf/qcom_l2_pmu.c +0 -16
-static void set_l2_indirect_reg(u64 reg, u64 val) -{
-	unsigned long flags;
-
-	raw_spin_lock_irqsave(&l2_access_lock, flags);
-	write_sysreg_s(reg, L2CPUSRSELR_EL1);
-	isb();
-	write_sysreg_s(val, L2CPUSRDR_EL1);
-	isb();
-	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
-}
-
-/**
- * get_l2_indirect_reg: read an L2 register value
- * @reg: Address of L2 register.
- *
- * Use architecturally required barriers for ordering between system

register
- * accesses
- */

drivers/perf/qcom_l2_pmu.c +0 -13
-static u64 get_l2_indirect_reg(u64 reg) -{
-	u64 val;
-	unsigned long flags;
-
-	raw_spin_lock_irqsave(&l2_access_lock, flags);
-	write_sysreg_s(reg, L2CPUSRSELR_EL1);
-	isb();
-	val = read_sysreg_s(L2CPUSRDR_EL1);
-	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
-
-	return val;
-}
-
 struct cluster_pmu;
 
 /*
drivers/soc/qcom/Makefile +0 -0
index 40c56f6..2bf8d93 100644
@@ -10,3 +10,4 @@ obj-$(CONFIG_QCOM_SMEM_STATE) +=

smem_state.o

Quoted 13 lines

drivers/soc/qcom/kryo-l2-accessors.c line 2

Quoted 13 lines
drivers/soc/qcom/Makefile +1 -0
 obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+obj-$(CONFIG_ARCH_MSM8996) +=	kryo-l2-accessors.o
drivers/soc/qcom/kryo-l2-accessors.c new file +2 -0
new file mode 100644
index 0000000..6be57e6
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2014-2015, 2017, The Linux Foundation. All rights

reserved.

Quoted 102 lines
Quoted 102 lines
drivers/soc/qcom/kryo-l2-accessors.c new file +61 -0
+ *
+ * This program is free software; you can redistribute it and/or
+modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/spinlock.h>
+#include <asm/sysreg.h>
+#include <soc/qcom/kryo-l2-accessors.h>
+
+#define L2CPUSRSELR_EL1         sys_reg(3, 3, 15, 0, 6)
+#define L2CPUSRDR_EL1           sys_reg(3, 3, 15, 0, 7)
+
+static DEFINE_RAW_SPINLOCK(l2_access_lock);
+
+/**
+ * set_l2_indirect_reg: write value to an L2 register
+ * @reg: Address of L2 register.
+ * @value: Value to be written to register.
+ *
+ * Use architecturally required barriers for ordering between system
+register
+ * accesses, and system registers with respect to device memory  */
+void set_l2_indirect_reg(u64 reg, u64 val) {
+	unsigned long flags;
+	mb();
+	raw_spin_lock_irqsave(&l2_access_lock, flags);
+	write_sysreg_s(reg, L2CPUSRSELR_EL1);
+	isb();
+	write_sysreg_s(val, L2CPUSRDR_EL1);
+	isb();
+	raw_spin_unlock_irqrestore(&l2_access_lock, flags); }
+EXPORT_SYMBOL(set_l2_indirect_reg);
+
+/**
+ * get_l2_indirect_reg: read an L2 register value
+ * @reg: Address of L2 register.
+ *
+ * Use architecturally required barriers for ordering between system
+register
+ * accesses, and system registers with respect to device memory  */
+u64 get_l2_indirect_reg(u64 reg)
+{
+	u64 val;
+	unsigned long flags;
+
+	raw_spin_lock_irqsave(&l2_access_lock, flags);
+	write_sysreg_s(reg, L2CPUSRSELR_EL1);
+	isb();
+	val = read_sysreg_s(L2CPUSRDR_EL1);
+	raw_spin_unlock_irqrestore(&l2_access_lock, flags);
+
+	return val;
+}
+EXPORT_SYMBOL(get_l2_indirect_reg);
include/soc/qcom/kryo-l2-accessors.h new file +26 -1
new file mode 100644
index 0000000..2bebce1
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H
+#define __ASM_ARCH_MSM_MSM_KRYO_L2_ACCESSORS_H
+
+#ifdef CONFIG_ARCH_QCOM
+void set_l2_indirect_reg(u64 reg_addr, u64 val);
+u64 get_l2_indirect_reg(u64 reg_addr); #else static inline void
+set_l2_indirect_reg(u32 reg_addr, u32 val) {} static inline u32
+get_l2_indirect_reg(u32 reg_addr) {
+	return 0;
+}
+#endif
+#endif
--

1.9.1

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

maintainer
#3 lore raw

PATCH 1/1 soc: qcom: Separate kryo l2 accessors from PMU driver

Quoted 22 lines · ilialin at codeaurora.org

Hello Mark,

Quoted 20 lines

-----Original Message-----
From: Mark Rutland [mailto:mark.rutland at arm.com]
Sent: Tuesday, December 5, 2017 12:35 PM
To: Ilia Lin <[email protected]>
Cc: linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH] soc: qcom: Separate kryo l2 accessors from PMU driver

Hi,

Quoted 9 lines · Ilia Lin

The driver provides kernel level API for other drivers to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and making it public to allow other drivers use it.
The accesses must be separated with a single spinlock, maintained in this driver.

Change-Id I2865e888491e85d678e298279400c371427e30ea
Signed-off-by Ilia Lin <[email protected]>
Quoted 8 lines
Quoted 3 lines

What other driver is going to use this?

Until there is another driver, I don't see much point in factoring this

out.

The other driver currently is the CPU clock driver, which needs configuring the L2 registers. The clock driver will be submitted through the linux-clk list and will depend on the kryo-l2-accessors driver then.

Ok,

Please put the two in a series, and keep me (and Will Deacon) on Cc, so that we can review both together.

Thanks,
Mark.

author
#4 lore raw

PATCH 1/1 soc: qcom: Separate kryo l2 accessors from PMU driver

Hello Mark,

Do you mean, I should send them as a single series to both lists?

Thanks,
Ilia

Quoted 7 lines

-----Original Message-----
From: Mark Rutland [mailto:mark.rutland at arm.com]
Sent: Tuesday, December 5, 2017 1:51 PM
To: ilialin at codeaurora.org
Cc: linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH] soc: qcom: Separate kryo l2 accessors from PMU driver

Quoted 34 lines
Quoted 33 lines · ilialin at codeaurora.org

Hello Mark,

Quoted 19 lines

-----Original Message-----
From: Mark Rutland [mailto:mark.rutland at arm.com]
Sent: Tuesday, December 5, 2017 12:35 PM
To: Ilia Lin <[email protected]>
Cc: linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH] soc: qcom: Separate kryo l2 accessors from PMU driver

Hi,

Quoted 8 lines · Ilia Lin

The driver provides kernel level API for other drivers to access the
MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and making it public to allow other drivers use it.
The accesses must be separated with a single spinlock, maintained in this driver.

Quoted 7 lines
Quoted 2 lines
Change-Id I2865e888491e85d678e298279400c371427e30ea
Signed-off-by Ilia Lin <[email protected]>

What other driver is going to use this?

Until there is another driver, I don't see much point in factoring this

out.

The other driver currently is the CPU clock driver, which needs configuring the L2 registers. The clock driver will be submitted through the linux-clk list and will depend on the kryo-l2-accessors

driver

Quoted 5 lines

then.

Ok,

Please put the two in a series, and keep me (and Will Deacon) on Cc, so

that

Quoted 4 lines

we can review both together.

Thanks,
Mark.

maintainer
#5 lore raw

PATCH 1/1 soc: qcom: Separate kryo l2 accessors from PMU driver

Quoted 3 lines · ilialin at codeaurora.org

Hello Mark,

Do you mean, I should send them as a single series to both lists?

Yes please, with both myself adn Will Deacon explicitly CC'd.

Thanks,
Mark.