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arm: npcm: add basic support for Nuvoton BMCs

PATCH Superseded Tomer Maimon 1 participant 5 messages Dec 18, 2017

Subsystems (4)

v3 of 12 Superseded Latest is v12 →

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Tomer Maimon

author maintainer
#0 lore raw

v3 cover arm: npcm: add basic support for Nuvoton BMCs

Changes since version 2:
- Update GPL licence message
- Creating defconfig with make tool and patch it with is own patch

Changes since version 1:
- Add dt-binding documentation to NPCM
- Add dt-binding documentation to npcm7xx-smp

This patch set adds support for the Nuvoton NPCM Baseboard Management Controller (BMC) SoC architecture as well as the NPCM750 variant. NPCM is an ARM based SoC with external DDR RAM and supports a large set of peripherals.

The NPCM750 is based on Cortex A9 and comes in single core and dual core flavors.

The device tree added in this patchset has a number of bindings for which the corresponding drivers will be sent out later and thus do not yet have binding documentation. Apologies in advance if you would like the bindings to be added along with the corresponding drivers.

this patch set based on Brendan Higgins patcehs.
https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=170155

Thanks!

Tomer Maimon (4):
arm: npcm: add basic support for Nuvoton BMCs
arm: npcm: add configuration for EVB based NPCM7xx BMC
arm: dts: add Nuvoton NPCM750 device tree
MAINTAINERS: Add entry for Nuvoton NPCM architecture

 .../arm/cpu-enable-method/nuvoton,npcm7xx-smp      |   42 +
 .../devicetree/bindings/arm/npcm/npcm.txt          |    6 +
 MAINTAINERS                                        |   13 +
 arch/arm/Kconfig                                   |    2 +
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/nuvoton-npcm750-evb.dts          |  467 ++++++++
 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi        |  876 ++++++++++++++
 arch/arm/boot/dts/nuvoton-npcm750.dtsi             | 1189 ++++++++++++++++++++
 arch/arm/configs/poleg_svb_defconfig               |  105 ++
 arch/arm/mach-npcm/Kconfig                         |   61 +
 arch/arm/mach-npcm/Makefile                        |    6 +
 arch/arm/mach-npcm/headsmp.S                       |   21 +
 arch/arm/mach-npcm/npcm7xx.c                       |   26 +
 arch/arm/mach-npcm/platsmp.c                       |   85 ++
 14 files changed, 2900 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/cpu-enable-method/nuvoton,npcm7xx-smp
 create mode 100644 Documentation/devicetree/bindings/arm/npcm/npcm.txt
 create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-evb.dts
 create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
 create mode 100755 arch/arm/boot/dts/nuvoton-npcm750.dtsi
 create mode 100644 arch/arm/configs/poleg_svb_defconfig
 create mode 100644 arch/arm/mach-npcm/Kconfig
 create mode 100644 arch/arm/mach-npcm/Makefile
 create mode 100644 arch/arm/mach-npcm/headsmp.S
 create mode 100644 arch/arm/mach-npcm/npcm7xx.c
 create mode 100644 arch/arm/mach-npcm/platsmp.c
Signature · 1 line
2.14.1
author maintainer
#1 lore raw

PATCH v3 1/4 arm: npcm: add basic support for Nuvoton BMCs

Adds basic support for the Nuvoton NPCM750 BMC.

Based on [v8,1/3] arm: npcm: add basic support for Nuvoton BMCs patch:
Brendan Higgins : - https://patchwork.kernel.org/patch/10063409/

---
 arch/arm/Kconfig             |  2 ++
 arch/arm/Makefile            |  1 +
 arch/arm/mach-npcm/Kconfig   | 61 +++++++++++++++++++++++++++++++
 arch/arm/mach-npcm/Makefile  |  6 ++++
 arch/arm/mach-npcm/headsmp.S | 21 +++++++++++
 arch/arm/mach-npcm/npcm7xx.c | 26 ++++++++++++++
 arch/arm/mach-npcm/platsmp.c | 85 ++++++++++++++++++++++++++++++++++++++++++++
 7 files changed, 202 insertions(+)
 create mode 100644 arch/arm/mach-npcm/Kconfig
 create mode 100644 arch/arm/mach-npcm/Makefile
 create mode 100644 arch/arm/mach-npcm/headsmp.S
 create mode 100644 arch/arm/mach-npcm/npcm7xx.c
 create mode 100644 arch/arm/mach-npcm/platsmp.c
arch/arm/Kconfig +2 -0
index 61a0cb15067e..05543f1cfbde 100644
@@ -782,6 +782,8 @@ source "arch/arm/mach-netx/Kconfig"
 
 source "arch/arm/mach-nomadik/Kconfig"
 
+source "arch/arm/mach-npcm/Kconfig"
+
 source "arch/arm/mach-nspire/Kconfig"
 
 source "arch/arm/plat-omap/Kconfig"
arch/arm/Makefile +1 -0
index 47d3a1ab08d2..60ca50c7d762 100644
@@ -191,6 +191,7 @@ machine-$(CONFIG_ARCH_MEDIATEK)		+= mediatek
 machine-$(CONFIG_ARCH_MXS)		+= mxs
 machine-$(CONFIG_ARCH_NETX)		+= netx
 machine-$(CONFIG_ARCH_NOMADIK)		+= nomadik
+machine-$(CONFIG_ARCH_NPCM)		+= npcm
 machine-$(CONFIG_ARCH_NSPIRE)		+= nspire
 machine-$(CONFIG_ARCH_OXNAS)		+= oxnas
 machine-$(CONFIG_ARCH_OMAP1)		+= omap1
arch/arm/mach-npcm/Kconfig new file +61 -0

61 lines not on this page · raw message

arch/arm/mach-npcm/Makefile new file +6 -0
new file mode 100644
index 000000000000..37f05e4bd0b3
@@ -0,0 +1,6 @@
+AFLAGS_headsmp.o		+= -march=armv7-a
+
+obj-$(CONFIG_ARCH_NPCM7XX)	+= npcm7xx.o
+obj-$(CONFIG_ARCH_NPCM750)	+= platsmp.o headsmp.o
+
+
arch/arm/mach-npcm/headsmp.S new file +21 -0
new file mode 100644
index 000000000000..1746a780a69e
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2014-2017 Nuvoton Technology corporation.
+ * Copyright 2017 Google, Inc.
+ *
+ * Released under the GPLv2 only.
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/assembler.h>
+
+/*
+ * The boot ROM does not start secondary CPUs in SVC mode, so we need to do that
+ * here.
+ */
+ENTRY(npcm7xx_secondary_startup)
+	safe_svcmode_maskall r0
+
+	b	secondary_startup
+ENDPROC(npcm7xx_secondary_startup)
arch/arm/mach-npcm/npcm7xx.c new file +26 -0
new file mode 100644
index 000000000000..ecef5c649a1a
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2014-2017 Nuvoton Technology corporation.
+ * Copyright 2017 Google, Inc.
+ *
+ * Released under the GPLv2 only.
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/cache-l2x0.h>
+
+static const char *const npcm7xx_dt_match[] = {
+	"nuvoton,npcm750",
+	NULL
+};
+
+DT_MACHINE_START(NPCM7XX_DT, "NPCM7XX Chip family")
+	.atag_offset	= 0x100,
+	.dt_compat	= npcm7xx_dt_match,
+	.l2c_aux_val	= 0x0,
+	.l2c_aux_mask	= ~0x0,
+MACHINE_END
arch/arm/mach-npcm/platsmp.c new file +85 -0

85 lines not on this page · raw message

Signature · 1 line
2.14.1
author maintainer
#2 lore raw

PATCH v3 2/4 arm: npcm: add configuration for EVB based NPCM7xx BMC

In reply to Tomer Maimon

add configuration definition for evaluation board based NPCM7xx (Poleg) BMC

---
 arch/arm/configs/poleg_svb_defconfig | 105 +++++++++++++++++++++++++++++++++++
 1 file changed, 105 insertions(+)
 create mode 100644 arch/arm/configs/poleg_svb_defconfig
arch/arm/configs/poleg_svb_defconfig new file +105 -0
new file mode 100644
index 000000000000..465da49bb400
@@ -0,0 +1,105 @@
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_LOG_BUF_SHIFT=21
+CONFIG_CGROUPS=y
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_DEFAULT_DEADLINE=y
+CONFIG_ARCH_NPCM=y
+CONFIG_ARCH_NPCM7XX=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 initrd=0x1d00000,6000000 ramdisk_size=24000 mem=64M"
+CONFIG_BINFMT_MISC=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_NUVOTON=y
+CONFIG_OF_OVERLAY=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_NPCM750_EMC_ETH=y
+CONFIG_STMMAC_ETH=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_SERIAL_NPCMX50=y
+CONFIG_SERIAL_NPCMX50_CONSOLE=y
+CONFIG_NPCM750_OTP=y
+CONFIG_NPCM750_OTP_WRITE_ENABLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_NPCMX50=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_SENSORS_LM75=y
+CONFIG_SENSORS_TMP102=y
+CONFIG_SENSORS_NPCM750=y
+CONFIG_WATCHDOG=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_NPCMX50_USB2=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_EDM_KBD_MOUSE=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_NPCM750=y
+CONFIG_IIO=y
+CONFIG_NPCM750_ADC=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_ROMFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_CIFS=y
+CONFIG_CIFS_XATTR=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_REDUCED=y
+CONFIG_READABLE_ASM=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_DEV_NPCMX50=y
+CONFIG_ARM_CRYPTO=y
Signature · 1 line
2.14.1
author maintainer
#3 lore raw

PATCH v3 3/4 arm: dts: add Nuvoton NPCM750 device tree

In reply to Tomer Maimon

Add full device tree for all Nuvoton NPCM750 BMCs and a board specific device tree for the NPCM750 (Poleg) evaluation board.

Based on [v8,2/3] arm: dts: add Nuvoton NPCM750 device tree patch:
Brendan Higgins : - https://patchwork.kernel.org/patch/10063497/

---
 .../arm/cpu-enable-method/nuvoton,npcm7xx-smp      |   42 +
 .../devicetree/bindings/arm/npcm/npcm.txt          |    6 +
 arch/arm/boot/dts/nuvoton-npcm750-evb.dts          |  467 ++++++++
 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi        |  876 ++++++++++++++
 arch/arm/boot/dts/nuvoton-npcm750.dtsi             | 1189 ++++++++++++++++++++
 5 files changed, 2580 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/cpu-enable-method/nuvoton,npcm7xx-smp
 create mode 100644 Documentation/devicetree/bindings/arm/npcm/npcm.txt
 create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-evb.dts
 create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
 create mode 100755 arch/arm/boot/dts/nuvoton-npcm750.dtsi
Documentation/devicetree/bindings/arm/cpu-enable-method/nuvoton,npcm7xx-smp new file +42 -0
new file mode 100644
index 000000000000..e81f85b400cf
@@ -0,0 +1,42 @@
+=========================================================
+Secondary CPU enable-method "nuvoton,npcm7xx-smp" binding
+=========================================================
+
+To apply to all CPUs, a single "nuvoton,npcm7xx-smp" enable method should be
+defined in the "cpus" node.
+
+Enable method name:	"nuvoton,npcm7xx-smp"
+Compatible machines:	"nuvoton,npcm750"
+Compatible CPUs:	"arm,cortex-a9"
+Related properties:	(none)
+
+Note:
+This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
+"nuvoton,npcm750-gcr".
+
+Example:
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "nuvoton,npcm7xx-smp";
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			clocks = <&clk NPCM7XX_CLK_CPU>;
+			clock-names = "clk_cpu";
+			reg = <0>;
+			next-level-cache = <&L2>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			clocks = <&clk NPCM7XX_CLK_CPU>;
+			clock-names = "clk_cpu";
+			reg = <1>;
+			next-level-cache = <&L2>;
+		};
+	};
+
Documentation/devicetree/bindings/arm/npcm/npcm.txt new file +6 -0
new file mode 100644
index 000000000000..2d87d9ecea85
@@ -0,0 +1,6 @@
+NPCM Platforms Device Tree Bindings
+-----------------------------------
+NPCM750 SoC
+Required root node properties:
+	- compatible = "nuvoton,npcm750";
+
arch/arm/boot/dts/nuvoton-npcm750-evb.dts new file +467 -0

467 lines not on this page · raw message

arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi new file +876 -0

876 lines not on this page · raw message

arch/arm/boot/dts/nuvoton-npcm750.dtsi new file +1189 -0

1,189 lines not on this page · raw message

Signature · 1 line
2.14.1
author maintainer
#4 lore raw

PATCH v3 4/4 MAINTAINERS: Add entry for Nuvoton NPCM architecture

In reply to Tomer Maimon

Add maintainers and reviewers for Nuvoton NPCM architecture

Based on [v8,3/3] MAINTAINERS: Add entry for Nuvoton NPCM architecture patch:
Brendan Higgins : - https://patchwork.kernel.org/patch/10063413/

---
 MAINTAINERS | 13 +++++++++++++
 1 file changed, 13 insertions(+)
MAINTAINERS +13 -0
index 1c3feffb1c1c..9b90748b729d 100644
@@ -1598,6 +1598,19 @@ F:	drivers/pinctrl/nomadik/
 F:	drivers/i2c/busses/i2c-nomadik.c
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
 
+ARM/NUVOTON NPCM ARCHITECTURE
+M:	Avi Fishman <[email protected]>
+M:	Tomer Maimon <[email protected]>
+R:	Brendan Higgins <[email protected]>
+R:	Rick Altherr <[email protected]>
+L:	[email protected] (moderated for non-subscribers)
+S:	Supported
+F:	arch/arm/mach-npcm/
+F:	arch/arm/boot/dts/nuvoton-npcm*
+F:	include/dt-bindings/clock/nuvoton,npcm7xx-clks.h
+F:	drivers/*/*npcm*
+F:	Documentation/*/*npcm*
+
 ARM/NUVOTON W90X900 ARM ARCHITECTURE
 M:	Wan ZongShun <[email protected]>
 L:	[email protected] (moderated for non-subscribers)
Signature · 1 line
2.14.1