mtd: npcm: add NPCM7xx spi-nor driver
Subsystems (4)
Tomer Maimon
maintainerv2 cover mtd: npcm: add NPCM7xx spi-nor driver
Changes since version 1:
- Modify erase spinor command.
This patch set adds serial Peripheral interface (SPI) Flash interface unit (FIU) support for the Nuvoton NPCM7xx Baseboard Management Controller (BMC).
Nuvoton NPCM7xx have two SPI nor modules,
first module support 2 chip select
second module support 4 chip select
Tomer Maimon (2):
dt-binding: mtd: document NPCM7xx SPI DT bindings
mtd: npcm: add NPCM7xx spi driver
Documentation/devicetree/bindings/mtd/npcm-spi.txt | 31 + drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 3 +- drivers/mtd/spi-nor/npcm-spi.c | 1208 ++++++++++++++++++++ 4 files changed, 1248 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/mtd/npcm-spi.txt create mode 100644 drivers/mtd/spi-nor/npcm-spi.c
Signature · 1 line
2.14.1
Tomer Maimon
maintainerPATCH v2 1/2 dt-binding: mtd: document NPCM7xx SPI DT bindings
Added device tree binding documentation for Nuvoton NPCM7xx Serial Peripheral Interface (SPI) NOR
--- Documentation/devicetree/bindings/mtd/npcm-spi.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/npcm-spi.txt
Documentation/devicetree/bindings/mtd/npcm-spi.txt new file +31 -0
@@ -0,0 +1,31 @@ +* Nuvoton Serial Peripheral Interface(SPI) + +Required properties: + - compatible : "nuvoton,npcm750-spi" for NPCM750 BMC + - #address-cells : should be 1. + - #size-cells : should be 0. + - reg : the first contains the register location and length, + the second contains the memory mapping address and length + - reg-names: Should contain the reg names "control" and "memory" + - clocks : phandle of SPI reference clock. + +Optional properties: + - chip-max-address-map: Chip maximum address mapping for direct use. + the maximum address map size: + NPCM7xx - 0x8000000 (128Mb) + +Example: + +spi0: spi@fb000000 { + compatible = "nuvoton,npcm750-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>; + reg-names = "control", "memory"; + chip-max-address-map = <0x8000000>; + clocks = <&clk NPCM7XX_CLK_AHB>; + spi-nor@0 { + ... + }; +}; +
Signature · 1 line
2.14.1
Tomer Maimon
maintainerPATCH v2 2/2 mtd: npcm: add NPCM7xx spi driver
In reply to Tomer MaimonAdd Nuvoton BMC NPCM7xx serial Peripheral interface (SPI) Flash interface unit (FIU) driver
Nuvoton NPCM7xx have two SPI nor modules,
first module support 2 chip select
second module support 4 chip select
--- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 3 +- drivers/mtd/spi-nor/npcm-spi.c | 1208 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1217 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/spi-nor/npcm-spi.c
drivers/mtd/spi-nor/Kconfig +7 -0
@@ -113,4 +113,11 @@ config SPI_STM32_QUADSPI This enables support for the STM32 Quad SPI controller. We only connect the NOR to this controller. +config SPI_NPCM + tristate "NPCM SPI controller" + depends on ARCH_NPCM || COMPILE_TEST + help + This enables support for the SPI controller in master mode. + We only connect the NOR to this controller now. + endif # MTD_SPI_NOR
drivers/mtd/spi-nor/Makefile +2 -1
@@ -8,4 +8,5 @@ obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o -obj-$(CONFIG_SPI_STM32_QUADSPI) += stm32-quadspi.o +obj-$(CONFIG_SPI_STM32_QUADSPI) += stm32-quadspi.o +obj-$(CONFIG_SPI_NPCM) += npcm-spi.o
drivers/mtd/spi-nor/npcm-spi.c new file +1208 -0
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Signature · 1 line
2.14.1