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ARM: dts: Add Aspeed SoC USB controllers to device-tree

PATCH New Benjamin Herrenschmidt 3 participants 5 messages Jan 12, 2018 – Mar 28, 2018

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Device tree bindings Arm/Aspeed machine support
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Benjamin Herrenschmidt

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#0 lore raw

PATCH v2 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

This adds the USB controllers to the DT template of the AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific .dts yet. This will be done when we have the necessary clock/reset and pinmux support. In the meantime though, this will work if u-boot configures things properly.

For the AST2400 I only added pinmux definition for port 1 which is dual USB1/USB2. There are additional USB1 only ports that might require more work but I don't have HW to test at hand so I'm leaving that to whoever cares.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

---

v2: Previous patch was missing actually adding the nodes
(which was an old patch in my tree I had forgotten to merge).

 arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
arch/arm/boot/dts/aspeed-g4.dtsi +27 -0
index b0d8431a3700..e55f2ad5de59 100644
@@ -103,6 +103,23 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2400-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2400-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <3>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;

@@ -1227,6 +1244,16 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2h_default: usb2h_default {
+		function = "USB2H1";
+		groups = "USB2H1";
+	};
+
+	pinctrl_usb2d_default: usb2d_default {
+		function = "USB2D1";
+		groups = "USB2D1";
+	};
+
 	pinctrl_vgabios_rom_default: vgabios_rom_default {
 		function = "VGABIOS_ROM";
 		groups = "VGABIOS_ROM";
arch/arm/boot/dts/aspeed-g5.dtsi +40 -0
index 40de3b66c33f..655258edee24 100644
@@ -138,6 +138,31 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		ehci1: usb at 1e6a3000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a3000 0x100>;
+			interrupts = <13>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2500-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <2>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;

@@ -1358,6 +1383,21 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2ah_default: usb2ah_default {
+		function = "USB2AH";
+		groups = "USB2AH";
+	};
+
+	pinctrl_usb11bhid_default: usb11bhid_default {
+		function = "USB11BHID";
+		groups = "USB11BHID";
+	};
+
+	pinctrl_usb2bh_default: usb2bh_default {
+		function = "USB2BH";
+		groups = "USB2BH";
+	};
+
 	pinctrl_vgabiosrom_default: vgabiosrom_default {
 		function = "VGABIOSROM";
 		groups = "VGABIOSROM";
maintainer
#1 lore raw

PATCH v2 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

Quoted 8 lines · Benjamin Herrenschmidt

This adds the USB controllers to the DT template of the AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific .dts yet. This will be done when we have the necessary clock/reset and pinmux support. In the meantime though, this will work if u-boot configures things properly.

Quoted 6 lines

For the AST2400 I only added pinmux definition for port 1 which is dual USB1/USB2. There are additional USB1 only ports that might require more work but I don't have HW to test at hand so I'm leaving that to whoever cares.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

Andrew, can you check the pinmux stuff for us please?

The other parts look good.

Cheers,

Joel

Quoted 119 lines

---

v2: Previous patch was missing actually adding the nodes
(which was an old patch in my tree I had forgotten to merge).

 arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
arch/arm/boot/dts/aspeed-g4.dtsi +27 -0
index b0d8431a3700..e55f2ad5de59 100644
@@ -103,6 +103,23 @@
                        status = "disabled";
                };
 
+               ehci0: usb at 1e6a1000 {
+                       compatible = "aspeed,ast2400-ehci", "generic-ehci";
+                       reg = <0x1e6a1000 0x100>;
+                       interrupts = <5>;
+                       clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+                       status = "disabled";
+               };
+
+               uhci: usb at 1e6b0000 {
+                       compatible = "aspeed,ast2400-uhci", "generic-uhci";
+                       reg = <0x1e6b0000 0x100>;
+                       interrupts = <14>;
+                       #ports = <3>;
+                       clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+                       status = "disabled";
+               };
+
                apb {
                        compatible = "simple-bus";
                        #address-cells = <1>;

@@ -1227,6 +1244,16 @@
                groups = "USBCKI";
        };
 
+       pinctrl_usb2h_default: usb2h_default {
+               function = "USB2H1";
+               groups = "USB2H1";
+       };
+
+       pinctrl_usb2d_default: usb2d_default {
+               function = "USB2D1";
+               groups = "USB2D1";
+       };
+
        pinctrl_vgabios_rom_default: vgabios_rom_default {
                function = "VGABIOS_ROM";
                groups = "VGABIOS_ROM";
arch/arm/boot/dts/aspeed-g5.dtsi +40 -0
index 40de3b66c33f..655258edee24 100644
@@ -138,6 +138,31 @@
                        status = "disabled";
                };
 
+               ehci0: usb at 1e6a1000 {
+                       compatible = "aspeed,ast2500-ehci", "generic-ehci";
+                       reg = <0x1e6a1000 0x100>;
+                       interrupts = <5>;
+                       clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+                       status = "disabled";
+               };
+
+               ehci1: usb at 1e6a3000 {
+                       compatible = "aspeed,ast2500-ehci", "generic-ehci";
+                       reg = <0x1e6a3000 0x100>;
+                       interrupts = <13>;
+                       clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
+                       status = "disabled";
+               };
+
+               uhci: usb at 1e6b0000 {
+                       compatible = "aspeed,ast2500-uhci", "generic-uhci";
+                       reg = <0x1e6b0000 0x100>;
+                       interrupts = <14>;
+                       #ports = <2>;
+                       clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+                       status = "disabled";
+               };
+
                apb {
                        compatible = "simple-bus";
                        #address-cells = <1>;

@@ -1358,6 +1383,21 @@
                groups = "USBCKI";
        };
 
+       pinctrl_usb2ah_default: usb2ah_default {
+               function = "USB2AH";
+               groups = "USB2AH";
+       };
+
+       pinctrl_usb11bhid_default: usb11bhid_default {
+               function = "USB11BHID";
+               groups = "USB11BHID";
+       };
+
+       pinctrl_usb2bh_default: usb2bh_default {
+               function = "USB2BH";
+               groups = "USB2BH";
+       };
+
        pinctrl_vgabiosrom_default: vgabiosrom_default {
                function = "VGABIOSROM";
                groups = "VGABIOSROM";

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#2 lore raw

PATCH v2 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

In reply to Benjamin Herrenschmidt
Quoted 35 lines · Benjamin Herrenschmidt

This adds the USB controllers to the DT template of the AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific .dts yet. This will be done when we have the necessary clock/reset and pinmux support. In the meantime though, this will work if u-boot configures things properly.

For the AST2400 I only added pinmux definition for port 1 which is dual USB1/USB2. There are additional USB1 only ports that might require more work but I don't have HW to test at hand so I'm leaving that to whoever cares.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

---

v2: Previous patch was missing actually adding the nodes
(which was an old patch in my tree I had forgotten to merge).

 arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
arch/arm/boot/dts/aspeed-g4.dtsi +3 -0
index b0d8431a3700..e55f2ad5de59 100644
@@ -103,6 +103,23 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2400-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;

arch/arm/boot/dts/aspeed-g4.dtsi line 118

Quoted 10 lines
arch/arm/boot/dts/aspeed-g4.dtsi +10 -0
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2400-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <3>;

I tried to find the documentation for the #ports property, but it seems to not exist. Couldn't find any users either, but maybe I didn't look broadly enough. It is tested for in drivers/usb/host/uhci-platform.c though, so I guess it's functional.

Quoted 72 lines
arch/arm/boot/dts/aspeed-g4.dtsi +14 -0
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;

@@ -1227,6 +1244,16 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2h_default: usb2h_default {
+		function = "USB2H1";
+		groups = "USB2H1";
+	};
+
+	pinctrl_usb2d_default: usb2d_default {
+		function = "USB2D1";
+		groups = "USB2D1";
+	};
+
 	pinctrl_vgabios_rom_default: vgabios_rom_default {
 		function = "VGABIOS_ROM";
 		groups = "VGABIOS_ROM";
arch/arm/boot/dts/aspeed-g5.dtsi +33 -0
index 40de3b66c33f..655258edee24 100644
@@ -138,6 +138,31 @@
 			status = "disabled";
 		};
 
+		ehci0: usb at 1e6a1000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a1000 0x100>;
+			interrupts = <5>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
+			status = "disabled";
+		};
+
+		ehci1: usb at 1e6a3000 {
+			compatible = "aspeed,ast2500-ehci", "generic-ehci";
+			reg = <0x1e6a3000 0x100>;
+			interrupts = <13>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
+			status = "disabled";
+		};
+
+		uhci: usb at 1e6b0000 {
+			compatible = "aspeed,ast2500-uhci", "generic-uhci";
+			reg = <0x1e6b0000 0x100>;
+			interrupts = <14>;
+			#ports = <2>;
+			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
+			status = "disabled";
+		};
+
 		apb {
 			compatible = "simple-bus";
 			#address-cells = <1>;

@@ -1358,6 +1383,21 @@
 		groups = "USBCKI";
 	};
 
+	pinctrl_usb2ah_default: usb2ah_default {
+		function = "USB2AH";
+		groups = "USB2AH";
+	};
+
+	pinctrl_usb11bhid_default: usb11bhid_default {
+		function = "USB11BHID";
+		groups = "USB11BHID";

arch/arm/boot/dts/aspeed-g5.dtsi line 1403

Quoted 10 lines
arch/arm/boot/dts/aspeed-g5.dtsi +7 -0
+	};
+
+	pinctrl_usb2bh_default: usb2bh_default {
+		function = "USB2BH";
+		groups = "USB2BH";
+	};
+
 	pinctrl_vgabiosrom_default: vgabiosrom_default {
 		function = "VGABIOSROM";
 		groups = "VGABIOSROM";
Reviewed-by Andrew Jeffery <[email protected]>
Quoted 6 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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author
#3 lore raw

PATCH v2 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

Quoted 10 lines · Andrew Jeffery

arch/arm/boot/dts/aspeed-g4.dtsi line 118

Quoted 5 lines
arch/arm/boot/dts/aspeed-g4.dtsi +5 -0
+             uhci: usb at 1e6b0000 {
+                     compatible = "aspeed,ast2400-uhci", "generic-uhci";
+                     reg = <0x1e6b0000 0x100>;
+                     interrupts = <14>;
+                     #ports = <3>;

I tried to find the documentation for the #ports property, but it seems to not exist. Couldn't find any users either, but maybe I didn't look broadly enough. It is tested for in drivers/usb/host/uhci-platform.c though, so I guess it's functional.

I added it to uhci-platform back when that was merged but forgot to update the binding. I'll send a separate patch for that.

Cheers,
Ben.

maintainer
#4 lore raw

PATCH v2 1/2 ARM: dts: Add Aspeed SoC USB controllers to device-tree

In reply to Andrew Jeffery
Quoted 21 lines · Andrew Jeffery
Quoted 20 lines · Benjamin Herrenschmidt

This adds the USB controllers to the DT template of the AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific .dts yet. This will be done when we have the necessary clock/reset and pinmux support. In the meantime though, this will work if u-boot configures things properly.

For the AST2400 I only added pinmux definition for port 1 which is dual USB1/USB2. There are additional USB1 only ports that might require more work but I don't have HW to test at hand so I'm leaving that to whoever cares.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

---

v2: Previous patch was missing actually adding the nodes
(which was an old patch in my tree I had forgotten to merge).

Quoted 5 lines
Quoted 3 lines
 arch/arm/boot/dts/aspeed-g4.dtsi | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
Reviewed-by Andrew Jeffery <[email protected]>

This one also slipped through the cracks. I have applied it to the aspeed tree with Andrew's review.

Cheers,

Joel