Patch "mmc: sdhci-of-esdhc: disable SD clock for clock value 0" has been added to the 4.14-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
mmc: sdhci-of-esdhc: disable SD clock for clock value 0
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mmc-sdhci-of-esdhc-disable-sd-clock-for-clock-value-0.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
dd3f6983b4a468efca9e8caa0e2b4aa20946d801Mon Sep 17 00:00:00 2001
From: yangbo lu <[email protected]>
Date: Thu, 21 Sep 2017 16:43:31 +0800
Subject: mmc: sdhci-of-esdhc: disable SD clock for clock value 0
From: yangbo lu <[email protected]>
commit dd3f6983b4a468efca9e8caa0e2b4aa20946d801 upstream.
SD clock should be disabled for clock value 0. It's not right to just return. This may cause failure of signal voltage switching.
--- drivers/mmc/host/sdhci-of-esdhc.c | 58 +++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 28 deletions(-)
drivers/mmc/host/sdhci-of-esdhc.c +30 -28
@@ -458,6 +458,33 @@ static unsigned int esdhc_of_get_min_cloreturn clock /256 /16 ; } +static void esdhc_clock_enable (struct sdhci_host *host,bool enable) +{ +u32 val; +ktime_t timeout; + + val =sdhci_readl (host,ESDHC_SYSTEM_CONTROL ); + +if (enable) + val |=ESDHC_CLOCK_SDCLKEN ; +else + val &= ~ESDHC_CLOCK_SDCLKEN ; + +sdhci_writel (host, val,ESDHC_SYSTEM_CONTROL ); + +/* Wait max 20 ms */ + timeout =ktime_add_ms (ktime_get (),20 ); + val =ESDHC_CLOCK_STABLE ; +while (!(sdhci_readl (host,ESDHC_PRSSTAT ) & val)) { +if (ktime_after (ktime_get (), timeout)) { +pr_err ("%s: Internal clock never stabilised.\n" , +mmc_hostname (host->mmc)); +break ; + } +udelay (10 ); + } +} +static void esdhc_of_set_clock (struct sdhci_host *host,unsigned int clock) {struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host);
@@ -469,8 +496,10 @@ static void esdhc_of_set_clock(struct sd host->mmc->actual_clock =0 ; -if (clock ==0 ) +if (clock ==0 ) { +esdhc_clock_enable (host, false);return ; + }/* Workaround to start pre_div at 2 for VNN < VENDOR_V_23 */ if (esdhc->vendor_ver <VENDOR_V_23 )
@@ -558,33 +587,6 @@ static void esdhc_pltfm_set_bus_width(stsdhci_writel (host, ctrl,ESDHC_PROCTL ); } -static void esdhc_clock_enable (struct sdhci_host *host,bool enable) -{ -u32 val; -ktime_t timeout; - - val =sdhci_readl (host,ESDHC_SYSTEM_CONTROL ); - -if (enable) - val |=ESDHC_CLOCK_SDCLKEN ; -else - val &= ~ESDHC_CLOCK_SDCLKEN ; - -sdhci_writel (host, val,ESDHC_SYSTEM_CONTROL ); - -/* Wait max 20 ms */ - timeout =ktime_add_ms (ktime_get (),20 ); - val =ESDHC_CLOCK_STABLE ; -while (!(sdhci_readl (host,ESDHC_PRSSTAT ) & val)) { -if (ktime_after (ktime_get (), timeout)) { -pr_err ("%s: Internal clock never stabilised.\n" , -mmc_hostname (host->mmc)); -break ; - } -udelay (10 ); - } -} -static void esdhc_reset (struct sdhci_host *host,u8 mask) {sdhci_reset (host, mask);
Patches currently in stable-queue which might be from [email protected] are
queue-4.14/mmc-sdhci-of-esdhc-fix-the-mmc-error-after-sleep-on-ls1046ardb.patch queue-4.14/mmc-sdhci-of-esdhc-disable-sd-clock-for-clock-value-0.patch