Patch "ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context" has been added to the 4.4-stable tree
Subsystems (5)
This is a note to let you know that I've just added the patch titled
ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-omap2-fix-sram-virt-to-phys-translation-for-save_secure_ram_context.patch
and it can be found in the queue-4.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From foo@baz Fri Feb 23 11:58:50 CET 2018
From: Tony Lindgren <[email protected]>
Date: Mon, 27 Nov 2017 08:57:26 -0800
Subject: ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context
From: Tony Lindgren <[email protected]>
[ Upstream commit d09220a887f70368afa79e850c95e74890c0a32d ]
With the CMA changes from Joonsoo Kim <[email protected]>, it was noticed that n900 stopped booting. After investigating it turned out that n900 save_secure_ram_context does some whacky virtual to physical address translation for the SRAM data address.
As we now only have minimal parts of omap3 idle code copied to SRAM, running save_secure_ram_context() in SRAM is not needed. It only gets called on PM init. And it seems there's no need to ever call this from SRAM idle code.
So let's just keep save_secure_ram_context() in DDR, and pass it the physical address of the parameters. We can do everything else in omap-secure.c like we already do for other secure code.
And since we don't have any documentation, I still have no clue what the values for 0, 1 and 1 for the parameters might be. If somebody has figured it out, please do send a patch to add some comments.
--- arch/arm/mach-omap2/omap-secure.c | 19 +++++++++++++++++++ arch/arm/mach-omap2/omap-secure.h | 4 ++++ arch/arm/mach-omap2/pm.h | 4 ---- arch/arm/mach-omap2/pm34xx.c | 13 ++++--------- arch/arm/mach-omap2/sleep34xx.S | 26 ++++---------------------- 5 files changed, 31 insertions(+), 35 deletions(-)
arch/arm/mach-omap2/omap-secure.c +19 -0
@@ -73,6 +73,25 @@ phys_addr_t omap_secure_ram_mempool_basereturn omap_secure_memblock_base; } +u32 omap3_save_secure_ram (void __iomem *addr,int size) +{ +u32 ret; +u32 param[5 ]; + +if (size !=OMAP3_SAVE_SECURE_RAM_SZ ) +return OMAP3_SAVE_SECURE_RAM_SZ ; + + param[0 ] =4 ;/* Number of arguments */ + param[1 ] =__pa (addr);/* Physical address for saving */ + param[2 ] =0 ; + param[3 ] =1 ; + param[4 ] =1 ; + + ret =save_secure_ram_context (__pa (param)); + +return ret; +} +/** * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls * @idx: The PPA API index
arch/arm/mach-omap2/omap-secure.h +4 -0
@@ -31,6 +31,8 @@/* Maximum Secure memory storage size */ #define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K) +#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F +/* Secure low power HAL API index */ #define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a#define OMAP4_HAL_SAVEHW_INDEX 0x1b
@@ -64,6 +66,8 @@ extern u32 omap_smc2(u32 id, u32 falg, uextern u32 omap_smc3 (u32 id,u32 process,u32 flag,u32 pargs);extern phys_addr_t omap_secure_ram_mempool_base (void );extern int omap_secure_ram_reserve_memblock (void ); +extern u32 save_secure_ram_context (u32 args_pa); +extern u32 omap3_save_secure_ram (void __iomem *save_regs,int size);extern u32 rx51_secure_dispatcher (u32 idx,u32 process,u32 flag,u32 nargs,u32 arg1,u32 arg2,u32 arg3,u32 arg4);
arch/arm/mach-omap2/pm.h +0 -4
@@ -81,10 +81,6 @@ extern unsigned int omap3_do_wfi_sz;/* ... and its pointer from SRAM after copy */ extern void (*omap3_do_wfi_sram)(void ); -/* save_secure_ram_context function pointer and size, for copy to SRAM */ -extern int save_secure_ram_context (u32 *addr); -extern unsigned int save_secure_ram_context_sz; -extern void omap3_save_scratchpad_contents (void );#define PM_RTA_ERRATUM_i608 (1 << 0)
arch/arm/mach-omap2/pm34xx.c +4 -9
@@ -48,6 +48,7 @@#include "prm3xxx.h" #include "pm.h" #include "sdrc.h" +#include "omap-secure.h" #include "sram.h" #include "control.h" #include "vc.h"
@@ -66,7 +67,6 @@ struct power_state {static LIST_HEAD (pwrst_list); -static int (*_omap_save_secure_sram)(u32 *addr);void (*omap3_do_wfi_sram)(void );static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
@@ -121,8 +121,8 @@ static void omap3_save_secure_ram_contex* will hang the system. */ pwrdm_set_next_pwrst (mpu_pwrdm,PWRDM_POWER_ON ); - ret =_omap_save_secure_sram ((u32 *)(unsigned long ) -__pa (omap3_secure_ram_storage)); + ret =omap3_save_secure_ram (omap3_secure_ram_storage, +OMAP3_SAVE_SECURE_RAM_SZ );pwrdm_set_next_pwrst (mpu_pwrdm, mpu_next_state);/* Following is for error tracking, it should not happen */ if (ret) {
@@ -431,15 +431,10 @@ static int __init pwrdms_setup(struct po* * The minimum set of functions is pushed to SRAM for execution: * - omap3_do_wfi for erratum i581 WA, -* - save_secure_ram_context for security extensions. */ void omap_push_sram_idle (void ) { omap3_do_wfi_sram =omap_sram_push (omap3_do_wfi, omap3_do_wfi_sz); - -if (omap_type () !=OMAP2_DEVICE_TYPE_GP ) - _omap_save_secure_sram =omap_sram_push (save_secure_ram_context, - save_secure_ram_context_sz); }static void __init pm_errata_configure (void )
@@ -551,7 +546,7 @@ int __init omap3_pm_init(void)clkdm_add_wkdep (neon_clkdm, mpu_clkdm);if (omap_type () !=OMAP2_DEVICE_TYPE_GP ) { omap3_secure_ram_storage = -kmalloc (0x803F ,GFP_KERNEL ); +kmalloc (OMAP3_SAVE_SECURE_RAM_SZ ,GFP_KERNEL );if (!omap3_secure_ram_storage)pr_err ("Memory allocation failed when allocating for secure sram context\n" );
arch/arm/mach-omap2/sleep34xx.S +4 -22
@@ -93,20 +93,13 @@ ENTRY(enable_omap3630_toggle_l2_on_resto ENDPROC(enable_omap3630_toggle_l2_on_restore) /* - * Function to call rom code to save secure ram context. This gets - * relocated to SRAM, so it can be all in .data section. Otherwise - * we need to initialize api_params separately. + * Function to call rom code to save secure ram context. + * + * r0 = physical address of the parameters */ - .data - .align 3 ENTRY(save_secure_ram_context) stmfd sp!, {r4 - r11, lr} @ save registers on stack - adr r3, api_params @ r3 points to parameters - str r0, [r3,#0x4] @ r0 has sdram address - ldr r12, high_mask - and r3, r3, r12 - ldr r12, sram_phy_addr_mask - orr r3, r3, r12 + mov r3, r0 @ physical address of parameters mov r0, #25 @ set service ID for PPA mov r12, r0 @ copy secure service ID in r12 mov r1, #0 @ set task id for ROM code in r1
@@ -120,18 +113,7 @@ ENTRY(save_secure_ram_context) nop nop ldmfd sp!, {r4 - r11, pc} - .align -sram_phy_addr_mask: - .word SRAM_BASE_P -high_mask: - .word 0xffff -api_params: - .word 0x4, 0x0, 0x0, 0x1, 0x1 ENDPROC(save_secure_ram_context) -ENTRY(save_secure_ram_context_sz) - .word . - save_secure_ram_context - - .text /* * ======================
Patches currently in stable-queue which might be from [email protected] are
queue-4.4/arm-omap2-fix-sram-virt-to-phys-translation-for-save_secure_ram_context.patch queue-4.4/arm-dts-fix-omap4-hang-with-gps-connected-to-usb-by-using-wakeupgen.patch queue-4.4/arm-am33xx-prm-remove-am33xx_pwrdm_read_prev_pwrst-function.patch queue-4.4/arm-dts-am4372-correct-the-interrupts_properties-of-mcasp.patch