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Add SDHI support to r8a7743

PATCH New Fabrizio Castro 3 participants 11 messages Mar 2, 2018 – Mar 8, 2018

Subsystems (3)
Device tree bindings Common clk MMC, SD and SDIO
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Fabrizio Castro

author
#0 lore raw

cover Add SDHI support to r8a7743

Dear All,

this patch series adds SDHI support to the r8a7743 SoC.

The only patch that hasn't been backported in this series is:
"ARM: shmobile: r8a7743: Rename SDHI clocks"

This work has been based on top of this series:
https://lists.cip-project.org/pipermail/cip-dev/2018-February/000863.html

Thanks,
Fabrizio

Biju Das (5):
mmc: renesas_sdhi: Add r8a7743/5 support
mmc: renesas_sdhi: Add r8a7743/5 support
ARM: dts: r8a7743: Add SDHI controllers
ARM: dts: iwg20m: Enable SDHI0 controller
ARM: dts: iwg20d-q7: Add SDHI1 support

Fabrizio Castro (1):
ARM: shmobile: r8a7743: Rename SDHI clocks

 Documentation/devicetree/bindings/mmc/tmio_mmc.txt |  2 +
 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts            | 40 ++++++++++++++++++++
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi              | 17 +++++++++
 arch/arm/boot/dts/r8a7743.dtsi                     | 43 +++++++++++++++++++++-
 drivers/mmc/host/sh_mobile_sdhi.c                  |  2 +
 include/dt-bindings/clock/r8a7743-clock.h          |  4 +-
 6 files changed, 104 insertions(+), 4 deletions(-)
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH 1/6 ARM: shmobile: r8a7743: Rename SDHI clocks

This commit renames R8A7743_CLK_SDHI2 to R8A7743_CLK_SDHI1 and R8A7743_CLK_SDHI3 to R8A7743_CLK_SDHI2. This is to make the SDHI clock names of the r8a7743 more similar to upstream definitions.

Signed-off-by Fabrizio Castro <[email protected]>
---
 arch/arm/boot/dts/r8a7743.dtsi            | 4 ++--
 include/dt-bindings/clock/r8a7743-clock.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/boot/dts/r8a7743.dtsi +2 -2
index 9255582..b1534a0 100644
@@ -958,8 +958,8 @@
 					 <&hp_clk>, <&hp_clk>;
 				#clock-cells = <1>;
 				clock-indices = <
-					R8A7743_CLK_TPU0 R8A7743_CLK_SDHI3
-					R8A7743_CLK_SDHI2 R8A7743_CLK_SDHI0
+					R8A7743_CLK_TPU0 R8A7743_CLK_SDHI2
+					R8A7743_CLK_SDHI1 R8A7743_CLK_SDHI0
 					R8A7743_CLK_MMCIF0 R8A7743_CLK_IIC0
 					R8A7743_CLK_PCIEC R8A7743_CLK_IIC1
 					R8A7743_CLK_SSUSB R8A7743_CLK_CMT1
include/dt-bindings/clock/r8a7743-clock.h +2 -2
index 53f54df..8e4b843 100644
@@ -58,8 +58,8 @@
 
 /* MSTP3 */
 #define R8A7743_CLK_TPU0		4
-#define R8A7743_CLK_SDHI3		11
-#define R8A7743_CLK_SDHI2		12
+#define R8A7743_CLK_SDHI2		11
+#define R8A7743_CLK_SDHI1		12
 #define R8A7743_CLK_SDHI0		14
 #define R8A7743_CLK_MMCIF0		15
 #define R8A7743_CLK_IIC0		18
Signature · 1 line
2.7.4
author
#2 lore raw

PATCH 2/6 mmc: renesas_sdhi: Add r8a7743/5 support

In reply to Fabrizio Castro

From: Biju Das <[email protected]>

Add support for r8a7743/5 SoC.Renesas RZ/G1[ME] (R8A7743/5) SDHI is identical to the R-Car Gen2 family.

Signed-off-by Biju Das <[email protected]>
Acked-by Simon Horman <[email protected]>
Signed-off-by Ulf Hansson <[email protected]>
(cherry picked from commit c16a854e4463078aedad601fac76341760a66dd1)
Signed-off-by Fabrizio Castro <[email protected]>
---
 drivers/mmc/host/sh_mobile_sdhi.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/mmc/host/sh_mobile_sdhi.c +2 -0
index 354f4f3..e43aff4 100644
@@ -73,6 +73,8 @@ static const struct of_device_id sh_mobile_sdhi_of_match[] = {
 	{ .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], },
 	{ .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
+	{ .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
Signature · 1 line
2.7.4
author
#3 lore raw

PATCH 3/6 mmc: renesas_sdhi: Add r8a7743/5 support

In reply to Fabrizio Castro

From: Biju Das <[email protected]>

Add support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) SDHI is identical to the R-Car Gen2 family.

Signed-off-by Biju Das <[email protected]>
Reviewed-by Wolfram Sang <[email protected]>
Acked-by Simon Horman <[email protected]>
Signed-off-by Ulf Hansson <[email protected]>
(cherry picked from commit 34292311f0195b2113a5f30e5bea33e4c2668315)
Signed-off-by Fabrizio Castro <[email protected]>
---
 Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/mmc/tmio_mmc.txt +2 -0
index 400b640..cbf9135 100644
@@ -15,6 +15,8 @@ Required properties:
 		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
 		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
+		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
+		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
 		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
 		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
 		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
Signature · 1 line
2.7.4
author
#4 lore raw

PATCH 4/6 ARM: dts: r8a7743: Add SDHI controllers

In reply to Fabrizio Castro

From: Biju Das <[email protected]>

Add the SDHI controllers to the r8a7743 device tree.

Signed-off-by Biju Das <[email protected]>
Signed-off-by Simon Horman <[email protected]>
(cherry picked from commit 63ce8a617b5129f7cb20ed0d6d822a31ecca4696)
Signed-off-by Fabrizio Castro <[email protected]>
---
 arch/arm/boot/dts/r8a7743.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +39 -0
index b1534a0..8515abf 100644
@@ -716,6 +716,45 @@
 			status = "disabled";
 		};
 
+		sdhi0: sd at ee100000 {
+			compatible = "renesas,sdhi-r8a7743";
+			reg = <0 0xee100000 0 0x328>;
+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7743_CLK_SDHI0>;
+			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+			       <&dmac1 0xcd>, <&dmac1 0xce>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <195000000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		sdhi1: sd at ee140000 {
+			compatible = "renesas,sdhi-r8a7743";
+			reg = <0 0xee140000 0 0x100>;
+			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7743_CLK_SDHI1>;
+			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+			       <&dmac1 0xc1>, <&dmac1 0xc2>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <97500000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		sdhi2: sd at ee160000 {
+			compatible = "renesas,sdhi-r8a7743";
+			reg = <0 0xee160000 0 0x100>;
+			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7743_CLK_SDHI2>;
+			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+			       <&dmac1 0xd3>, <&dmac1 0xd4>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <97500000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
 		clocks {
 			#address-cells = <2>;
 			#size-cells = <2>;
Signature · 1 line
2.7.4
author
#5 lore raw

PATCH 5/6 ARM: dts: iwg20m: Enable SDHI0 controller

In reply to Fabrizio Castro

From: Biju Das <[email protected]>

Enable the SDHI0 controller on iWave RZG1M Qseven SOM.

Signed-off-by Biju Das <[email protected]>
Acked-by Wolfram Sang <[email protected]>
Signed-off-by Simon Horman <[email protected]>
(cherry picked from commit e75e71e7bcee2e04be8bbca6fb67af1a45fa128b)
Signed-off-by Fabrizio Castro <[email protected]>
---
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20m.dtsi +17 -0
index ff79938..4119737 100644
@@ -9,6 +9,7 @@
  */
 
 #include "r8a7743.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	compatible = "iwave,g20m", "renesas,r8a7743";

@@ -42,6 +43,12 @@
 		groups = "mmc_data8_b", "mmc_ctrl";
 		function = "mmc";
 	};
+
+	sdhi0_pins: sd0 {
+		groups = "sdhi0_data4", "sdhi0_ctrl";
+		function = "sdhi0";
+		power-source = <3300>;
+	};
 };
 
 &mmcif0 {

@@ -53,3 +60,13 @@
 	non-removable;
 	status = "okay";
 };
+
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_3p3v>;
+	cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
Signature · 1 line
2.7.4
author
#6 lore raw

PATCH 6/6 ARM: dts: iwg20d-q7: Add SDHI1 support

In reply to Fabrizio Castro

From: Biju Das <[email protected]>

Define the iWave RainboW-G20D-Qseven board dependent part of the SDHI1 device node.

Signed-off-by Biju Das <[email protected]>
Acked-by Wolfram Sang <[email protected]>
Signed-off-by Simon Horman <[email protected]>
(cherry picked from commit 029efb3a03c5039902a6f1cfe266ed664cb97f20)
Signed-off-by Fabrizio Castro <[email protected]>
---
 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 40 +++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts +40 -0
index f3b4890..0bd9754 100644
@@ -19,6 +19,29 @@
 		serial0 = &scif0;
 		ethernet0 = &avb;
 	};
+
+	vcc_sdhi1: regulator-vcc-sdhi1 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI1 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&gpio1 16 GPIO_ACTIVE_LOW>;
+	};
+
+	vccq_sdhi1: regulator-vccq-sdhi1 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI1 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+		gpios-states = <1>;
+		states = <3300000 1
+			  1800000 0>;
+	};
 };
 
 &pfc {

@@ -36,6 +59,12 @@
 		groups = "avb_mdio", "avb_gmii";
 		function = "avb";
 	};
+
+	sdhi1_pins: sd1 {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <3300>;
+	};
 };
 
 &scif0 {

@@ -60,6 +89,17 @@
 	};
 };
 
+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&vcc_sdhi1>;
+	vqmmc-supply = <&vccq_sdhi1>;
+	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
 &i2c2 {
 	pinctrl-0 = <&i2c2_pins>;
 	pinctrl-names = "default";
Signature · 1 line
2.7.4
#7 lore raw

cover Add SDHI support to r8a7743

In reply to Fabrizio Castro

Hello Fabrizio,

Quoted 6 lines

From: Fabrizio Castro [mailto:fabrizio.castro at bp.renesas.com]
Sent: 02 March 2018 11:45

Dear All,

this patch series adds SDHI support to the r8a7743 SoC.

Thank you for the patches.

Quoted 17 lines

The only patch that hasn't been backported in this series is:
"ARM: shmobile: r8a7743: Rename SDHI clocks"

This work has been based on top of this series:
https://lists.cip-project.org/pipermail/cip-dev/2018-February/000863.html

Thanks,
Fabrizio

Biju Das (5):
mmc: renesas_sdhi: Add r8a7743/5 support
mmc: renesas_sdhi: Add r8a7743/5 support
ARM: dts: r8a7743: Add SDHI controllers
ARM: dts: iwg20m: Enable SDHI0 controller
ARM: dts: iwg20d-q7: Add SDHI1 support

Quoted 2 lines

Fabrizio Castro (1):
ARM: shmobile: r8a7743: Rename SDHI clocks

Series: Reviewed-by: Chris Paterson <[email protected]>

Kind regards, Chris

Quoted 12 lines
 Documentation/devicetree/bindings/mmc/tmio_mmc.txt |  2 +
 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts            | 40
++++++++++++++++++++
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi              | 17 +++++++++
 arch/arm/boot/dts/r8a7743.dtsi                     | 43 +++++++++++++++++++++-
 drivers/mmc/host/sh_mobile_sdhi.c                  |  2 +
 include/dt-bindings/clock/r8a7743-clock.h          |  4 +-
 6 files changed, 104 insertions(+), 4 deletions(-)

--
2.7.4

Applied
#8 lore raw

cover Add SDHI support to r8a7743

In reply to Fabrizio Castro
Quoted 9 lines · Fabrizio Castro

Dear All,

this patch series adds SDHI support to the r8a7743 SoC.

The only patch that hasn't been backported in this series is:
"ARM: shmobile: r8a7743: Rename SDHI clocks"

This work has been based on top of this series:
https://lists.cip-project.org/pipermail/cip-dev/2018-February/000863.html

Applied, thanks. (It's a shame you had to drop UHS support... I worked on upstreaming it but didn't quite get it into shape before 4.4.)

Ben.

Quoted 21 lines

Thanks,
Fabrizio

Biju Das (5):
? mmc: renesas_sdhi: Add r8a7743/5 support
? mmc: renesas_sdhi: Add r8a7743/5 support
? ARM: dts: r8a7743: Add SDHI controllers
? ARM: dts: iwg20m: Enable SDHI0 controller
? ARM: dts: iwg20d-q7: Add SDHI1 support

Fabrizio Castro (1):
? ARM: shmobile: r8a7743: Rename SDHI clocks

?Documentation/devicetree/bindings/mmc/tmio_mmc.txt |??2 +
?arch/arm/boot/dts/r8a7743-iwg20d-q7.dts????????????| 40 ++++++++++++++++++++
?arch/arm/boot/dts/r8a7743-iwg20m.dtsi??????????????| 17 +++++++++
?arch/arm/boot/dts/r8a7743.dtsi?????????????????????| 43 +++++++++++++++++++++-
?drivers/mmc/host/sh_mobile_sdhi.c??????????????????|??2 +
?include/dt-bindings/clock/r8a7743-clock.h??????????|??4 +-

?6 files changed, 104 insertions(+), 4 deletions(-)

Signature · 2 lines
Ben Hutchings
Software Developer, Codethink Ltd.
author
#9 lore raw

cover Add SDHI support to r8a7743

Hello Ben,

Quoted 7 lines

Subject: Re: [cip-dev][PATCH 0/6] Add SDHI support to r8a7743

Quoted 4 lines · Fabrizio Castro

Dear All,

this patch series adds SDHI support to the r8a7743 SoC.

Quoted 8 lines
Quoted 5 lines

The only patch that hasn't been backported in this series is:
"ARM: shmobile: r8a7743: Rename SDHI clocks"

This work has been based on top of this series:
https://lists.cip-project.org/pipermail/cip-dev/2018-February/000863.html

Applied, thanks. (It's a shame you had to drop UHS support... I worked on upstreaming it but didn't quite get it into shape before 4.4.)

Thank you for that. The plan is to get back to UHS later on, what are your thoughts about its backporting?

Thanks,
Fab

Quoted 24 lines

Ben.

Quoted 13 lines

Thanks,
Fabrizio

Biju Das (5):
mmc: renesas_sdhi: Add r8a7743/5 support
mmc: renesas_sdhi: Add r8a7743/5 support
ARM: dts: r8a7743: Add SDHI controllers
ARM: dts: iwg20m: Enable SDHI0 controller
ARM: dts: iwg20d-q7: Add SDHI1 support

Fabrizio Castro (1):
ARM: shmobile: r8a7743: Rename SDHI clocks

Quoted 8 lines
 Documentation/devicetree/bindings/mmc/tmio_mmc.txt |  2 +
 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts            | 40 ++++++++++++++++++++
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi              | 17 +++++++++
 arch/arm/boot/dts/r8a7743.dtsi                     | 43 +++++++++++++++++++++-
 drivers/mmc/host/sh_mobile_sdhi.c                  |  2 +
 include/dt-bindings/clock/r8a7743-clock.h          |  4 +-
 6 files changed, 104 insertions(+), 4 deletions(-)
Quoted 4 lines

--
Ben Hutchings
Software Developer, Codethink Ltd.

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

#10 lore raw

cover Add SDHI support to r8a7743

Quoted 12 lines · Fabrizio Castro

Hello Ben,

Quoted 10 lines

Subject: Re: [cip-dev][PATCH 0/6] Add SDHI support to r8a7743

Quoted 7 lines · Fabrizio Castro

Dear All,

this patch series adds SDHI support to the r8a7743 SoC.

The only patch that hasn't been backported in this series is:
"ARM: shmobile: r8a7743: Rename SDHI clocks"

Quoted 8 lines
Quoted 5 lines
Quoted 2 lines

This work has been based on top of this series:
https://lists.cip-project.org/pipermail/cip-dev/2018-February/000863.html

Applied, thanks.??(It's a shame you had to drop UHS support... I worked on upstreaming it but didn't quite get it into shape before 4.4.)

Thank you for that. The plan is to get back to UHS later on, what are your thoughts about its backporting?

It seems like a reasonable thing to do.

Ben.

Signature · 2 lines
Ben Hutchings
Software Developer, Codethink Ltd.