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clocksource/drivers/npcm: Add NPCM7xx timer driver

PATCH Applied Tomer Maimon 2 participants 7 messages Mar 8, 2018 – Mar 9, 2018

Subsystems (3)
Device tree bindings Clocksource, clockevent drivers Arm/nuvoton npcm architecture
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Tomer Maimon

author maintainer
#0 lore raw

v5 cover clocksource/drivers/npcm: Add NPCM7xx timer driver

Addressed comments from:.
- Daniel Lezcano: https://www.spinics.net/lists/kernel/msg2741546.html

				   https://www.spinics.net/lists/kernel/msg2741548.html

- Joel Stanley: https://www.spinics.net/lists/kernel/msg2736646.html

Changes since version 4:
- Remove clock-frequency option.
- Rename driver name.
- Enable TIMER_OF_CLOCK flag.
- Modify register size in the dt-binding.

Changes since version 3:
- Modify prefix to npcm7xx_
- Modify licensing to SPDX license format

Changes since version 2:
- The shutdown function called oneshot function that can cause a crash in the system, Modify shutdown call to unique shutdown function.
- Adding support to resume function
- Using timer-of.c API
- Modify NPCM750 compatible name.

Changes since version 1:
- Rename driver name
- Removing unnecessary dependencies in configuration
- Adding prefix to the macros
- No changes to dt-binding documentation since v1

Modified driver have been tested on the NPCM750 evaluation board.

Tomer Maimon (2):
dt-binding: timer: document NPCM7xx timer DT bindings clocksource/drivers/npcm: Add NPCM7xx timer driver

 .../bindings/timer/nuvoton,npcm7xx-timer.txt       |  21 ++
 drivers/clocksource/Kconfig                        |   8 +
 drivers/clocksource/Makefile                       |   1 +
 drivers/clocksource/timer-npcm7xx.c                | 215 +++++++++++++++++++++
 4 files changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
 create mode 100644 drivers/clocksource/timer-npcm7xx.c
Signature · 1 line
2.14.1
author maintainer
#1 lore raw

PATCH v5 1/2 dt-binding: timer: document NPCM7xx timer DT bindings

Added device tree binding documentation for Nuvoton NPCM7xx timer.

Signed-off-by Tomer Maimon <[email protected]>
Acked-by Rob Herring <[email protected]>
Reviewed-by Brendan Higgins <[email protected]>
---
 .../bindings/timer/nuvoton,npcm7xx-timer.txt        | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt new file +21 -0
new file mode 100644
index 000000000000..ea22dfe485be
@@ -0,0 +1,21 @@
+Nuvoton NPCM7xx timer
+
+Nuvoton NPCM7xx have three timer modules, each timer module provides five 24-bit
+timer counters.
+
+Required properties:
+- compatible      : "nuvoton,npcm750-timer" for Poleg NPCM750.
+- reg             : Offset and length of the register set for the device.
+- interrupts      : Contain the timer interrupt with flags for
+                    falling edge.
+- clocks          : phandle of timer reference clock (usually a 25 MHz clock).
+
+Example:
+
+timer@f0008000 {
+    compatible = "nuvoton,npcm750-timer";
+    interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+    reg = <0xf0008000 0x50>;
+    clocks = <&clk NPCM7XX_CLK_TIMER>;
+};
+
Signature · 1 line
2.14.1
author maintainer
#2 lore raw

PATCH v5 2/2 clocksource/drivers/npcm: Add NPCM7xx timer driver

In reply to Tomer Maimon

Add Nuvoton BMC NPCM7xx timer driver.

The clocksource Enable 24-bit TIMER0 and TIMER1 counters, while TIMER0 serve as clockevent and TIMER1 serve as clocksource.

Signed-off-by Tomer Maimon <[email protected]>
Reviewed-by Brendan Higgins <brendanhiggins@xxxxxxxxxx>
---
 drivers/clocksource/Kconfig         |   8 ++
 drivers/clocksource/Makefile        |   1 +
 drivers/clocksource/timer-npcm7xx.c | 215 ++++++++++++++++++++++++++++++++++++
 3 files changed, 224 insertions(+)
 create mode 100644 drivers/clocksource/timer-npcm7xx.c
drivers/clocksource/Kconfig +8 -0
index b3b4ed9b6874..76194bc20bdf 100644
@@ -130,6 +130,14 @@ config VT8500_TIMER
 	help
 	  Enables support for the VT8500 driver.
 
+config NPCM7XX_TIMER
+	bool "NPCM7xx timer driver" if COMPILE_TEST
+	depends on HAS_IOMEM
+	select CLKSRC_MMIO
+	help
+	  Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
+	  While TIMER0 serves as clockevent and TIMER1 serves as clocksource.
+
 config CADENCE_TTC_TIMER
 	bool "Cadence TTC timer driver" if COMPILE_TEST
 	depends on COMMON_CLK
drivers/clocksource/Makefile +1 -0
index d6dec4489d66..74387877f7cf 100644
@@ -55,6 +55,7 @@ obj-$(CONFIG_CLKSRC_NPS)	+= timer-nps.o
 obj-$(CONFIG_OXNAS_RPS_TIMER)	+= timer-oxnas-rps.o
 obj-$(CONFIG_OWL_TIMER)		+= owl-timer.o
 obj-$(CONFIG_SPRD_TIMER)	+= timer-sprd.o
+obj-$(CONFIG_NPCM7XX_TIMER)	+= timer-npcm7xx.o
 
 obj-$(CONFIG_ARC_TIMERS)		+= arc_timer.o
 obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
drivers/clocksource/timer-npcm7xx.c new file +215 -0

215 lines not on this page · raw message

Signature · 1 line
2.14.1
#3 lore raw
Quoted 8 lines · Tomer Maimon

Add Nuvoton BMC NPCM7xx timer driver.

The clocksource Enable 24-bit TIMER0 and TIMER1 counters, while TIMER0 serve as clockevent and TIMER1 serve as clocksource.

Signed-off-by Tomer Maimon <[email protected]>
Reviewed-by Brendan Higgins <brendanhiggins@xxxxxxxxxx>

---

[ ... ]

drivers/clocksource/timer-npcm7xx.c line 209

Quoted 3 lines
drivers/clocksource/timer-npcm7xx.c new file +3 -0
+
+	pr_info("Enabling NPCM7xx clocksource timer base: 0x%x, IRQ: %d ",
+		(int)timer_of_base(&npcm7xx_to), timer_of_irq(&npcm7xx_to));

You can use '%p' instead of '0x%x' and remove the (int) cast.

I'm fine with the driver. If there is no comment, I will take it and do the change (if you are ok), no need on this case to resend a v6.

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author maintainer
#4 lore raw
Quoted 10 lines · Daniel Lezcano
Quoted 8 lines · Tomer Maimon

Add Nuvoton BMC NPCM7xx timer driver.

The clocksource Enable 24-bit TIMER0 and TIMER1 counters, while TIMER0 serve as clockevent and TIMER1 serve as clocksource.

Signed-off-by Tomer Maimon <[email protected]>
Reviewed-by Brendan Higgins <brendanhiggins@xxxxxxxxxx>

---

Quoted 7 lines

[ ... ]

drivers/clocksource/timer-npcm7xx.c line 209

Quoted 3 lines
drivers/clocksource/timer-npcm7xx.c new file +3 -0
+
+     pr_info("Enabling NPCM7xx clocksource timer base: 0x%x, IRQ: %d ",
+             (int)timer_of_base(&npcm7xx_to), timer_of_irq(&npcm7xx_to));

You can use '%p' instead of '0x%x' and remove the (int) cast.

I think we need to use in the pr_info %px, if I use %p I get in the kernel boot print "(ptrval)" instead of the address. please refer: https://lwn.net/Articles/740249/

Quoted 3 lines

I'm fine with the driver. If there is no comment, I will take it and do the change (if you are ok), no need on this case to resend a v6.

Yes great, Thank a lot!

Quoted 10 lines

--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
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#5 lore raw
Quoted 13 lines · Tomer Maimon
Quoted 12 lines · Daniel Lezcano
Quoted 8 lines · Tomer Maimon

Add Nuvoton BMC NPCM7xx timer driver.

The clocksource Enable 24-bit TIMER0 and TIMER1 counters, while TIMER0 serve as clockevent and TIMER1 serve as clocksource.

Signed-off-by Tomer Maimon <[email protected]>
Reviewed-by Brendan Higgins <brendanhiggins@xxxxxxxxxx>

---

[ ... ]

Quoted 8 lines
Quoted 5 lines

drivers/clocksource/timer-npcm7xx.c line 209

Quoted 3 lines
drivers/clocksource/timer-npcm7xx.c new file +3 -0
+
+     pr_info("Enabling NPCM7xx clocksource timer base: 0x%x, IRQ: %d ",
+             (int)timer_of_base(&npcm7xx_to), timer_of_irq(&npcm7xx_to));

You can use '%p' instead of '0x%x' and remove the (int) cast.

I think we need to use in the pr_info %px, if I use %p I get in the kernel boot print "(ptrval)" instead of the address. please refer: https://lwn.net/Articles/740249/

Ah yes, right.

Thanks

-- Daniel

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Applied
#6 lore raw
In reply to Tomer Maimon

Applied, thanks.

-- Daniel

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