patch "serial: 8250: Add Nuvoton NPCM UART" added to tty-next
Subsystems (3)
This is a note to let you know that I've just added the patch titled
serial: 8250: Add Nuvoton NPCM UART
to my tty git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git
in the tty-next branch.
The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.)
The patch will also be merged in the next major kernel release during the merge window.
If you have any questions about this process, please let me know.
Quoted 1 line
From
f597fbce38d230af95384f4a04e0a13a1d0ad45dMon Sep 17 00:00:00 2001
From: Joel Stanley <[email protected]>
Date: Mon, 5 Mar 2018 22:17:38 +1030
Subject: serial: 8250: Add Nuvoton NPCM UART
The Nuvoton UART is almost compatible with the 8250 driver when probed via the 8250_of driver, however it requires some extra configuration at startup.
--- Documentation/devicetree/bindings/serial/8250.txt | 1 + drivers/tty/serial/8250/8250_of.c | 1 + drivers/tty/serial/8250/8250_port.c | 33 +++++++++++++++++++++++ include/uapi/linux/serial_core.h | 3 +++ 4 files changed, 38 insertions(+)
Documentation/devicetree/bindings/serial/8250.txt +1 -0
@@ -24,6 +24,7 @@ Required properties: - "ti,da830-uart" - "aspeed,ast2400-vuart" - "aspeed,ast2500-vuart" + - "nuvoton,npcm750-uart" - "serial" if the port type is unknown. - reg : offset and length of the register set for the device. - interrupts : should contain uart interrupt.
drivers/tty/serial/8250/8250_of.c +1 -0
@@ -316,6 +316,7 @@ static const struct of_device_id of_platform_serial_table[] = { { .compatible = "mrvl,mmp-uart", .data = (void *)PORT_XSCALE, }, { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, }, + { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, }, { /* end of list */ }, }; MODULE_DEVICE_TABLE(of, of_platform_serial_table);
drivers/tty/serial/8250/8250_port.c +33 -0
@@ -47,6 +47,10 @@#define UART_EXAR_SLEEP 0x8b/* Sleep mode */ #define UART_EXAR_DVID 0x8d/* Device identification */ +/* Nuvoton NPCM timeout register */ +#define UART_NPCM_TOR 7 +#define UART_NPCM_TOIE BIT(7)/* Timeout Interrupt Enable */ +/* * Debugging. */
@@ -293,6 +297,15 @@ static const struct serial8250_config uart_config[] = { UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, .flags = UART_CAP_FIFO, }, + [PORT_NPCM] = { + .name = "Nuvoton 16550", + .fifo_size = 16, + .tx_loadsz = 16, + .fcr =UART_FCR_ENABLE_FIFO |UART_FCR_R_TRIG_10 | + UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, + .rxtrig_bytes = {1, 4, 8, 14}, + .flags = UART_CAP_FIFO, + }, };/* Uart divisor latch read */
@@ -2141,6 +2154,15 @@ int serial8250_do_startup(struct uart_port *port) UART_DA830_PWREMU_MGMT_FREE); } +if (port->type ==PORT_NPCM ) { +/* +* Nuvoton calls the scratch register 'UART_TOR' (timeout +* register). Enable it, and set TIOC (timeout interrupt +* comparator) to be 0x20 for correct operation. +*/ +serial_port_out (port,UART_NPCM_TOR ,UART_NPCM_TOIE |0x20 ); + } +#ifdef CONFIG_SERIAL_8250_RSA /* * If this is an RSA port, see if we can kick it up to the
@@ -2463,6 +2485,15 @@ static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,return quot_16 >>4 ; } +/* Nuvoton NPCM UARTs have a custom divisor calculation */ +static unsigned int npcm_get_divisor (struct uart_8250_port *up, +unsigned int baud) +{ +struct uart_port *port = &up->port; + +return DIV_ROUND_CLOSEST (port->uartclk,16 * baud +2 ) -2 ; +} +static unsigned int serial8250_get_divisor (struct uart_8250_port *up,unsigned int baud,unsigned int *frac)
@@ -2483,6 +2514,8 @@ static unsigned int serial8250_get_divisor(struct uart_8250_port *up, quot =0x8002 ; else if (up->port.type == PORT_XR17V35X) quot =xr17v35x_get_divisor (up, baud, frac); + else if (up->port.type == PORT_NPCM) + quot =npcm_get_divisor (up, baud); else quot =uart_get_divisor (port, baud);
include/uapi/linux/serial_core.h +3 -0
@@ -76,6 +76,9 @@#define PORT_SUNZILOG 38#define PORT_SUNSAB 39 +/* Nuvoton UART */ +#define PORT_NPCM 40 +/* Intel EG20 */ #define PORT_PCH_8LINE 44#define PORT_PCH_2LINE 45
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2.16.2