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drm/amd/pp: Remove the cgs wrapper for notify smu version on APU

PATCH In review Rex Zhu 2 participants 2 messages Mar 15, 2018 1 message not in the archive

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DRM drivers Radeon and amdgpu DRM drivers
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Rex Zhu

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#0 lore raw

PATCH 1/1 drm/amd/pp: Remove the cgs wrapper for notify smu version on APU

Refine the commit f49e9bac191b066060a53d994f9c964fb71454f2
drm/amd/pp: Get and save Rv smu version

Change-Id Iea668cc2161e5fcf339b408eb7eca1b028e26df2
Signed-off-by Rex Zhu <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c             | 5 -----
 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 6 ++----
 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c  | 6 +++---
 3 files changed, 5 insertions(+), 12 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c +0 -5
index f2dd98d..37098c6 100644
@@ -654,11 +654,6 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
 				else
 					strcpy(fw_name, "amdgpu/vega10_smc.bin");
 				break;
-			case CHIP_CARRIZO:
-			case CHIP_STONEY:
-			case CHIP_RAVEN:
-				adev->pm.fw_version = info->version;
-				return 0;
 			default:
 				DRM_ERROR("SMC firmware not supported\n");
 				return -EINVAL;
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c +2 -4
index 6ee9822..bed229e 100644
@@ -247,13 +247,11 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
 
 static int smu10_start_smu(struct pp_hwmgr *hwmgr)
 {
-	struct cgs_firmware_info info = {0};
+	struct amdgpu_device *adev = hwmgr->adev;
 
 	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
 	hwmgr->smu_version = smu10_read_arg_from_smc(hwmgr);
-	info.version = hwmgr->smu_version >> 8;
-
-	cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);
+	adev->pm.fw_version = hwmgr->smu_version >> 8;
 
 	if (smu10_verify_smc_interface(hwmgr))
 		return -EINVAL;
drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c +3 -3
index 480deb2..8c49704 100644
@@ -698,7 +698,8 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)
 {
 	int ret = 0;
 	uint32_t fw_to_check = 0;
-	struct cgs_firmware_info info = {0};
+	struct amdgpu_device *adev = hwmgr->adev;
+
 	uint32_t index = SMN_MP1_SRAM_START_ADDR +
 			 SMU8_FIRMWARE_HEADER_LOCATION +
 			 offsetof(struct SMU8_Firmware_Header, Version);

@@ -709,8 +710,7 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)
 
 	cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index);
 	hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);
-	info.version = hwmgr->smu_version >> 8;
-	cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);
+	adev->pm.fw_version = hwmgr->smu_version >> 8;
 
 	fw_to_check = UCODE_ID_RLC_G_MASK |
 			UCODE_ID_SDMA0_MASK |
Signature · 6 lines
1.9.1

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A message that is not in the archive (sent off-list or not yet received): 1521096441-5154-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org

Reviewed-by
#2 lore raw
Reviewed-by Alex Deucher <[email protected]>

________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Rex Zhu <[email protected]>
Sent: Thursday, March 15, 2018 2:47:21 AM
To: [email protected]
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: Remove the cgs wrapper for notify smu version on APU

Refine the commit f49e9bac191b066060a53d994f9c964fb71454f2
drm/amd/pp: Get and save Rv smu version

Change-Id Iea668cc2161e5fcf339b408eb7eca1b028e26df2
Signed-off-by Rex Zhu <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c             | 5 -----
 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 6 ++----
 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c  | 6 +++---
 3 files changed, 5 insertions(+), 12 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c +0 -5
index f2dd98d..37098c6 100644
@@ -654,11 +654,6 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
                                 else
                                         strcpy(fw_name, "amdgpu/vega10_smc.bin");
                                 break;
-                       case CHIP_CARRIZO:
-                       case CHIP_STONEY:
-                       case CHIP_RAVEN:
-                               adev->pm.fw_version = info->version;
-                               return 0;
                         default:
                                 DRM_ERROR("SMC firmware not supported\n");
                                 return -EINVAL;
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c +2 -4
index 6ee9822..bed229e 100644
@@ -247,13 +247,11 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
 
 static int smu10_start_smu(struct pp_hwmgr *hwmgr)
 {
-       struct cgs_firmware_info info = {0};
+       struct amdgpu_device *adev = hwmgr->adev;
 
         smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
         hwmgr->smu_version = smu10_read_arg_from_smc(hwmgr);
-       info.version = hwmgr->smu_version >> 8;
-
-       cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);
+       adev->pm.fw_version = hwmgr->smu_version >> 8;
 
         if (smu10_verify_smc_interface(hwmgr))
                 return -EINVAL;
drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c +3 -3
index 480deb2..8c49704 100644
@@ -698,7 +698,8 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)
 {
         int ret = 0;
         uint32_t fw_to_check = 0;
-       struct cgs_firmware_info info = {0};
+       struct amdgpu_device *adev = hwmgr->adev;
+
         uint32_t index = SMN_MP1_SRAM_START_ADDR +
                          SMU8_FIRMWARE_HEADER_LOCATION +
                          offsetof(struct SMU8_Firmware_Header, Version);

@@ -709,8 +710,7 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)
 
         cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index);
         hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);
-       info.version = hwmgr->smu_version >> 8;
-       cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);
+       adev->pm.fw_version = hwmgr->smu_version >> 8;
 
         fw_to_check = UCODE_ID_RLC_G_MASK |
                         UCODE_ID_SDMA0_MASK |

--
1.9.1

_______________________________________________
amd-gfx mailing list [email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx