Patch "MIPS: r2-on-r6-emu: Fix BLEZL and BGTZL identification" has been added to the 4.9-stable tree

This is a note to let you know that I've just added the patch titled

MIPS: r2-on-r6-emu: Fix BLEZL and BGTZL identification

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
mips-r2-on-r6-emu-fix-blezl-and-bgtzl-identification.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Leonid Yegoshin <[email protected]>
Date: Mon, 13 Mar 2017 16:36:35 +0100
Subject: MIPS: r2-on-r6-emu: Fix BLEZL and BGTZL identification

From: Leonid Yegoshin <[email protected]>

[ Upstream commit 5bba7aa4958e271c3ffceb70d47d3206524cf489 ]

Fix the problem of inaccurate identification of instructions BLEZL and BGTZL in R2 emulation code by making sure all necessary encoding specifications are met.

Previously, certain R6 instructions could be identified as BLEZL or BGTZL. R2 emulation routine didn't take into account that both BLEZL and BGTZL instructions require their rt field (bits 20 to 16 of instruction encoding) to be 0, and that, at same time, if the value in that field is not 0, the encoding may represent a legitimate MIPS R6 instruction.

This means that a problem could occur after emulation optimization, when emulation routine tried to pipeline emulation, picked up a next candidate, and subsequently misrecognized an R6 instruction as BLEZL or BGTZL.

It should be said that for single pass strategy, the problem does not happen because CPU doesn't trap on branch-compacts which share opcode space with BLEZL/BGTZL (but have rt field != 0, of course).

Patchwork: https://patchwork.linux-mips.org/patch/15456/

---
 arch/mips/kernel/mips-r2-to-r6-emul.c |   14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

@@ -1096,10 +1096,20 @@ repeat:
 		}
 		break;
 
-	case beql_op:
-	case bnel_op:
 	case blezl_op:
 	case bgtzl_op:
+		/*
+		 * For BLEZL and BGTZL, rt field must be set to 0. If this
+		 * is not the case, this may be an encoding of a MIPS R6
+		 * instruction, so return to CPU execution if this occurs
+		 */
+		if (MIPSInst_RT(inst)) {
+			err = SIGILL;
+			break;
+		}
+		/* fall through */
+	case beql_op:
+	case bnel_op:
 		if (delay_slot(regs)) {
 			err = SIGILL;
 			break;

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/mips-r2-on-r6-emu-fix-blezl-and-bgtzl-identification.patch