Patch "pinctrl: rockchip: enable clock when reading pin direction register" has been added to the 4.14-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
pinctrl: rockchip: enable clock when reading pin direction register
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pinctrl-rockchip-enable-clock-when-reading-pin-direction-register.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From foo@baz Thu Mar 22 14:26:48 CET 2018
From: Brian Norris <[email protected]>
Date: Tue, 12 Dec 2017 09:43:43 -0800
Subject: pinctrl: rockchip: enable clock when reading pin direction register
From: Brian Norris <[email protected]>
[ Upstream commit 5c9d8c4f6b8168738a26bcf288516cc3a0886810 ]
We generally leave the GPIO clock disabled, unless an interrupt is requested or we're accessing IO registers. We forgot to do this for the ->get_direction() callback, which means we can sometimes [1] get incorrect results [2] from, e.g., /sys/kernel/debug/gpio.
Enable the clock, so we get the right results!
[1] Sometimes, because many systems have 1 or mor interrupt requested on each GPIO bank, so they always leave their clock on.
[2] Incorrect, meaning the register returns 0, and so we interpret that as "input".
--- drivers/pinctrl/pinctrl-rockchip.c | 8 ++++++++ 1 file changed, 8 insertions(+)
drivers/pinctrl/pinctrl-rockchip.c +8 -0
@@ -1989,8 +1989,16 @@ static int rockchip_gpio_get_direction(s {struct rockchip_pin_bank *bank =gpiochip_get_data (chip);u32 data; +int ret; + ret =clk_enable (bank->clk); +if (ret <0 ) { +dev_err (bank->drvdata->dev, +"failed to enable clock for bank %s\n" , bank->name); +return ret; + } data =readl_relaxed (bank->reg_base +GPIO_SWPORT_DDR ); +clk_disable (bank->clk);return !(data &BIT (offset)); }
Patches currently in stable-queue which might be from [email protected] are
queue-4.14/pinctrl-rockchip-enable-clock-when-reading-pin-direction-register.patch queue-4.14/platform-chrome-use-proper-protocol-transfer-function.patch