arm: dts: sun7i: Update Ainol AW1 dts
PATCH 1/3 arm: dts: sun7i: Update Ainol AW1 dts
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Content preview: This introduces a newer dts for the Ainol AW1, that will be
the base for introducing upstream Linux support for the device. This update in U-Boot allows fixing USB OTG detection, that was missing from the previous dts. [...]
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From: Paul Kocialkowski <[email protected]>
Subject: [PATCH 1/3] arm: dts: sun7i: Update Ainol AW1 dts
Date: Sun, 25 Mar 2018 14:35:59 +0200
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URL: <http://lists.denx.de/pipermail/u-boot/attachments/20180325/f3056183/attachment.mht>
PATCH 1/3 arm: dts: sun7i: Update Ainol AW1 dts
Hi,
Quoted 7 lines · Paul Kocialkowski
This introduces a newer dts for the Ainol AW1, that will be the base for introducing upstream Linux support for the device.
This update in U-Boot allows fixing USB OTG detection, that was missing from the previous dts.
Signed-off-by Paul Kocialkowski <[email protected]>
We usually will use the Linux DTS once it's been merged, so please send it there first.
Quoted 47 lines
--- arch/arm/dts/sun7i-a20-ainol-aw1.dts | 215 ++++++++++++++++++++++++++++++++++- 1 file changed, 211 insertions(+), 4 deletions(-)arch/arm/dts/sun7i-a20-ainol-aw1.dts +32
-3@@ -1,17 +1,57 @@ /* - * Copyright 2015 Hans de Goede <[email protected]> + * Copyright 2018 Paul Kocialkowski <[email protected]> * - * Minimal dts file for the Ainol AW1 for u-boot only + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. * - * SPDX-License-Identifier: GPL-2.0+ or X11 + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
arch/arm/dts/sun7i-a20-ainol-aw1.dts line 45
Quoted 10 lines
arch/arm/dts/sun7i-a20-ainol-aw1.dts +6
-0+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi"
Since you have regulator support, you shouldn't need these anymore.
Quoted 67 lines
arch/arm/dts/sun7i-a20-ainol-aw1.dts +56
-1+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pwm/pwm.h> / { model = "Ainol AW1"; - compatible = "ainol,aw1", "allwinner,sun7i-a20"; + compatible = "ainol,ainol-aw1", "allwinner,sun7i-a20"; aliases { serial0 = &uart0;@@ -20,6 +60,116 @@ chosen { stdout-path = "serial0:115200n8"; }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&backlight_enable_pin>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&otg_sram { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 {
arch/arm/dts/sun7i-a20-ainol-aw1.dts line 123
Quoted 10 lines
arch/arm/dts/sun7i-a20-ainol-aw1.dts +10
-0+ status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +};
Your nodes should be ordered by alphabetical order (at least as much as possible, this isn't really doable for all the AXP stuff).
Quoted 7 lines
arch/arm/dts/sun7i-a20-ainol-aw1.dts +7
-0+&pio { + backlight_enable_pin: backlight_enable_pin at 0 { + pins = "PH7"; + function = "gpio_out"; + }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 {
arch/arm/dts/sun7i-a20-ainol-aw1.dts line 140
Quoted 10 lines
arch/arm/dts/sun7i-a20-ainol-aw1.dts +10
-0+ pins = "PH4"; + function = "gpio_in"; + bias-pull-up; + }; + + usb0_vbus_pin: usb0_vbus_pin at 0 { + pins = "PB9"; + function = "gpio_out"; + }; +};
We're trying to remove these nodes from our DTs, it's redundant since the GPIOs will request the pin in pinctrl when being taken.
Quoted 98 lines
arch/arm/dts/sun7i-a20-ainol-aw1.dts +88
-0+ +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button at 571 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <571428>; + }; + + button at 761 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <761904>; + }; + + button at 952 { + label = "Home"; + linux,code = <KEY_HOME>; + channel = <0>; + voltage = <952380>; + }; }; &uart0 {@@ -27,3 +177,60 @@ pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic at 34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp209.dtsi" + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb0_vbus { + pinctrl-0 = <&usb0_vbus_pin>; + gpio = <&pio 1 9 GPIO_ACTIVE_HIGH>; /*PB9 */ + status = "okay"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +};Signature · 1 line
2.16.2
Signature · 10 lines
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PATCH 1/3 arm: dts: sun7i: Update Ainol AW1 dts
Hi,
Quoted 7 lines · Maxime Ripard
Hi,
Quoted 4 lines · Paul Kocialkowski
This introduces a newer dts for the Ainol AW1, that will be the base for
introducing upstream Linux support for the device.
Quoted 8 lines
Quoted 5 lines
This update in U-Boot allows fixing USB OTG detection, that was missing
from the previous dts.Signed-off-by Paul Kocialkowski <[email protected]>We usually will use the Linux DTS once it's been merged, so please send it there first.
Sure thing!
[...]
Quoted 2 lines
Your nodes should be ordered by alphabetical order (at least as much as possible, this isn't really doable for all the AXP stuff).
I tried to preserve the order from the sun7i-a20.dtsi file, which felt like the most straightforward thing to do.
Is there any particlar reason why things should be sorted alphabetically? It feels like it has the potential to explode related blocs in different areas of the file, thus reducing readability (like you've mentioned for the AXP).
Quoted 121 lines
Quoted 7 lines
+&pio {
(quoted diff) +6
-0+ backlight_enable_pin: backlight_enable_pin at 0 { + pins = "PH7"; + function = "gpio_out"; + }; + + usb0_id_detect_pin: usb0_id_detect_pin at 0 {Review
Quoted 10 lines
(quoted diff) +10
-0+ pins = "PH4"; + function = "gpio_in"; + bias-pull-up; + }; + + usb0_vbus_pin: usb0_vbus_pin at 0 { + pins = "PB9"; + function = "gpio_out"; + }; +};We're trying to remove these nodes from our DTs, it's redundant since the GPIOs will request the pin in pinctrl when being taken.
Quoted 98 lines
(quoted diff) +88
-0+ +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button at 571 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <571428>; + }; + + button at 761 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <761904>; + }; + + button at 952 { + label = "Home"; + linux,code = <KEY_HOME>; + channel = <0>; + voltage = <952380>; + }; }; &uart0 {@@ -27,3 +177,60 @@ pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic at 34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp209.dtsi" + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb0_vbus { + pinctrl-0 = <&usb0_vbus_pin>; + gpio = <&pio 1 9 GPIO_ACTIVE_HIGH>; /*PB9 */ + status = "okay"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +};Signature · 1 line
2.16.2
Signature · 10 lines
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PATCH 1/3 arm: dts: sun7i: Update Ainol AW1 dts
Quoted 10 lines · Paul Kocialkowski
Quoted 2 lines
Your nodes should be ordered by alphabetical order (at least as much as possible, this isn't really doable for all the AXP stuff).
I tried to preserve the order from the
sun7i-a20.dtsifile, which felt like the most straightforward thing to do.Is there any particlar reason why things should be sorted alphabetically? It feels like it has the potential to explode related blocs in different areas of the file, thus reducing readability (like you've mentioned for the AXP).
It's what we're doing everywhere else would be a great reason :)
The second, and the reason we actually did this in the first place, is that it's self sufficient, you don't need to rely on any other DTSI file to know which order you're suppose to have.
That becomes especially tricky when you're merging various DTSI together (which order should comes first?), or when you don't always access a node to the same depth (ie tcon vs tcon_out).
While alphabetical order is easy to understand, follow and to check during the reviews.
Maxime
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PATCH 3/3 sunxi: Add extra I2C bus support to Ainol AW1 defconfig
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Content preview: I2C bus 1 is used for the accelerometer and i2c bus 2 for
the touchscreen of the device. While these are not supported in U-Boot, its
command line can be used to access these peripherals. Signed-off-by: Paul Kocialkowski <[email protected]> --- configs/Ainol_AW1_defconfig | 2 ++ 1
file changed, 2 insertions(+) [...]
Content analysis details: (5.2 points, 5.0 required)
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1.3 RCVD_IN_RP_RNBL RBL: Relay in RNBL,
https://senderscore.org/blacklistlookup/ [77.128.107.220 listed in bl.score.senderscore.com] 0.0 RCVD_IN_SORBS_DUL RBL: SORBS: sent directly from dynamic IP address [77.128.107.220 listed in dnsbl.sorbs.net] 3.6 RCVD_IN_PBL RBL: Received via a relay in Spamhaus PBL [77.128.107.220 listed in zen.spamhaus.org]
0.4 RDNS_DYNAMIC Delivered to internal network by host with
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From: Paul Kocialkowski <[email protected]>
Subject: [PATCH 3/3] sunxi: Add extra I2C bus support to Ainol AW1 defconfig
Date: Sun, 25 Mar 2018 14:36:01 +0200
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PATCH 3/3 sunxi: Add extra I2C bus support to Ainol AW1 defconfig
Quoted 5 lines · Paul Kocialkowski
I2C bus 1 is used for the accelerometer and i2c bus 2 for the touchscreen of the device. While these are not supported in U-Boot, its command line can be used to access these peripherals.
Signed-off-by Paul Kocialkowski <[email protected]>
I'm not sure what the use case would be for U-Boot though. I guess you can always enable it through menuconfig if you really want it, but there's no real need for it in the default configuration.
Maxime
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PATCH 3/3 sunxi: Add extra I2C bus support to Ainol AW1 defconfig
Hi,
Quoted 11 lines · Maxime Ripard
Quoted 6 lines · Paul Kocialkowski
I2C bus 1 is used for the accelerometer and i2c bus 2 for the touchscreen of the device. While these are not supported in U-Boot, its
command line can be used to access these peripherals.Signed-off-by Paul Kocialkowski <[email protected]>I'm not sure what the use case would be for U-Boot though. I guess you can always enable it through menuconfig if you really want it, but there's no real need for it in the default configuration.
Fair enough, I'll drop this patch.
Cheers,
Signature · 10 lines
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