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SF: add support for sst26wf016, sst26wf032, sst26wf064

PATCH Superseded Eugeniy Paltsev 3 participants 11 messages Mar 26, 2018 – Apr 5, 2018 Memory technology devices (MTD)

v2 of 5 Superseded Latest is v5 →

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Eugeniy Paltsev

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#0 lore raw

v2 cover SF: add support for sst26wf016, sst26wf032, sst26wf064

Add support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC:

sst26wf*** flash series block protection implementation differs from other SST series, so we add implementation for sst26wf*** lock/unlock/is_locked functions.

Add sst26wf016, sst26wf032 and sst26wf064 flash IC info to spi_flash_ids list.

Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.

Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash series
SF: add support for sst26wf016, sst26wf032, sst26wf064

 drivers/mtd/spi/spi_flash.c     | 188 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash_ids.c |   3 +
 2 files changed, 191 insertions(+)
Signature · 1 line
2.14.3
author
#1 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

Signed-off-by Eugeniy Paltsev <[email protected]>

---
Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.

 drivers/mtd/spi/spi_flash.c | 188 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 188 insertions(+)
drivers/mtd/spi/spi_flash.c +188 -0
index 2e61685d3e..4149a17990 100644
@@ -16,6 +16,7 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <linux/log2.h>
+#include <linux/sizes.h>
 #include <dma.h>
 
 #include "sf_internal.h"

@@ -842,6 +843,183 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 }
 #endif
 
+#if defined(CONFIG_SPI_FLASH_SST)
+#define SST26_CMD_READ_BPR		0x72
+#define SST26_CMD_WRITE_BPR		0x42
+
+#define MAX_BPR_REG_LEN			(18 + 1)
+#define SST26WF_BOUND_REG_SIZE		((32 + 4 * 8) * SZ_1K)
+
+bool sst26_check_bpr(u32 bpr_size, u8 *cmd, u32 bit)
+{
+	return !!(cmd[bpr_size - (bit / 8) - 1] & BIT(bit % 8));
+}
+
+bool sst26_clear_bpr(u32 bpr_size, u8 *cmd, u32 bit)
+{
+	cmd[bpr_size - (bit / 8) - 1] &= ~BIT(bit % 8);
+	return false;
+}
+
+bool sst26_set_bpr(u32 bpr_size, u8 *cmd, u32 bit)
+{
+	cmd[bpr_size - (bit / 8) - 1] |= BIT(bit % 8);
+	return false;
+}
+
+enum lock_ctl {
+	CTL_LOCK,
+	CTL_UNLOCK,
+	CTL_CHECK
+};
+
+/*
+ * sst26wf016/sst26wf032/sst26wf064 have next block protection:
+ * 4x   - 8  KByte blocks - read & write protection bits - upper addresses
+ * 1x   - 32 KByte blocks - write protection bits
+ * rest - 64 KByte blocks - write protection bits
+ * 1x   - 32 KByte blocks - write protection bits
+ * 4x   - 8  KByte blocks - read & write protection bits - lower addresses
+ *
+ * We'll support only per 64k lock/unlock so lower and upper 64 KByte region
+ * will be treated as single block.
+ */
+
+/*
+ * Lock, unlock or check lock status of the flash region of the flash (depending
+ * on the lock_ctl value)
+ */
+int sst26_lock_ctl(struct spi_flash *flash, u32 ofs, size_t len, enum lock_ctl ctl)
+{
+	u32 i, bpr_ptr, rptr_64k, lptr_64k, bpr_size;
+	bool lower_64k = false, upper_64k = false;
+	u8 cmd, bpr_buff[MAX_BPR_REG_LEN] = {};
+	int ret;
+
+	bool (* bpr_bit_process) (u32 bpr_size, u8 *, u32);
+
+	/* Check length and offset for 64k alignment */
+	if ((ofs & (SZ_64K - 1)) || (len & (SZ_64K - 1)))
+		return -EINVAL;
+
+	if (ofs + len > flash->size)
+		return -EINVAL;
+
+	/* SST26 family has only 16 Mbit, 32 Mbit and 64 Mbit IC */
+	if (flash->size != SZ_2M &&
+	    flash->size != SZ_4M &&
+	    flash->size != SZ_8M)
+		return -EINVAL;
+
+	bpr_size = 2 + (flash->size / SZ_64K / 8);
+
+	cmd = SST26_CMD_READ_BPR;
+	ret = spi_flash_read_common(flash, &cmd, 1, bpr_buff, bpr_size);
+	if (ret < 0) {
+		printf("SF: fail to read block-protection register\n");
+		return ret;
+	}
+
+	if (ctl == CTL_LOCK)
+		bpr_bit_process = sst26_set_bpr;
+	else if (ctl == CTL_UNLOCK)
+		bpr_bit_process = sst26_clear_bpr;
+	else
+		bpr_bit_process = sst26_check_bpr;
+
+	rptr_64k = min_t(u32, ofs + len , flash->size - SST26WF_BOUND_REG_SIZE);
+	lptr_64k = max_t(u32, ofs, SST26WF_BOUND_REG_SIZE);
+
+	upper_64k = ((ofs + len) > (flash->size - SST26WF_BOUND_REG_SIZE));
+	lower_64k = (ofs < SST26WF_BOUND_REG_SIZE);
+
+	/* Lower bits in block-protection register are about 64k region */
+	bpr_ptr = lptr_64k / SZ_64K - 1;
+
+	/* Process 64K blocks region */
+	while (lptr_64k < rptr_64k) {
+		if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+			return 1;
+
+		bpr_ptr++;
+		lptr_64k += SZ_64K;
+	}
+
+	/* 32K and 8K region bits in BPR are after 64k region bits */
+	bpr_ptr = (flash->size - 2 * SST26WF_BOUND_REG_SIZE) / SZ_64K;
+
+	/* Process lower 32K block region */
+	if (lower_64k)
+		if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+			return 1;
+
+	bpr_ptr++;
+
+	/* Process upper 32K block region */
+	if (upper_64k)
+		if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+			return 1;
+
+	bpr_ptr++;
+
+	/* Process lower 8K block regions */
+	for (i = 0; i < 4; i++) {
+		if (lower_64k)
+			if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+				return 1;
+
+		/* In 8K area BPR has both read and write protection bits */
+		bpr_ptr += 2;
+	}
+
+	/* Process upper 8K block regions */
+	for (i = 0; i < 4; i++) {
+		if (upper_64k)
+			if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+				return 1;
+
+		/* In 8K area BPR has both read and write protection bits */
+		bpr_ptr += 2;
+	}
+
+	/* If we check region status we don't need to write BPR back */
+	if (ctl == CTL_CHECK)
+		return 0;
+
+	cmd = SST26_CMD_WRITE_BPR;
+	ret = spi_flash_write_common(flash, &cmd, 1, bpr_buff, bpr_size);
+	if (ret < 0) {
+		printf("SF: fail to write block-protection register\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+int sst26_unlock(struct spi_flash *flash, u32 ofs, size_t len)
+{
+	return sst26_lock_ctl(flash, ofs, len, CTL_UNLOCK);
+}
+
+int sst26_lock(struct spi_flash *flash, u32 ofs, size_t len)
+{
+	return sst26_lock_ctl(flash, ofs, len, CTL_LOCK);
+}
+
+int sst26_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
+{
+	/*
+	 * is_locked function is used for check before reading or erasing flash
+	 * region, so offset and length might be not 64k allighned, so adjust
+	 * them to be 64k allighned as sst26_lock_ctl works only with 64k
+	 * allighned regions.
+	 */
+	ofs -= ofs & (SZ_64K - 1);
+	len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
+
+	return sst26_lock_ctl(flash, ofs, len, CTL_CHECK);
+}
+#endif
 
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 static int macronix_quad_enable(struct spi_flash *flash)

@@ -1033,6 +1211,16 @@ int spi_flash_scan(struct spi_flash *flash)
 	}
 #endif
 
+/* sst26wf series block protection implementation differs from other series */
+#if defined(CONFIG_SPI_FLASH_SST)
+	if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST &&
+	    (JEDEC_ID(info) >> 8) == 0x26) {
+		flash->flash_lock = sst26_lock;
+		flash->flash_unlock = sst26_unlock;
+		flash->flash_is_locked = sst26_is_locked;
+	}
+#endif
+
 	/* Compute the flash size */
 	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
 	flash->page_size = info->page_size;
Signature · 1 line
2.14.3
#2 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

Quoted 3 lines · Eugeniy Paltsev

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

I've already mentioned about this patch on last version[1], Since it effected code on spi_flash (core) I would ask him to send the Linux as well. And waiting for those as well.

[1] https://patchwork.ozlabs.org/patch/869842/

Jagan.

#3 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

Hi Jagan,

Quoted 9 lines · Jagan Teki
Quoted 3 lines · Eugeniy Paltsev

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

I've already mentioned about this patch on last version[1], Since it effected code on spi_flash (core) I would ask him to send the Linux as well. And waiting for those as well.

We're going to send a similar patch for the Linux kernel as well. But we're discussing U-Boot here so what is a relationship between patches here and there?

Please note what Eugeniy answered to your comment [1]- if sst26xxx ICs are used in read-only mode or some earlier stage disabled write lock for entire IC mentioned patch is not required. But in case of default state of those ICs we do need to allow writes to certain regions of the flash ICs.

[1] https://lists.denx.de/pipermail/u-boot/2018-March/322630.html

-Alexey

#4 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

Quoted 9 lines · Alexey Brodkin

Hi Jagan,

Quoted 6 lines · Jagan Teki
Quoted 3 lines · Eugeniy Paltsev

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

Quoted 7 lines
Quoted 3 lines

I've already mentioned about this patch on last version[1], Since it effected code on spi_flash (core) I would ask him to send the Linux as well. And waiting for those as well.

We're going to send a similar patch for the Linux kernel as well. But we're discussing U-Boot here so what is a relationship between patches here and there?

I thought I'm waiting for Linux pathes and do the review accordingly, anyway I will do a final look and apply of OK.

Jagan.

Signature · 4 lines
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
#5 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

In reply to Eugeniy Paltsev
Quoted 3 lines · Eugeniy Paltsev

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

Look like all this series add only protection ops, try to change the commit head according to that.

Quoted 22 lines
Signed-off-by Eugeniy Paltsev <[email protected]>

---
Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.

 drivers/mtd/spi/spi_flash.c | 188 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 188 insertions(+)
drivers/mtd/spi/spi_flash.c +1 -0
index 2e61685d3e..4149a17990 100644
@@ -16,6 +16,7 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <linux/log2.h>
+#include <linux/sizes.h>
 #include <dma.h>
 
 #include "sf_internal.h"

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 846

Quoted 4 lines
drivers/mtd/spi/spi_flash.c +1 -0
@@ -842,6 +843,183 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 }
 #endif
 
+#if defined(CONFIG_SPI_FLASH_SST)

We have SST code inside this macro, try to move this on that area.

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 851

Quoted 5 lines
drivers/mtd/spi/spi_flash.c +5 -0
+#define SST26_CMD_READ_BPR             0x72
+#define SST26_CMD_WRITE_BPR            0x42
+
+#define MAX_BPR_REG_LEN                        (18 + 1)
+#define SST26WF_BOUND_REG_SIZE         ((32 + 4 * 8) * SZ_1K)

Move all these macros on sf_internal.h with SST prefix where we have SST ifdef.

Quoted 7 lines
drivers/mtd/spi/spi_flash.c +7 -0
+
+bool sst26_check_bpr(u32 bpr_size, u8 *cmd, u32 bit)
+{
+       return !!(cmd[bpr_size - (bit / 8) - 1] & BIT(bit % 8));
+}
+
+bool sst26_clear_bpr(u32 bpr_size, u8 *cmd, u32 bit)

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 868

Quoted 10 lines
drivers/mtd/spi/spi_flash.c +10 -0
+{
+       cmd[bpr_size - (bit / 8) - 1] &= ~BIT(bit % 8);
+       return false;
+}
+
+bool sst26_set_bpr(u32 bpr_size, u8 *cmd, u32 bit)
+{
+       cmd[bpr_size - (bit / 8) - 1] |= BIT(bit % 8);
+       return false;
+}

static functions?

Quoted 21 lines
drivers/mtd/spi/spi_flash.c +21 -0
+
+enum lock_ctl {
+       CTL_LOCK,
+       CTL_UNLOCK,
+       CTL_CHECK
+};
+
+/*
+ * sst26wf016/sst26wf032/sst26wf064 have next block protection:
+ * 4x   - 8  KByte blocks - read & write protection bits - upper addresses
+ * 1x   - 32 KByte blocks - write protection bits
+ * rest - 64 KByte blocks - write protection bits
+ * 1x   - 32 KByte blocks - write protection bits
+ * 4x   - 8  KByte blocks - read & write protection bits - lower addresses
+ *
+ * We'll support only per 64k lock/unlock so lower and upper 64 KByte region
+ * will be treated as single block.
+ */
+
+/*
+ * Lock, unlock or check lock status of the flash region of the flash (depending

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 899

Quoted 10 lines
drivers/mtd/spi/spi_flash.c +10 -0
+ * on the lock_ctl value)
+ */
+int sst26_lock_ctl(struct spi_flash *flash, u32 ofs, size_t len, enum lock_ctl ctl)
+{
+       u32 i, bpr_ptr, rptr_64k, lptr_64k, bpr_size;
+       bool lower_64k = false, upper_64k = false;
+       u8 cmd, bpr_buff[MAX_BPR_REG_LEN] = {};
+       int ret;
+
+       bool (* bpr_bit_process) (u32 bpr_size, u8 *, u32);

Deceleration inside function definition? try to avoid this.

Quoted 19 lines
drivers/mtd/spi/spi_flash.c +19 -0
+
+       /* Check length and offset for 64k alignment */
+       if ((ofs & (SZ_64K - 1)) || (len & (SZ_64K - 1)))
+               return -EINVAL;
+
+       if (ofs + len > flash->size)
+               return -EINVAL;
+
+       /* SST26 family has only 16 Mbit, 32 Mbit and 64 Mbit IC */
+       if (flash->size != SZ_2M &&
+           flash->size != SZ_4M &&
+           flash->size != SZ_8M)
+               return -EINVAL;
+
+       bpr_size = 2 + (flash->size / SZ_64K / 8);
+
+       cmd = SST26_CMD_READ_BPR;
+       ret = spi_flash_read_common(flash, &cmd, 1, bpr_buff, bpr_size);
+       if (ret < 0) {

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 928

Quoted 10 lines
drivers/mtd/spi/spi_flash.c +10 -0
+               printf("SF: fail to read block-protection register\n");
+               return ret;
+       }
+
+       if (ctl == CTL_LOCK)
+               bpr_bit_process = sst26_set_bpr;
+       else if (ctl == CTL_UNLOCK)
+               bpr_bit_process = sst26_clear_bpr;
+       else
+               bpr_bit_process = sst26_check_bpr;

These functions do single step, avoid these function pointers and call single function and check the ctl and do accordingly.

Quoted 4 lines
drivers/mtd/spi/spi_flash.c +4 -0
+
+       rptr_64k = min_t(u32, ofs + len , flash->size - SST26WF_BOUND_REG_SIZE);
+       lptr_64k = max_t(u32, ofs, SST26WF_BOUND_REG_SIZE);
+

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 942

Quoted 10 lines
drivers/mtd/spi/spi_flash.c +10 -0
+       upper_64k = ((ofs + len) > (flash->size - SST26WF_BOUND_REG_SIZE));
+       lower_64k = (ofs < SST26WF_BOUND_REG_SIZE);
+
+       /* Lower bits in block-protection register are about 64k region */
+       bpr_ptr = lptr_64k / SZ_64K - 1;
+
+       /* Process 64K blocks region */
+       while (lptr_64k < rptr_64k) {
+               if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+                       return 1;

error code?

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 954

Quoted 12 lines
drivers/mtd/spi/spi_flash.c +12 -0
+
+               bpr_ptr++;
+               lptr_64k += SZ_64K;
+       }
+
+       /* 32K and 8K region bits in BPR are after 64k region bits */
+       bpr_ptr = (flash->size - 2 * SST26WF_BOUND_REG_SIZE) / SZ_64K;
+
+       /* Process lower 32K block region */
+       if (lower_64k)
+               if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+                       return 1;

error code?

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 961

Quoted 7 lines
drivers/mtd/spi/spi_flash.c +7 -0
+
+       bpr_ptr++;
+
+       /* Process upper 32K block region */
+       if (upper_64k)
+               if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+                       return 1;

error code?

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 970

Quoted 9 lines
drivers/mtd/spi/spi_flash.c +9 -0
+
+       bpr_ptr++;
+
+       /* Process lower 8K block regions */
+       for (i = 0; i < 4; i++) {
+               if (lower_64k)
+                       if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+                               return 1;
+

error code

drivers/mtd/spi/spi_flash.c int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) · line 980

Quoted 10 lines
drivers/mtd/spi/spi_flash.c +10 -0
+               /* In 8K area BPR has both read and write protection bits */
+               bpr_ptr += 2;
+       }
+
+       /* Process upper 8K block regions */
+       for (i = 0; i < 4; i++) {
+               if (upper_64k)
+                       if (bpr_bit_process(bpr_size, bpr_buff, bpr_ptr))
+                               return 1;
+

error code

Quoted 46 lines
drivers/mtd/spi/spi_flash.c +42 -0
+               /* In 8K area BPR has both read and write protection bits */
+               bpr_ptr += 2;
+       }
+
+       /* If we check region status we don't need to write BPR back */
+       if (ctl == CTL_CHECK)
+               return 0;
+
+       cmd = SST26_CMD_WRITE_BPR;
+       ret = spi_flash_write_common(flash, &cmd, 1, bpr_buff, bpr_size);
+       if (ret < 0) {
+               printf("SF: fail to write block-protection register\n");
+               return ret;
+       }
+
+       return 0;
+}
+
+int sst26_unlock(struct spi_flash *flash, u32 ofs, size_t len)
+{
+       return sst26_lock_ctl(flash, ofs, len, CTL_UNLOCK);
+}
+
+int sst26_lock(struct spi_flash *flash, u32 ofs, size_t len)
+{
+       return sst26_lock_ctl(flash, ofs, len, CTL_LOCK);
+}
+
+int sst26_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
+{
+       /*
+        * is_locked function is used for check before reading or erasing flash
+        * region, so offset and length might be not 64k allighned, so adjust
+        * them to be 64k allighned as sst26_lock_ctl works only with 64k
+        * allighned regions.
+        */
+       ofs -= ofs & (SZ_64K - 1);
+       len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
+
+       return sst26_lock_ctl(flash, ofs, len, CTL_CHECK);
+}
+#endif
 
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 static int macronix_quad_enable(struct spi_flash *flash)

drivers/mtd/spi/spi_flash.c int spi_flash_scan(struct spi_flash *flash) · line 1217

Quoted 7 lines
drivers/mtd/spi/spi_flash.c +4 -0
@@ -1033,6 +1211,16 @@ int spi_flash_scan(struct spi_flash *flash)
        }
 #endif
 
+/* sst26wf series block protection implementation differs from other series */
+#if defined(CONFIG_SPI_FLASH_SST)
+       if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST &&
+           (JEDEC_ID(info) >> 8) == 0x26) {

You can directly use JEDEC_ID that may cover id[0], id[1]? or does this only for id[0]?

drivers/mtd/spi/spi_flash.c int spi_flash_scan(struct spi_flash *flash) · line 1222

Quoted 5 lines
drivers/mtd/spi/spi_flash.c +5 -0
+               flash->flash_lock = sst26_lock;
+               flash->flash_unlock = sst26_unlock;
+               flash->flash_is_locked = sst26_is_locked;
+       }
+#endif

Try to integrated this ifdef to existing lock cases? switch case would be more preferable?

Jagan.

author
#6 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

Quoted 5 lines · Jagan Teki
Quoted 3 lines · Eugeniy Paltsev

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

[snip]

Quoted 8 lines

drivers/mtd/spi/spi_flash.c int spi_flash_scan(struct spi_flash *flash) · line 1217

Quoted 5 lines
drivers/mtd/spi/spi_flash.c +4 -0
+/* sst26wf series block protection implementation differs from other series */
+#if defined(CONFIG_SPI_FLASH_SST)
+       if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST &&
+           (JEDEC_ID(info) >> 8) == 0x26) {

You can directly use JEDEC_ID that may cover id[0], id[1]? or does this only for id[0]?

It is only for "JEDEC Device Type Byte" (byte 1) == 0x26; "Device ID Byte" (byte 2) can be any.

But I can write it like
(info->id[1] == 0x26)
instead of
((JEDEC_ID(info) >> 8) == 0x26)

Signature · 1 line
 Eugeniy Paltsev
#7 lore raw

PATCH v2 1/2 SPI Flash: add support of sst26wf* flash series

Quoted 16 lines · Eugeniy Paltsev
Quoted 5 lines · Jagan Teki
Quoted 3 lines · Eugeniy Paltsev

sst26wf flash series block protection implementation differs from other SST series, so add implementation for sst26wf lock/unlock/is_locked functions.

[snip]

Quoted 8 lines

drivers/mtd/spi/spi_flash.c int spi_flash_scan(struct spi_flash *flash) · line 1217

Quoted 5 lines
drivers/mtd/spi/spi_flash.c +4 -0
+/* sst26wf series block protection implementation differs from other series */
+#if defined(CONFIG_SPI_FLASH_SST)
+       if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST &&
+           (JEDEC_ID(info) >> 8) == 0x26) {

You can directly use JEDEC_ID that may cover id[0], id[1]? or does this only for id[0]?

Quoted 7 lines

It is only for "JEDEC Device Type Byte" (byte 1) == 0x26; "Device ID Byte" (byte 2) can be any.

But I can write it like
(info->id[1] == 0x26)
instead of
((JEDEC_ID(info) >> 8) == 0x26)

OK.

author
#8 lore raw

PATCH v2 2/2 SF: add support for sst26wf016, sst26wf032, sst26wf064

In reply to Eugeniy Paltsev

This commit adds support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC.

Signed-off-by Eugeniy Paltsev <[email protected]>

---
Changes v1->v2:
* None.

 drivers/mtd/spi/spi_flash_ids.c | 3 +++
 1 file changed, 3 insertions(+)
drivers/mtd/spi/spi_flash_ids.c +3 -0
index b789219e4e..dbb4ac4d32 100644
@@ -151,6 +151,9 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"sst25wf040",	   INFO(0xbf2504, 0x0,	64 * 1024,     8, SECT_4K | SST_WR) },
 	{"sst25wf040b",	   INFO(0x621613, 0x0,	64 * 1024,     8, SECT_4K) },
 	{"sst25wf080",	   INFO(0xbf2505, 0x0,	64 * 1024,    16, SECT_4K | SST_WR) },
+	{"sst26wf016",	   INFO(0xbf2651, 0x0,	64 * 1024,    32, SECT_4K) },
+	{"sst26wf032",	   INFO(0xbf2622, 0x0,	64 * 1024,    64, SECT_4K) },
+	{"sst26wf064",	   INFO(0xbf2643, 0x0,	64 * 1024,   128, SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
 	{"w25p80",	   INFO(0xef2014, 0x0,	64 * 1024,    16, 0) },
Signature · 1 line
2.14.3
#9 lore raw

v2 cover SF: add support for sst26wf016, sst26wf032, sst26wf064

In reply to Eugeniy Paltsev

Hi Jagan,

Quoted 11 lines · Eugeniy Paltsev

Add support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC:

sst26wf*** flash series block protection implementation differs from other SST series, so we add implementation for sst26wf*** lock/unlock/is_locked functions.

Add sst26wf016, sst26wf032 and sst26wf064 flash IC info to spi_flash_ids list.

Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.

Could you please pull in this series sometime soon if there're no objections.

It is a dependency for another series [1] that we'd like to get merged in the upcoming release of U-Boot. And for that these changes need to hit Tom's tree before the end of this week.

Regards,
Alexey

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35818

Quoted 8 lines

Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash series
SF: add support for sst26wf016, sst26wf032, sst26wf064

 drivers/mtd/spi/spi_flash.c     | 188 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash_ids.c |   3 +
 2 files changed, 191 insertions(+)
#10 lore raw

v2 cover SF: add support for sst26wf016, sst26wf032, sst26wf064

In reply to Eugeniy Paltsev

Hi Jagan,

Quoted 12 lines · Eugeniy Paltsev

Add support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC:

sst26wf*** flash series block protection implementation differs from other SST series, so we add implementation for sst26wf*** lock/unlock/is_locked functions.

Add sst26wf016, sst26wf032 and sst26wf064 flash IC info to spi_flash_ids list.

Changes v1->v2:
* Use generic defines from linux/sizes.h instead of custom ones.

Quoted 7 lines

Eugeniy Paltsev (2):
SPI Flash: add support of sst26wf* flash series
SF: add support for sst26wf016, sst26wf032, sst26wf064

 drivers/mtd/spi/spi_flash.c     | 188 ++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash_ids.c |   3 +
 2 files changed, 191 insertions(+)

Any chance for this series to hit your's and then Tom's repos before RC1 gets cut on Monday April 2nd?

-Alexey