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drm/msm: Remove RSC support from DPU driver

PATCH In review Rajesh Yadav 1 participant 1 message Apr 4, 2018

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PATCH v2 2/2 drm/msm: Remove RSC support from DPU driver

Display controller's power resources and bus
bandwidth voting is controlled by dpu driver.
Remove DPU RSC driver support.

---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c    |  130 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h    |    6 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c         |   14 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h         |    9 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c      |  242 +---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h      |    7 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h |    1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c       |   20 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h       |    3 -
 drivers/gpu/drm/msm/dpu_dbg.c                    |   27 -
 drivers/gpu/drm/msm/dpu_dbg.h                    |   10 -
 drivers/gpu/drm/msm/dpu_power_handle.c           |   73 +-
 drivers/gpu/drm/msm/dpu_power_handle.h           |    4 -
 drivers/gpu/drm/msm/dpu_rsc.c                    | 1367 ----------------------
 drivers/gpu/drm/msm/dpu_rsc_hw.c                 |  818 -------------
 drivers/gpu/drm/msm/dpu_rsc_priv.h               |  191 ---
 include/linux/dpu_rsc.h                          |  302 -----
 17 files changed, 42 insertions(+), 3182 deletions(-)
 delete mode 100644 drivers/gpu/drm/msm/dpu_rsc.c
 delete mode 100644 drivers/gpu/drm/msm/dpu_rsc_hw.c
 delete mode 100644 drivers/gpu/drm/msm/dpu_rsc_priv.h
 delete mode 100644 include/linux/dpu_rsc.h
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +6 -124
index 36a4795..981f77f 100644
@@ -18,7 +18,6 @@
 #include <linux/sort.h>
 #include <linux/clk.h>
 #include <linux/bitmap.h>
-#include <linux/dpu_rsc.h>
 
 #include "msm_prop.h"
 
@@ -42,23 +41,6 @@ enum dpu_perf_mode {
 	DPU_PERF_MODE_MAX
 };
 
-/**
- * enum dpu_perf_vote_mode: perf vote mode.
- * @APPS_RSC_MODE:	It combines the vote for all displays and votes it
- *                      through APPS rsc. This is default mode when display
- *                      rsc is not available.
- * @DISP_RSC_MODE:	It combines the vote for all displays and votes it
- *                      through display rsc. This is default configuration
- *                      when display rsc is available.
- * @DISP_RSC_PRIMARY_MODE:	The primary display votes through display rsc
- *                      while all other displays votes through apps rsc.
- */
-enum dpu_perf_vote_mode {
-	APPS_RSC_MODE,
-	DISP_RSC_MODE,
-	DISP_RSC_PRIMARY_MODE,
-};
-
 static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
 {
 	struct msm_drm_private *priv;
@@ -266,38 +248,12 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
 	return 0;
 }
 
-static inline bool _is_crtc_client_type_matches(struct drm_crtc *tmp_crtc,
-	enum dpu_crtc_client_type curr_client_type,
-	struct dpu_core_perf *perf)
-{
-	if (!tmp_crtc)
-		return false;
-	else if (perf->bw_vote_mode == DISP_RSC_PRIMARY_MODE &&
-							perf->dpu_rsc_available)
-		return curr_client_type == dpu_crtc_get_client_type(tmp_crtc);
-	else
-		return true;
-}
-
-static inline enum dpu_crtc_client_type _get_dpu_client_type(
-	enum dpu_crtc_client_type curr_client_type,
-	struct dpu_core_perf *perf)
-{
-	if (perf->bw_vote_mode == DISP_RSC_PRIMARY_MODE &&
-						perf->dpu_rsc_available)
-		return curr_client_type;
-	else if (perf->bw_vote_mode != APPS_RSC_MODE && perf->dpu_rsc_available)
-		return RT_RSC_CLIENT;
-	else
-		return RT_CLIENT;
-}
-
 static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
 		struct drm_crtc *crtc, u32 bus_id)
 {
 	u64 bw_sum_of_intfs = 0, bus_ab_quota, bus_ib_quota;
 	struct dpu_core_perf_params perf = { { 0 } };
-	enum dpu_crtc_client_type client_vote, curr_client_type
+	enum dpu_crtc_client_type curr_client_type
 					= dpu_crtc_get_client_type(crtc);
 	struct drm_crtc *tmp_crtc;
 	struct dpu_crtc_state *dpu_cstate;
@@ -305,8 +261,8 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
 
 	drm_for_each_crtc(tmp_crtc, crtc->dev) {
 		if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
-		    _is_crtc_client_type_matches(tmp_crtc, curr_client_type,
-								&kms->perf)) {
+			curr_client_type ==
+				dpu_crtc_get_client_type(tmp_crtc)) {
 			dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
 
 			perf.max_per_pipe_ib[bus_id] =
@@ -329,8 +285,7 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
 		bus_ib_quota = kms->perf.fix_core_ib_vote;
 	}
 
-	client_vote = _get_dpu_client_type(curr_client_type, &kms->perf);
-	switch (client_vote) {
+	switch (curr_client_type) {
 	case NRT_CLIENT:
 		dpu_power_data_bus_set_quota(&priv->phandle, kms->core_client,
 				DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT,
@@ -347,46 +302,10 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
 				bus_id, bus_ab_quota, bus_ib_quota);
 		break;
 
-	case RT_RSC_CLIENT:
-		dpu_cstate = to_dpu_crtc_state(crtc->state);
-		dpu_rsc_client_vote(dpu_cstate->rsc_client,
-				bus_id, bus_ab_quota, bus_ib_quota);
-		DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "rt_rsc",
-				bus_id, bus_ab_quota, bus_ib_quota);
-		break;
-
 	default:
 		DPU_ERROR("invalid client type:%d\n", curr_client_type);
 		break;
 	}
-
-	if (kms->perf.bw_vote_mode_updated) {
-		switch (kms->perf.bw_vote_mode) {
-		case DISP_RSC_MODE:
-			dpu_power_data_bus_set_quota(&priv->phandle,
-				kms->core_client,
-				DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT,
-				bus_id, 0, 0);
-			dpu_power_data_bus_set_quota(&priv->phandle,
-				kms->core_client,
-				DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT,
-				bus_id, 0, 0);
-			kms->perf.bw_vote_mode_updated = false;
-			break;
-
-		case APPS_RSC_MODE:
-			dpu_cstate = to_dpu_crtc_state(crtc->state);
-			if (dpu_cstate->rsc_client) {
-				dpu_rsc_client_vote(dpu_cstate->rsc_client,
-								bus_id, 0, 0);
-				kms->perf.bw_vote_mode_updated = false;
-			}
-			break;
-
-		default:
-			break;
-		}
-	}
 }
 
 /**
@@ -419,9 +338,8 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc)
 	dpu_crtc = to_dpu_crtc(crtc);
 	dpu_cstate = to_dpu_crtc_state(crtc->state);
 
-	/* only do this for command mode rt client (non-rsc client) */
-	if ((dpu_crtc_get_intf_mode(crtc) != INTF_MODE_CMD) &&
-		(dpu_crtc_get_client_type(crtc) != RT_RSC_CLIENT))
+	/* only do this for command mode rt client */
+	if (dpu_crtc_get_intf_mode(crtc) != INTF_MODE_CMD)
 		return;
 
 	/*
@@ -494,10 +412,6 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc,
 	}
 	priv = kms->dev->dev_private;
 
-	/* wake vote update is not required with display rsc */
-	if (kms->perf.bw_vote_mode == DISP_RSC_MODE && stop_req)
-		return;
-
 	dpu_crtc = to_dpu_crtc(crtc);
 	dpu_cstate = to_dpu_crtc_state(crtc->state);
 
@@ -533,28 +447,6 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc,
 						new->max_per_pipe_ib[i];
 				update_bus |= BIT(i);
 			}
-
-			/* display rsc override during solver mode */
-			if (kms->perf.bw_vote_mode == DISP_RSC_MODE &&
-				get_dpu_rsc_current_state(DPU_RSC_INDEX) ==
-						DPU_RSC_CMD_STATE) {
-				/* update new bandwidth in all cases */
-				if (params_changed && ((new->bw_ctl[i] !=
-						old->bw_ctl[i]) ||
-				      (new->max_per_pipe_ib[i] !=
-						old->max_per_pipe_ib[i]))) {
-					old->bw_ctl[i] = new->bw_ctl[i];
-					old->max_per_pipe_ib[i] =
-							new->max_per_pipe_ib[i];
-					update_bus |= BIT(i);
-				/*
-				 * reduce bw vote is not required in solver
-				 * mode
-				 */
-				} else if (!params_changed) {
-					update_bus &= ~BIT(i);
-				}
-			}
 		}
 
 		if ((params_changed &&
@@ -733,10 +625,6 @@ int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
 			(u32 *)&catalog->perf.min_dram_ib);
 	debugfs_create_file("perf_mode", 0600, perf->debugfs_root,
 			(u32 *)perf, &dpu_core_perf_mode_fops);
-	debugfs_create_u32("bw_vote_mode", 0600, perf->debugfs_root,
-			&perf->bw_vote_mode);
-	debugfs_create_bool("bw_vote_mode_updated", 0600, perf->debugfs_root,
-			&perf->bw_vote_mode_updated);
 	debugfs_create_u64("fix_core_clk_rate", 0600, perf->debugfs_root,
 			&perf->fix_core_clk_rate);
 	debugfs_create_u64("fix_core_ib_vote", 0600, perf->debugfs_root,
@@ -791,12 +679,6 @@ int dpu_core_perf_init(struct dpu_core_perf *perf,
 	perf->phandle = phandle;
 	perf->pclient = pclient;
 	perf->clk_name = clk_name;
-	perf->dpu_rsc_available = is_dpu_rsc_available(DPU_RSC_INDEX);
-	/* set default mode */
-	if (perf->dpu_rsc_available)
-		perf->bw_vote_mode = DISP_RSC_MODE;
-	else
-		perf->bw_vote_mode = APPS_RSC_MODE;
 
 	perf->core_clk = dpu_power_clk_get_clk(phandle, clk_name);
 	if (!perf->core_clk) {
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +0 -6
index 09c01da..1965ff5 100644
@@ -63,9 +63,6 @@ struct dpu_core_perf_tune {
  * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2
  * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2
  * @fix_core_ab_vote: fixed core ab vote in bps used in mode 2
- * @bw_vote_mode: apps rsc vs display rsc bandwidth vote mode
- * @dpu_rsc_available: is display rsc available
- * @bw_vote_mode_updated: bandwidth vote mode update
  */
 struct dpu_core_perf {
 	struct drm_device *dev;
@@ -82,9 +79,6 @@ struct dpu_core_perf {
 	u64 fix_core_clk_rate;
 	u64 fix_core_ib_vote;
 	u64 fix_core_ab_vote;
-	u32 bw_vote_mode;
-	bool dpu_rsc_available;
-	bool bw_vote_mode_updated;
 };
 
 /**
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +0 -14
index 3308929..001ddae 100644
@@ -2048,7 +2048,6 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc,
 static void dpu_crtc_atomic_flush(struct drm_crtc *crtc,
 		struct drm_crtc_state *old_crtc_state)
 {
-	struct drm_encoder *encoder;
 	struct dpu_crtc *dpu_crtc;
 	struct drm_device *dev;
 	struct drm_plane *plane;
@@ -2109,17 +2108,6 @@ static void dpu_crtc_atomic_flush(struct drm_crtc *crtc,
 	drm_atomic_crtc_for_each_plane(plane, crtc)
 		dpu_plane_restore(plane);
 
-	if (!cstate->rsc_update) {
-		drm_for_each_encoder(encoder, dev) {
-			if (encoder->crtc != crtc)
-				continue;
-
-			cstate->rsc_client =
-				dpu_encoder_get_rsc_client(encoder);
-		}
-		cstate->rsc_update = true;
-	}
-
 	/* update performance setting before crtc kickoff */
 	dpu_core_perf_crtc_update(crtc, 1, false);
 
@@ -2661,8 +2649,6 @@ static void dpu_crtc_disable(struct drm_crtc *crtc)
 		if (encoder->crtc != crtc)
 			continue;
 		dpu_encoder_register_frame_event_callback(encoder, NULL, NULL);
-		cstate->rsc_client = NULL;
-		cstate->rsc_update = false;
 	}
 
 	if (dpu_crtc->power_event)
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +2 -7
index df0dce3..8756b2b 100644
@@ -38,12 +38,10 @@
  *              voting through apps rsc
  * @NRT_CLIENT:	Non-RealTime client like WB display
  *              voting through apps rsc
- * @RT_RSC_CLIENT:	Realtime display RSC voting client
  */
 enum dpu_crtc_client_type {
 	RT_CLIENT,
 	NRT_CLIENT,
-	RT_RSC_CLIENT,
 };
 
 /**
@@ -310,7 +308,6 @@ struct dpu_crtc_respool {
  * @base: Base drm crtc state structure
  * @connectors    : Currently associated drm connectors
  * @num_connectors: Number of associated drm connectors
- * @rsc_client    : dpu rsc client when mode is valid
  * @is_ppsplit    : Whether current topology requires PPSplit special handling
  * @bw_control    : true if bw/clk controlled by core bw/clk properties
  * @bw_split_vote : true if bw controlled by llcc/dram bw properties
@@ -332,8 +329,6 @@ struct dpu_crtc_state {
 
 	struct drm_connector *connectors[MAX_CONNECTORS];
 	int num_connectors;
-	struct dpu_rsc_client *rsc_client;
-	bool rsc_update;
 	bool bw_control;
 	bool bw_split_vote;
 
@@ -471,7 +466,7 @@ int dpu_crtc_register_custom_event(struct dpu_kms *kms,
 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);
 
 /**
- * dpu_crtc_get_client_type - check the crtc type- rt, nrt, rsc, etc.
+ * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc.
  * @crtc: Pointer to crtc
  */
 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
@@ -484,7 +479,7 @@ static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
 		return NRT_CLIENT;
 
 	return dpu_crtc_get_intf_mode(crtc) == INTF_MODE_WB_LINE ? NRT_CLIENT :
-			(cstate->rsc_client ? RT_RSC_CLIENT : RT_CLIENT);
+			RT_CLIENT;
 }
 
 /**
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +15 -227

383 lines not on this page · raw message

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +0 -7
index 4c5560b..e85e5a4 100644
@@ -88,13 +88,6 @@ void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder,
 		void (*cb)(void *, u32), void *data);
 
 /**
- * dpu_encoder_get_rsc_client - gets the rsc client state for primary
- *      for primary display.
- * @encoder:	encoder pointer
- */
-struct dpu_rsc_client *dpu_encoder_get_rsc_client(struct drm_encoder *encoder);
-
-/**
  * dpu_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl
  *	path (i.e. ctl flush and start) at next appropriate time.
  *	Immediately: if no previous commit is outstanding.
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +0 -1
index e9484fe..9bbf339b 100644
@@ -16,7 +16,6 @@
 #define __DPU_ENCODER_PHYS_H__
 
 #include <linux/jiffies.h>
-#include <linux/dpu_rsc.h>
 
 #include "dpu_kms.h"
 #include "dpu_hw_intf.h"
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +8 -12
index 0caadcee..68163a1 100644
@@ -270,18 +270,14 @@ static void dpu_hw_setup_vsync_source(struct dpu_hw_mdp *mdp,
 			break;
 		}
 
-		if (cfg->is_dummy) {
-			DPU_REG_WRITE(c, wd_ctl2, 0x0);
-		} else {
-			DPU_REG_WRITE(c, wd_load_value,
-				CALCULATE_WD_LOAD_VALUE(cfg->frame_rate));
-
-			DPU_REG_WRITE(c, wd_ctl, BIT(0)); /* clear timer */
-			reg = DPU_REG_READ(c, wd_ctl2);
-			reg |= BIT(8);		/* enable heartbeat timer */
-			reg |= BIT(0);		/* enable WD timer */
-			DPU_REG_WRITE(c, wd_ctl2, reg);
-		}
+		DPU_REG_WRITE(c, wd_load_value,
+			CALCULATE_WD_LOAD_VALUE(cfg->frame_rate));
+
+		DPU_REG_WRITE(c, wd_ctl, BIT(0)); /* clear timer */
+		reg = DPU_REG_READ(c, wd_ctl2);
+		reg |= BIT(8);		/* enable heartbeat timer */
+		reg |= BIT(0);		/* enable WD timer */
+		DPU_REG_WRITE(c, wd_ctl2, reg);
 
 		/* make sure that timers are enabled/disabled for vsync state */
 		wmb();
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h +0 -3
index 18e76a1..375cb7c 100644
@@ -84,15 +84,12 @@ struct dpu_danger_safe_status {
  * @frame_rate: Display frame rate
  * @ppnumber: ping pong index array
  * @vsync_source: vsync source selection
- * @is_dummy: a dummy source of vsync selection. It must not be selected for
- *           any case other than dpu rsc idle request.
  */
 struct dpu_vsync_source_cfg {
 	u32 pp_count;
 	u32 frame_rate;
 	u32 ppnumber[PINGPONG_MAX];
 	u32 vsync_source;
-	bool is_dummy;
 };
 
 /**
drivers/gpu/drm/msm/dpu_dbg.c +0 -27
index 8118fb7..341b596 100644
@@ -67,7 +67,6 @@
 /* print debug ranges in groups of 4 u32s */
 #define REG_DUMP_ALIGN		16
 
-#define RSC_DEBUG_MUX_SEL_SDM845 9
 /**
  * struct dpu_dbg_reg_offset - tracking for start and end of region
  * @start: start offset
@@ -238,29 +237,6 @@ static void _dpu_debug_bus_ppb1_dump(void __iomem *mem_base,
 			entry->wr_addr, entry->block_id, entry->test_id, val);
 }
 
-static void _dpu_debug_bus_axi_dump_sdm845(void __iomem *mem_base,
-		struct dpu_debug_bus_entry *entry, u32 val)
-{
-	u32 status, i;
-
-	if (!mem_base || !entry)
-		return;
-
-	for (i = 0; i <= RSC_DEBUG_MUX_SEL_SDM845; i++) {
-		//dpu_rsc_debug_dump(i);
-
-		/* make sure that mux_sel updated */
-		wmb();
-
-		/* read status again after rsc routes the debug bus */
-		status = readl_relaxed(mem_base + DBGBUS_DSPP_STATUS);
-
-		dev_err(dpu_dbg_base.dev, "rsc mux_sel:%d 0x%x %d %d 0x%x\n",
-			i, entry->wr_addr, entry->block_id,
-			entry->test_id, status);
-	}
-}
-
 static struct dpu_debug_bus_entry dbg_bus_dpu_8998[] = {
 
 	/* Unpack 0 sspp 0*/
@@ -2014,9 +1990,6 @@ static void _dpu_debug_bus_axi_dump_sdm845(void __iomem *mem_base,
 	{ DBGBUS_PERIPH, 71, 3},
 	{ DBGBUS_PERIPH, 71, 4},
 	{ DBGBUS_PERIPH, 71, 5},
-
-	/* axi - should be last entry */
-	{ DBGBUS_AXI_INTF, 62, 0, _dpu_debug_bus_axi_dump_sdm845},
 };
 
 static struct vbif_debug_bus_entry vbif_dbg_bus_msm8998[] = {
drivers/gpu/drm/msm/dpu_dbg.h +0 -10
index 9e3b0eb..710e918 100644
@@ -316,12 +316,6 @@ int dpu_evtlog_get_filter(struct dpu_dbg_evtlog *evtlog, int index,
 		char *buf, size_t bufsz);
 
 /**
- * dpu_rsc_debug_dump - dpu rsc debug dump status
- * @mux_sel:	select mux on rsc debug bus
- */
-void dpu_rsc_debug_dump(u32 mux_sel);
-
-/**
  * dsi_ctrl_debug_dump - dump dsi debug dump status
  */
 static inline void dsi_ctrl_debug_dump(void) {}
@@ -407,10 +401,6 @@ static inline int dpu_evtlog_get_filter(struct dpu_dbg_evtlog *evtlog,
 	return -EINVAL;
 }
 
-static inline void dpu_rsc_debug_dump(u32 mux_sel)
-{
-}
-
 static inline void dsi_ctrl_debug_dump(void)
 {
 }
drivers/gpu/drm/msm/dpu_power_handle.c +11 -62

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drivers/gpu/drm/msm/dpu_power_handle.h +0 -4
index 25a00b1..1edae5c 100644
@@ -155,8 +155,6 @@ struct dpu_power_event {
  * @reg_bus_hdl: current register bus handle
  * @data_bus_handle: context structure for data bus control
  * @event_list: current power handle event list
- * @rsc_client: dpu rsc client pointer
- * @rsc_client_init: boolean to control rsc client create
  */
 struct dpu_power_handle {
 	struct dss_module_power mp;
@@ -168,8 +166,6 @@ struct dpu_power_handle {
 	struct dpu_power_data_bus_handle data_bus_handle
 		[DPU_POWER_HANDLE_DBUS_ID_MAX];
 	struct list_head event_list;
-	struct dpu_rsc_client *rsc_client;
-	bool rsc_client_init;
 };
 
 /**
drivers/gpu/drm/msm/dpu_rsc.c deleted +0 -1367

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drivers/gpu/drm/msm/dpu_rsc_hw.c deleted +0 -818

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drivers/gpu/drm/msm/dpu_rsc_priv.h deleted +0 -191

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include/linux/dpu_rsc.h deleted +0 -302

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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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