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Add CAN, PCIe, VIN, Audio, PWM, TPU and thermal support

PATCH New Biju Das 3 participants 69 messages May 10, 2018 – May 30, 2018

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Biju Das

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#0 lore raw

cover Add CAN, PCIe, VIN, Audio, PWM, TPU and thermal support

This series aims to add support for CAN,PCIE,VIN,Audio,PWM,TPU and thermal drivers on r8a7743 SoC.The patches in this series are cherry-picked from the upstream kernel.

Some of the patches in this series are bug fixes/improvements (For eg:-SGTL5000 audio codec related patches)

This series has been tested against linux-cip tag v4.4.126-cip22.

Biju Das (17):
dt-bindings: PCI: rcar: Add device tree support for r8a7743
ARM: dts: r8a7743: Add default PCIe bus clock
ARM: dts: r8a7743: Add PCIe Controller device node
ARM: dts: iwg20d-q7: Enable PCIe Controller
ASoC: rsnd: Add device tree support for r8a774[35]
ARM: shmobile: defconfig: Enable SGTL5000 audio codec
ARM: dts: r8a7743: Add audio clocks
ARM: dts: r8a7743: Add audio DMAC support
ARM: dts: r8a7743: Add sound support
ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec
ARM: dts: iwg20d-q7-common: Sound PIO support
ARM: dts: iwg20d-q7-common: Sound DMA support on DTS
ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS
ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS
ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS
dt-bindings: thermal: rcar: Add device tree support for r8a7743
ARM: dts: r8a7743: Add thermal device to DT

Boris BREZILLON (1):
pwm: rcar: Make use of pwm_is_enabled()

Clemens Gruber (1):
ASoC: sgtl5000: Remove misleading comment

Dirk Behme (1):
thermal: rcar_thermal: Fix priv->zone error handling

Eric Nelson (5):
ASoC: sgtl5000: Fix regulator support
ASoC: sgtl5000: Write all default registers
ASoC: sgtl5000: Initialize CHIP_ANA_POWER to power-on defaults
ASoC: sgtl5000: Disable internal PLL early
ASoC: sgtl5000: Do not disable regulators in SND_SOC_BIAS_OFF

Fabrizio Castro (13):
pinctrl: sh-pfc: r8a7791: Add can_clk function
dt-bindings: can: rcar_can: document r8a774[35] can support
ARM: dts: r8a7743: Add CAN[01] SoC support
ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB
ARM: dts: r8a7743: add VIN dt support
pinctrl: sh-pfc: r8a7791: Add tpu groups and function
dt-bindings: pwm: renesas-tpu: Document r8a774[35] support
ARM: dts: r8a7743: Add TPU support
ARM: multi_v7_defconfig: Select PWM_RCAR as module
ARM: shmobile: defconfig: Enable PWM
dt-bindings: pwm: rcar: Document r8a774[35] PWM bindings
ARM: dts: r8a7743: Add PWM SoC support

Geert Uytterhoeven (1):
ARM: shmobile: defconfig: Enable missing support based on DTSes

Hien Dang (1):
pwm: rcar: Use PM Runtime to control module clock

Kalle Kankare (1):
sgtl5000: add Lineout volume control

Kuninori Morimoto (9):
ASoC: rsnd: audio_clkout0/1/2/3 are optional properties
ASoC: rsnd: add missing DT example for Simple Card
ASoC: rsnd: add missing DT example for Simple Card with TDM
thermal: rcar: move rcar_thermal_dt_ids to upside
thermal: rcar: check every rcar_thermal_update_temp() return value
thermal: rcar: check irq possibility in rcar_thermal_irq_xxx()
thermal: rcar: rcar_thermal_get_temp() return error if strange temp
thermal: rcar: enable to use thermal-zone on DT
thermal: rcar-thermal: enable hwmon when
thermal_zone_of_sensor_register is used

Phil Edworthy (4):
PCI: rcar: Convert to DT resource parsing API
PCI: rcar: Remove unused pci_sys_data struct from pcie-rcar
PCI: rcar: Add runtime PM support to pcie-rcar
PCI: rcar: Add Gen2 PHY setup to pcie-rcar

Ryo Kodama (1):
pwm: rcar: Improve accuracy of frequency division setting

Sergei Shtylyov (1):
DT: dmaengine: rcar-dmac: document R8A7743/5 support

Simon Horman (3):
can: rcar: add gen[12] fallback compatibility strings
PCI: rcar: Add gen2 fallback compatibility string for pcie-rcar
dmaengine: rcar-dmac: Document SoC specific bindings

Wolfram Sang (2):
PCI: rcar: Use proper name for the R-Car SoC
thermal: rcar_thermal: don't open code of_device_get_match_data()

Yoshihiro Kaneko (1):
soc_camera: rcar_vin: add R-Car Gen 2 and 3 fallback compatibility
strings

 .../devicetree/bindings/dma/renesas,rcar-dmac.txt  |  17 +-
 .../devicetree/bindings/media/rcar_vin.txt         |  10 +-
 .../devicetree/bindings/net/can/rcar_can.txt       |  13 +-
 Documentation/devicetree/bindings/pci/rcar-pci.txt |  17 +-
 .../devicetree/bindings/pwm/renesas,pwm-rcar.txt   |   2 +
 .../devicetree/bindings/pwm/renesas,tpu-pwm.txt    |   4 +-
 .../devicetree/bindings/sound/renesas,rsnd.txt     |  65 ++-
 .../devicetree/bindings/thermal/rcar-thermal.txt   |  38 +-
 arch/arm/boot/dts/iwg20d-q7-common.dtsi            | 122 +++++-
 arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi           |  12 +
 arch/arm/boot/dts/r8a7743.dtsi                     | 466 +++++++++++++++++++++
 arch/arm/configs/multi_v7_defconfig                |   1 +
 arch/arm/configs/shmobile_defconfig                |   4 +
 drivers/media/platform/soc_camera/rcar_vin.c       |   1 +
 drivers/net/can/rcar_can.c                         |   2 +
 drivers/pci/host/pcie-rcar.c                       | 199 ++++++---
 drivers/pinctrl/sh-pfc/pfc-r8a7791.c               |  62 ++-
 drivers/pwm/pwm-rcar.c                             |  12 +-
 drivers/thermal/rcar_thermal.c                     | 114 +++--
 sound/soc/codecs/sgtl5000.c                        | 431 +++++--------------
 sound/soc/codecs/sgtl5000.h                        |   2 +
 21 files changed, 1149 insertions(+), 445 deletions(-)
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH 1/62 pinctrl: sh-pfc: r8a7791: Add can_clk function

From: Fabrizio Castro <[email protected]>

This patch adds can_clk function to r8a7743/r8a7791 which is cleaner, and allows for independent configuration.
We keep the can_clk* pins definitions from within can0_groups and can1_groups for uniformity and backwards compatibility.

(cherry picked from commit 57eec02caee60332b8052615e7257f932ae07abc)
---
 drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +21 -1
index 351842e..39fc9ad 100644
@@ -4830,6 +4830,10 @@ static const char * const can0_groups[] = {
 	"can0_data_d",
 	"can0_data_e",
 	"can0_data_f",
+	/*
+	 * Retained for backwards compatibility, use can_clk_groups in new
+	 * designs.
+	 */
 	"can_clk",
 	"can_clk_b",
 	"can_clk_c",
@@ -4841,6 +4845,21 @@ static const char * const can1_groups[] = {
 	"can1_data_b",
 	"can1_data_c",
 	"can1_data_d",
+	/*
+	 * Retained for backwards compatibility, use can_clk_groups in new
+	 * designs.
+	 */
+	"can_clk",
+	"can_clk_b",
+	"can_clk_c",
+	"can_clk_d",
+};
+
+/*
+ * can_clk_groups allows for independent configuration, use can_clk function
+ * in new designs.
+ */
+static const char * const can_clk_groups[] = {
 	"can_clk",
 	"can_clk_b",
 	"can_clk_c",
@@ -5312,7 +5331,7 @@ static const char * const vin2_groups[] = {
 };
 
 static const struct {
-	struct sh_pfc_function common[56];
+	struct sh_pfc_function common[57];
 	struct sh_pfc_function r8a779x[2];
 } pinmux_functions = {
 	.common = {
@@ -5320,6 +5339,7 @@ static const struct {
 		SH_PFC_FUNCTION(avb),
 		SH_PFC_FUNCTION(can0),
 		SH_PFC_FUNCTION(can1),
+		SH_PFC_FUNCTION(can_clk),
 		SH_PFC_FUNCTION(du),
 		SH_PFC_FUNCTION(du0),
 		SH_PFC_FUNCTION(du1),
Signature · 1 line
2.7.4
author
#2 lore raw

PATCH 2/62 can: rcar: add gen[12] fallback compatibility strings

In reply to Biju Das

From: Simon Horman <[email protected]>

Add fallback compatibility string for R-Car Gen 1 and Gen2.

In the case of Renesas R-Car hardware we know that there are generations of SoCs, e.g. Gen 1 and Gen 2. But beyond that its not clear what the relationship between IP blocks might be. For example, I believe that r8a7779 is older than r8a7778 but that doesn't imply that the latter is a descendant of the former or vice versa.

We can, however, by examining the documentation and behaviour of the hardware at run-time observe that the current driver implementation appears to be compatible with the IP blocks on SoCs within a given generation.

For the above reasons and convenience when enabling new SoCs a per-generation fallback compatibility string scheme being adopted for drivers for Renesas SoCs.

(cherry picked from commit 0dfa61bba38513957240660a9cad82dd408789ca)
---
 Documentation/devicetree/bindings/net/can/rcar_can.txt | 8 +++++++-
 drivers/net/can/rcar_can.c                             | 2 ++
 2 files changed, 9 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/net/can/rcar_can.txt +7 -1
index 002d844..f2172fb 100644
@@ -6,6 +6,12 @@ Required properties:
 	      "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
 	      "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
 	      "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
+	      "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
+	      "renesas,rcar-gen2-can" for a generic R-Car Gen2 compatible device.
+	      When compatible with the generic version, nodes must list the
+	      SoC-specific version corresponding to the platform first
+	      followed by the generic version.
+
 - reg: physical base address and size of the R-Car CAN register map.
 - interrupts: interrupt specifier for the sole interrupt.
 - clocks: phandles and clock specifiers for 3 CAN clock inputs.
@@ -25,7 +31,7 @@ Example
 SoC common .dtsi file:
 
 	can0: can at e6e80000 {
-		compatible = "renesas,can-r8a7791";
+		compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
 		reg = <0 0xe6e80000 0 0x1000>;
 		interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
drivers/net/can/rcar_can.c +2 -0
index bc46be3..ad3d2e0 100644
@@ -904,6 +904,8 @@ static const struct of_device_id rcar_can_of_table[] __maybe_unused = {
 	{ .compatible = "renesas,can-r8a7779" },
 	{ .compatible = "renesas,can-r8a7790" },
 	{ .compatible = "renesas,can-r8a7791" },
+	{ .compatible = "renesas,rcar-gen1-can" },
+	{ .compatible = "renesas,rcar-gen2-can" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, rcar_can_of_table);
Signature · 1 line
2.7.4
author
#3 lore raw

PATCH 3/62 dt-bindings: can: rcar_can: document r8a774[35] can support

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Document "renesas,can-r8a7743" and "renesas,can-r8a7745" compatible strings. Since the fallback compatible string ("renesas,rcar-gen2-can") activates the right code in the driver, no driver change is needed.

(cherry picked from commit 216bf2f490c214b8a0702b52cc957138ba24bc3f)
---
 Documentation/devicetree/bindings/net/can/rcar_can.txt | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/net/can/rcar_can.txt +5 -2
index f2172fb..6f81b1f 100644
@@ -2,12 +2,15 @@ Renesas R-Car CAN controller Device Tree Bindings
 -------------------------------------------------
 
 Required properties:
-- compatible: "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
+- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
+	      "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
+	      "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
 	      "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
 	      "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
 	      "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
 	      "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
-	      "renesas,rcar-gen2-can" for a generic R-Car Gen2 compatible device.
+	      "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
+	      compatible device.
 	      When compatible with the generic version, nodes must list the
 	      SoC-specific version corresponding to the platform first
 	      followed by the generic version.
Signature · 1 line
2.7.4
author
#4 lore raw

PATCH 4/62 ARM: dts: r8a7743: Add CAN[01] SoC support

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Add the definitions for can0 and can1 to the SoC .dtsi.

(cherry picked from commit 6ee6959fb85c3e03ec0674d329dc96c733f51dce)

(updated clocks and power-domains property. removed resets property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +34 -0
index eb3cdc8..94ccda0 100644
@@ -1330,6 +1330,32 @@
 			};
 		};
 
+		can0: can at e6e80000 {
+			compatible = "renesas,can-r8a7743",
+				     "renesas,rcar-gen2-can";
+			reg = <0 0xe6e80000 0 0x1000>;
+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7743_CLK_RCAN0>,
+				 <&cpg_clocks R8A7743_CLK_RCAN>,
+				 <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		can1: can at e6e88000 {
+			compatible = "renesas,can-r8a7743",
+				     "renesas,rcar-gen2-can";
+			reg = <0 0xe6e88000 0 0x1000>;
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7743_CLK_RCAN1>,
+				 <&cpg_clocks R8A7743_CLK_RCAN>,
+				 <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
 		pci0: pci at ee090000 {
 			compatible = "renesas,pci-r8a7743",
 				     "renesas,pci-rcar-gen2";
@@ -1420,6 +1446,14 @@
 		clock-frequency = <48000000>;
 	};
 
+	/* External CAN clock */
+	can_clk: can {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board. */
+		clock-frequency = <0>;
+	};
+
 	/* External SCIF clock */
 	scif_clk: scif {
 		compatible = "fixed-clock";
Signature · 1 line
2.7.4
author
#5 lore raw

PATCH 5/62 ARM: dts: iwg20d-q7-common: Add can0 support to carrier board

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

This patch enables CAN0 interface exposed through connector J20 on the carrier board.

(cherry picked from commit 47f3c7b66b6d316f86b0ce957c99958da0268e36)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +12 -0
index 8f203c5..0bcb42f 100644
@@ -59,6 +59,13 @@
 	};
 };
 
+&can0 {
+	pinctrl-0 = <&can0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
 &hsusb {
 	status = "okay";
 	pinctrl-0 = <&usb0_pins>;
@@ -79,6 +86,11 @@
 };
 
 &pfc {
+	can0_pins: can0 {
+		groups = "can0_data_d";
+		function = "can0";
+	};
+
 	avb_pins: avb {
 		groups = "avb_mdio", "avb_gmii";
 		function = "avb";
Signature · 1 line
2.7.4
author
#6 lore raw

PATCH 6/62 ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DB

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

CAN1 interface is exposed via connector J3 found on the camera daughter board. This patch enables can1 DT node from within the daughter board specific dtsi.

(cherry picked from commit 04e31b155f628e572d4ee2eeda5d6ee20ba86038)
---
 arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi +12 -0
index 31fab5f..cbdfdc8 100644
@@ -15,6 +15,13 @@
 	};
 };
 
+&can1 {
+	pinctrl-0 = <&can1_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
 &hscif1 {
 	pinctrl-0 = <&hscif1_pins>;
 	pinctrl-names = "default";
@@ -24,6 +31,11 @@
 };
 
 &pfc {
+	can1_pins: can1 {
+		groups = "can1_data_d";
+		function = "can1";
+	};
+
 	hscif1_pins: hscif1 {
 		groups = "hscif1_data_c", "hscif1_ctrl_c";
 		function = "hscif1";
Signature · 1 line
2.7.4
author
#7 lore raw

PATCH 7/62 ARM: shmobile: defconfig: Enable missing support based on DTSes

In reply to Biju Das

From: Geert Uytterhoeven <[email protected]>

Enable all missing support, extracted from the various Renesas ARM DTSes using linux-config-from-dt.

(cherry picked from commit 6161cc147277e7537d73a45d732a7112997c20f6)

(enabling CAN driver only)

---
 arch/arm/configs/shmobile_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/shmobile_defconfig +2 -0
index 30a3424..dfbd2de 100644
@@ -55,6 +55,8 @@ CONFIG_UNIX=y
 CONFIG_INET=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
+CONFIG_CAN=y
+CONFIG_CAN_RCAR=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
Signature · 1 line
2.7.4
author
#8 lore raw

PATCH 8/62 PCI: rcar: Convert to DT resource parsing API

In reply to Biju Das

From: Phil Edworthy <[email protected]>

The main purpose of this change is to avoid calling pci_ioremap_io() as this is not available on arm64. However, instead of doing the range parsing in this driver we can utilise of_pci_get_host_bridge_resources().

This is similar to changes made to the generic PCI host driver in commit dbf9826d5797 ("PCI: generic: Convert to DT resource parsing API")

---
 drivers/pci/host/pcie-rcar.c | 116 +++++++++++++++++++++++++++----------------
 1 file changed, 73 insertions(+), 43 deletions(-)
drivers/pci/host/pcie-rcar.c +73 -43
index 414c336..5e4f02d 100644
@@ -108,8 +108,6 @@
 #define RCAR_PCI_MAX_RESOURCES 4
 #define MAX_NR_INBOUND_MAPS 6
 
-static unsigned long global_io_offset;
-
 struct rcar_msi {
 	DECLARE_BITMAP(used, INT_PCI_MSI_NR);
 	struct irq_domain *domain;
@@ -138,8 +136,7 @@ struct rcar_pcie {
 #endif
 	struct device		*dev;
 	void __iomem		*base;
-	struct resource		res[RCAR_PCI_MAX_RESOURCES];
-	struct resource		busn;
+	struct list_head	resources;
 	int			root_bus_nr;
 	struct clk		*clk;
 	struct clk		*bus_clk;
@@ -323,10 +320,9 @@ static struct pci_ops rcar_pcie_ops = {
 	.write	= rcar_pcie_write_conf,
 };
 
-static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
+static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie,
+				   struct resource *res)
 {
-	struct resource *res = &pcie->res[win];
-
 	/* Setup PCIe address space mappings for each resource */
 	resource_size_t size;
 	resource_size_t res_start;
@@ -359,31 +355,33 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
 	rcar_pci_write_reg(pcie, mask, PCIEPTCTLR(win));
 }
 
-static int rcar_pcie_setup(struct list_head *resource, struct rcar_pcie *pcie)
+static int rcar_pcie_setup(struct list_head *resource, struct rcar_pcie *pci)
 {
-	struct resource *res;
-	int i;
-
-	pcie->root_bus_nr = pcie->busn.start;
+	struct resource_entry *win;
+	int i = 0;
 
 	/* Setup PCI resources */
-	for (i = 0; i < RCAR_PCI_MAX_RESOURCES; i++) {
+	resource_list_for_each_entry(win, &pci->resources) {
+		struct resource *res = win->res;
 
-		res = &pcie->res[i];
 		if (!res->flags)
 			continue;
 
-		rcar_pcie_setup_window(i, pcie);
-
-		if (res->flags & IORESOURCE_IO) {
-			phys_addr_t io_start = pci_pio_to_address(res->start);
-			pci_ioremap_io(global_io_offset, io_start);
-			global_io_offset += SZ_64K;
+		switch (resource_type(res)) {
+		case IORESOURCE_IO:
+		case IORESOURCE_MEM:
+			rcar_pcie_setup_window(i, pci, res);
+			i++;
+			break;
+		case IORESOURCE_BUS:
+			pci->root_bus_nr = res->start;
+			break;
+		default:
+			continue;
 		}
 
 		pci_add_resource(resource, res);
 	}
-	pci_add_resource(resource, &pcie->busn);
 
 	return 1;
 }
@@ -925,14 +923,63 @@ static const struct of_device_id rcar_pcie_of_match[] = {
 };
 MODULE_DEVICE_TABLE(of, rcar_pcie_of_match);
 
+static void rcar_pcie_release_of_pci_ranges(struct rcar_pcie *pci)
+{
+	pci_free_resource_list(&pci->resources);
+}
+
+static int rcar_pcie_parse_request_of_pci_ranges(struct rcar_pcie *pci)
+{
+	int err;
+	struct device *dev = pci->dev;
+	struct device_node *np = dev->of_node;
+	resource_size_t iobase;
+	struct resource_entry *win;
+
+	err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources, &iobase);
+	if (err)
+		return err;
+
+	resource_list_for_each_entry(win, &pci->resources) {
+		struct resource *parent, *res = win->res;
+
+		switch (resource_type(res)) {
+		case IORESOURCE_IO:
+			parent = &ioport_resource;
+			err = pci_remap_iospace(res, iobase);
+			if (err) {
+				dev_warn(dev, "error %d: failed to map resource %pR\n",
+					 err, res);
+				continue;
+			}
+			break;
+		case IORESOURCE_MEM:
+			parent = &iomem_resource;
+			break;
+
+		case IORESOURCE_BUS:
+		default:
+			continue;
+		}
+
+		err = devm_request_resource(dev, parent, res);
+		if (err)
+			goto out_release_res;
+	}
+
+	return 0;
+
+out_release_res:
+	rcar_pcie_release_of_pci_ranges(pci);
+	return err;
+}
+
 static int rcar_pcie_probe(struct platform_device *pdev)
 {
 	struct rcar_pcie *pcie;
 	unsigned int data;
-	struct of_pci_range range;
-	struct of_pci_range_parser parser;
 	const struct of_device_id *of_id;
-	int err, win = 0;
+	int err;
 	int (*hw_init_fn)(struct rcar_pcie *);
 
 	pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL);
@@ -942,16 +989,9 @@ static int rcar_pcie_probe(struct platform_device *pdev)
 	pcie->dev = &pdev->dev;
 	platform_set_drvdata(pdev, pcie);
 
-	/* Get the bus range */
-	if (of_pci_parse_bus_range(pdev->dev.of_node, &pcie->busn)) {
-		dev_err(&pdev->dev, "failed to parse bus-range property\n");
-		return -EINVAL;
-	}
+	INIT_LIST_HEAD(&pcie->resources);
 
-	if (of_pci_range_parser_init(&parser, pdev->dev.of_node)) {
-		dev_err(&pdev->dev, "missing ranges property\n");
-		return -EINVAL;
-	}
+	rcar_pcie_parse_request_of_pci_ranges(pcie);
 
 	err = rcar_pcie_get_resources(pdev, pcie);
 	if (err < 0) {
@@ -959,16 +999,6 @@ static int rcar_pcie_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	for_each_of_pci_range(&parser, &range) {
-		err = of_pci_range_to_resource(&range, pdev->dev.of_node,
-						&pcie->res[win++]);
-		if (err < 0)
-			return err;
-
-		if (win > RCAR_PCI_MAX_RESOURCES)
-			break;
-	}
-
 	 err = rcar_pcie_parse_map_dma_ranges(pcie, pdev->dev.of_node);
 	 if (err)
 		return err;
Signature · 1 line
2.7.4
author
#9 lore raw

PATCH 9/62 PCI: rcar: Add gen2 fallback compatibility string for pcie-rcar

In reply to Biju Das

From: Simon Horman <[email protected]>

Add fallback compatibility string for R-Car Gen 2 family. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs.

(cherry picked from commit a37b3eafe8e9cbe7c7754bc6003c125b23749554)

(removed r8a7795 soc from DT binding documentation)

---
 Documentation/devicetree/bindings/pci/rcar-pci.txt | 13 ++++++++++---
 drivers/pci/host/pcie-rcar.c                       |  1 +
 2 files changed, 11 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/pci/rcar-pci.txt +10 -3
index 29d3b98..6b4d2f7 100644
@@ -1,8 +1,15 @@
 * Renesas RCar PCIe interface
 
 Required properties:
-- compatible: should contain one of the following
-	"renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791"
+compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;
+	    "renesas,pcie-r8a7790" for the R8A7790 SoC;
+	    "renesas,pcie-r8a7791" for the R8A7791 SoC;
+	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
+
+	    When compatible with the generic version, nodes must list the
+	    SoC-specific version corresponding to the platform first
+	    followed by the generic version.
+
 - reg: base address and length of the pcie controller registers.
 - #address-cells: set to <3>
 - #size-cells: set to <2>
@@ -25,7 +32,7 @@ Example:
 SoC specific DT Entry:
 
 	pcie: pcie at fe000000 {
-		compatible = "renesas,pcie-r8a7791";
+		compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
 		reg = <0 0xfe000000 0 0x80000>;
 		#address-cells = <3>;
 		#size-cells = <2>;
drivers/pci/host/pcie-rcar.c +1 -0
index 5e4f02d..ae095fc 100644
@@ -917,6 +917,7 @@ static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie,
 
 static const struct of_device_id rcar_pcie_of_match[] = {
 	{ .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
+	{ .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init },
 	{ .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init },
 	{ .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init },
 	{},
Signature · 1 line
2.7.4
author
#10 lore raw

PATCH 10/62 PCI: rcar: Remove unused pci_sys_data struct from pcie-rcar

In reply to Biju Das

From: Phil Edworthy <[email protected]>

The pci_sys_data struct was previously used by pci_common_init_dev() and by the ARM pcibios_align_resource(), but recent commits removed those uses:

cbce7900598c ("PCI: designware: Make driver arch-agnostic")
b3a72384fe29 ("ARM/PCI: Replace pci_sys_data->align_resource with global function pointer")

cbce7900598c removed the use of pci_common_init_dev() by DesignWare drivers, including pcie-rcar.c, and b3a72384fe29 removed the use of struct pci_sys_data by the ARM pcibios_align_resource().

Remove struct pci_sys_data from pcie-rcar.c.

[bhelgaas: changelog]
(cherry picked from commit 049f419399e937e333bf121b7b234888d804a25e)
---
 drivers/pci/host/pcie-rcar.c | 9 ---------
 1 file changed, 9 deletions(-)
drivers/pci/host/pcie-rcar.c +0 -9
index ae095fc..83ba747 100644
@@ -124,16 +124,7 @@ static inline struct rcar_msi *to_rcar_msi(struct msi_controller *chip)
 }
 
 /* Structure representing the PCIe interface */
-/*
- * ARM pcibios functions expect the ARM struct pci_sys_data as the PCI
- * sysdata.  Add pci_sys_data as the first element in struct gen_pci so
- * that when we use a gen_pci pointer as sysdata, it is also a pointer to
- * a struct pci_sys_data.
- */
 struct rcar_pcie {
-#ifdef CONFIG_ARM
-	struct pci_sys_data	sys;
-#endif
 	struct device		*dev;
 	void __iomem		*base;
 	struct list_head	resources;
Signature · 1 line
2.7.4
author
#11 lore raw

PATCH 11/62 PCI: rcar: Add runtime PM support to pcie-rcar

In reply to Biju Das

From: Phil Edworthy <[email protected]>

If runtime PM is enabled in the kernel config, simply enable the clocks once during probe.

(cherry picked from commit de1be9a8897cb35bee7617da8b6ddd7d144db332)
---
 drivers/pci/host/pcie-rcar.c | 44 ++++++++++++++++++++++++++++++++------------
 1 file changed, 32 insertions(+), 12 deletions(-)
drivers/pci/host/pcie-rcar.c +32 -12
index 83ba747..1468e04 100644
@@ -26,6 +26,7 @@
 #include <linux/of_platform.h>
 #include <linux/pci.h>
 #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
 #include <linux/slab.h>
 
 #define DRV_NAME "rcar-pcie"
@@ -995,32 +996,51 @@ static int rcar_pcie_probe(struct platform_device *pdev)
 	 if (err)
 		return err;
 
-	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		err = rcar_pcie_enable_msi(pcie);
-		if (err < 0) {
-			dev_err(&pdev->dev,
-				"failed to enable MSI support: %d\n",
-				err);
-			return err;
-		}
-	}
-
 	of_id = of_match_device(rcar_pcie_of_match, pcie->dev);
 	if (!of_id || !of_id->data)
 		return -EINVAL;
 	hw_init_fn = of_id->data;
 
+	pm_runtime_enable(pcie->dev);
+	err = pm_runtime_get_sync(pcie->dev);
+	if (err < 0) {
+		dev_err(pcie->dev, "pm_runtime_get_sync failed\n");
+		goto err_pm_disable;
+	}
+
 	/* Failure to get a link might just be that no cards are inserted */
 	err = hw_init_fn(pcie);
 	if (err) {
 		dev_info(&pdev->dev, "PCIe link down\n");
-		return 0;
+		err = 0;
+		goto err_pm_put;
 	}
 
 	data = rcar_pci_read_reg(pcie, MACSR);
 	dev_info(&pdev->dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f);
 
-	return rcar_pcie_enable(pcie);
+	if (IS_ENABLED(CONFIG_PCI_MSI)) {
+		err = rcar_pcie_enable_msi(pcie);
+		if (err < 0) {
+			dev_err(&pdev->dev,
+				"failed to enable MSI support: %d\n",
+				err);
+			goto err_pm_put;
+		}
+	}
+
+	err = rcar_pcie_enable(pcie);
+	if (err)
+		goto err_pm_put;
+
+	return 0;
+
+err_pm_put:
+	pm_runtime_put(pcie->dev);
+
+err_pm_disable:
+	pm_runtime_disable(pcie->dev);
+	return err;
 }
 
 static struct platform_driver rcar_pcie_driver = {
Signature · 1 line
2.7.4
author
#12 lore raw

PATCH 12/62 PCI: rcar: Add Gen2 PHY setup to pcie-rcar

In reply to Biju Das

From: Phil Edworthy <[email protected]>

For PCIe compliance, the PHY registers need setting as per the manual.

(cherry picked from commit 581d9434aa56b465c5abd82caf18937e9973ca42)

(removed gen3 devices)

---
 drivers/pci/host/pcie-rcar.c | 31 ++++++++++++++++++++++++++++---
 1 file changed, 28 insertions(+), 3 deletions(-)
drivers/pci/host/pcie-rcar.c +28 -3
index 1468e04..848f9bf 100644
@@ -95,6 +95,11 @@
 #define H1_PCIEPHYDOUTR		0x040014
 #define H1_PCIEPHYSR		0x040018
 
+/* R-Car Gen2 PHY */
+#define GEN2_PCIEPHYADDR	0x780
+#define GEN2_PCIEPHYDATA	0x784
+#define GEN2_PCIEPHYCTRL	0x78c
+
 #define INT_PCI_MSI_NR	32
 
 #define RCONF(x)	(PCICONF(0)+(x))
@@ -568,6 +573,26 @@ static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
 	return -ETIMEDOUT;
 }
 
+static int rcar_pcie_hw_init_gen2(struct rcar_pcie *pcie)
+{
+	/*
+	 * These settings come from the R-Car Series, 2nd Generation User's
+	 * Manual, section 50.3.1 (2) Initialization of the physical layer.
+	 */
+	rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR);
+	rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA);
+	rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
+	rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
+
+	rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR);
+	/* The following value is for DC connection, no termination resistor */
+	rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA);
+	rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
+	rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
+
+	return rcar_pcie_hw_init(pcie);
+}
+
 static int rcar_msi_alloc(struct rcar_msi *chip)
 {
 	int msi;
@@ -909,9 +934,9 @@ static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie,
 
 static const struct of_device_id rcar_pcie_of_match[] = {
 	{ .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
-	{ .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init },
-	{ .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init },
-	{ .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init },
+	{ .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init_gen2 },
+	{ .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init_gen2 },
+	{ .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init_gen2 },
 	{},
 };
 MODULE_DEVICE_TABLE(of, rcar_pcie_of_match);
Signature · 1 line
2.7.4
author
#13 lore raw

PATCH 13/62 PCI: rcar: Use proper name for the R-Car SoC

In reply to Biju Das

From: Wolfram Sang <[email protected]>

It is 'R-Car', not 'RCar'. No code or binding changes, only descriptive text.

(cherry picked from commit a8d992d8f8d4bf6051e7b9df86ffe21d8a78a472)
---
 Documentation/devicetree/bindings/pci/rcar-pci.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/devicetree/bindings/pci/rcar-pci.txt +1 -1
index 6b4d2f7..a85353a 100644
@@ -1,4 +1,4 @@
-* Renesas RCar PCIe interface
+* Renesas R-Car PCIe interface
 
 Required properties:
 compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;
Signature · 1 line
2.7.4
author
#14 lore raw

PATCH 14/62 dt-bindings: PCI: rcar: Add device tree support for r8a7743

In reply to Biju Das

Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller is identical to the R-Car Gen2 family.

No driver change is needed due to the fallback compatible value "renesas,pcie-rcar-gen2".
Adding the SoC-specific compatible values here has three purposes:
1. Document which SoCs have this hardware module,
2. Allow checkpatch to validate compatible values.
3. Allow the driver to support SoC specific implementations in future as necessary.

(cherry picked from commit 2380ca5f1f46412d08c96ebea996e049548829bd)

(removed gen3 devices from DT binding documentation)

---
 Documentation/devicetree/bindings/pci/rcar-pci.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/pci/rcar-pci.txt +4 -2
index a85353a..bedfdc1 100644
@@ -1,10 +1,12 @@
 * Renesas R-Car PCIe interface
 
 Required properties:
-compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;
+compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
+	    "renesas,pcie-r8a7779" for the R8A7779 SoC;
 	    "renesas,pcie-r8a7790" for the R8A7790 SoC;
 	    "renesas,pcie-r8a7791" for the R8A7791 SoC;
-	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
+	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
+				     RZ/G1 compatible device.
 
 	    When compatible with the generic version, nodes must list the
 	    SoC-specific version corresponding to the platform first
Signature · 1 line
2.7.4
author
#15 lore raw

PATCH 15/62 ARM: dts: r8a7743: Add default PCIe bus clock

In reply to Biju Das

This patch adds a default PCIe bus clock node.

(cherry picked from commit a827886558d4b975903824d9786c331e08c60e9b)
---
 arch/arm/boot/dts/r8a7743.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +7 -0
index 94ccda0..767b7fe 100644
@@ -1454,6 +1454,13 @@
 		clock-frequency = <0>;
 	};
 
+	/* External PCIe clock - can be overridden by the board */
+	pcie_bus_clk: pcie_bus {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
 	/* External SCIF clock */
 	scif_clk: scif {
 		compatible = "fixed-clock";
Signature · 1 line
2.7.4
author
#16 lore raw

PATCH 16/62 ARM: dts: r8a7743: Add PCIe Controller device node

In reply to Biju Das
(cherry picked from commit 4c5c952e61190e5a0e06128156eef84d290a0045)

(updated clocks, power-domains property and removed reset property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +27 -0
index 767b7fe..fccd70c 100644
@@ -1429,6 +1429,33 @@
 				phy-names = "usb";
 			};
 		};
+
+		pciec: pcie at fe000000 {
+			compatible = "renesas,pcie-r8a7743",
+				     "renesas,pcie-rcar-gen2";
+			reg = <0 0xfe000000 0 0x80000>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			bus-range = <0x00 0xff>;
+			device_type = "pci";
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			/* Map all possible DDR as inbound ranges */
+			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
+				      0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7743_CLK_PCIEC>, <&pcie_bus_clk>;
+			clock-names = "pcie", "pcie_bus";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
 	};
 
 	/* External root clock */
Signature · 1 line
2.7.4
author
#17 lore raw

PATCH 17/62 ARM: dts: iwg20d-q7: Enable PCIe Controller

In reply to Biju Das

Enable PCIe Controller & set PCIe bus clock frequency.

(cherry picked from commit b3a0317e312cc6d6359c7a0854d763cde528391d)

(sorted pci nodes alphabetically)

---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 30 +++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 11 deletions(-)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +19 -11
index 0bcb42f..624907b 100644
@@ -85,6 +85,25 @@
 	};
 };
 
+&pci0 {
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
+&pcie_bus_clk {
+	clock-frequency = <100000000>;
+};
+
+&pciec {
+	status = "okay";
+};
+
 &pfc {
 	can0_pins: can0 {
 		groups = "can0_data_d";
@@ -128,17 +147,6 @@
 	};
 };
 
-&pci0 {
-	pinctrl-0 = <&usb0_pins>;
-	pinctrl-names = "default";
-};
-
-&pci1 {
-	status = "okay";
-	pinctrl-0 = <&usb1_pins>;
-	pinctrl-names = "default";
-};
-
 &scif0 {
 	pinctrl-0 = <&scif0_pins>;
 	pinctrl-names = "default";
Signature · 1 line
2.7.4
author
#18 lore raw

PATCH 18/62 soc_camera: rcar_vin: add R-Car Gen 2 and 3 fallback compatibility strings

In reply to Biju Das

From: Yoshihiro Kaneko <[email protected]>

Add fallback compatibility string for R-Car Gen 1 and 2.

In the case of Renesas R-Car hardware we know that there are generations of SoCs, e.g. Gen 2 and 3. But beyond that it's unclear what the relationship between IP blocks might be. For example, I believe that r8a7790 is older than r8a7791 but that doesn't imply that the latter is a descendant of the former or vice versa.

We can, however, by examining the documentation and behaviour of the hardware at run-time observe that the current driver implementation appears to be compatible with the IP blocks on SoCs within a given generation.

For the above reasons and convenience when enabling new SoCs a per-generation fallback compatibility string scheme being adopted for drivers for Renesas SoCs.

(cherry picked from commit bd546882ff3476718d6df872c1c95aedcc5ed37d)

(removed gen3 devices)

---
 Documentation/devicetree/bindings/media/rcar_vin.txt | 10 ++++++++--
 drivers/media/platform/soc_camera/rcar_vin.c         |  1 +
 2 files changed, 9 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/rcar_vin.txt +8 -2
index 9dafe6b..1abe1ef 100644
@@ -5,13 +5,19 @@ The rcar_vin device provides video input capabilities for the Renesas R-Car
 family of devices. The current blocks are always slaves and suppot one input
 channel which can be either RGB, YUYV or BT656.
 
- - compatible: Must be one of the following
+ - compatible: Must be one or more of the following
    - "renesas,vin-r8a7794" for the R8A7794 device
    - "renesas,vin-r8a7793" for the R8A7793 device
    - "renesas,vin-r8a7791" for the R8A7791 device
    - "renesas,vin-r8a7790" for the R8A7790 device
    - "renesas,vin-r8a7779" for the R8A7779 device
    - "renesas,vin-r8a7778" for the R8A7778 device
+   - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 compatible device.
+
+   When compatible with the generic version nodes must list the
+   SoC-specific version corresponding to the platform first
+   followed by the generic version.
+
  - reg: the register base and size for the device registers
  - interrupts: the interrupt for the device
  - clocks: Reference to the parent clock
@@ -36,7 +42,7 @@ Device node example
 	};
 
         vin0: vin at 0xe6ef0000 {
-                compatible = "renesas,vin-r8a7790";
+                compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
                 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
                 reg = <0 0xe6ef0000 0 0x1000>;
                 interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
drivers/media/platform/soc_camera/rcar_vin.c +1 -0
index efe57b2..dfb2c72 100644
@@ -1848,6 +1848,7 @@ static const struct of_device_id rcar_vin_of_table[] = {
 	{ .compatible = "renesas,vin-r8a7790", .data = (void *)RCAR_GEN2 },
 	{ .compatible = "renesas,vin-r8a7779", .data = (void *)RCAR_H1 },
 	{ .compatible = "renesas,vin-r8a7778", .data = (void *)RCAR_M1 },
+	{ .compatible = "renesas,rcar-gen2-vin", .data = (void *)RCAR_GEN2 },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, rcar_vin_of_table);
Signature · 1 line
2.7.4
author
#19 lore raw

PATCH 19/62 ARM: dts: r8a7743: add VIN dt support

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Add VIN[012] support to SoC dt. Also, add aliases.

(cherry picked from commit 001b32ae64dbf780d89fbc258c3f1007ee7b34e8)

(updated clocks and power-domains property. removed resets property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +33 -0
index fccd70c..9724609 100644
@@ -32,6 +32,9 @@
 		spi1 = &msiof0;
 		spi2 = &msiof1;
 		spi3 = &msiof2;
+		vin0 = &vin0;
+		vin1 = &vin1;
+		vin2 = &vin2;
 	};
 
 	cpus {
@@ -1330,6 +1333,36 @@
 			};
 		};
 
+		vin0: video at e6ef0000 {
+			compatible = "renesas,vin-r8a7743",
+				     "renesas,rcar-gen2-vin";
+			reg = <0 0xe6ef0000 0 0x1000>;
+			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp8_clks R8A7743_CLK_VIN0>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		vin1: video at e6ef1000 {
+			compatible = "renesas,vin-r8a7743",
+				     "renesas,rcar-gen2-vin";
+			reg = <0 0xe6ef1000 0 0x1000>;
+			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp8_clks R8A7743_CLK_VIN1>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		vin2: video at e6ef2000 {
+			compatible = "renesas,vin-r8a7743",
+				     "renesas,rcar-gen2-vin";
+			reg = <0 0xe6ef2000 0 0x1000>;
+			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp8_clks R8A7743_CLK_VIN2>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
 		can0: can at e6e80000 {
 			compatible = "renesas,can-r8a7743",
 				     "renesas,rcar-gen2-can";
Signature · 1 line
2.7.4
author
#20 lore raw

PATCH 20/62 ASoC: rsnd: audio_clkout0/1/2/3 are optional properties

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

Renesas sound driver can output Audio-clkout0/1/2/3, but these are optional properties for each board.

(cherry picked from commit 209c09071f365aed48f8a7af5a25ea3edcfb891c)
---
 Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/sound/renesas,rsnd.txt +2 -0
index c57cbd6..bbcb327 100644
@@ -34,6 +34,8 @@ Required properties:
 				  see below for detail.
 - #sound-dai-cells		: it must be 0 if your system is using single DAI
 				  it must be 1 if your system is using multi  DAI
+
+Optional properties:
 - #clock-cells			: it must be 0 if your system has audio_clkout
 				  it must be 1 if your system has audio_clkout0/1/2/3
 - clock-frequency		: for all audio_clkout0/1/2/3
Signature · 1 line
2.7.4
author
#21 lore raw

PATCH 21/62 ASoC: rsnd: add missing DT example for Simple Card

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

(cherry picked from commit f3f17d32fe0f3be9b1514c7e6245edee3673dccc)
---
 .../devicetree/bindings/sound/renesas,rsnd.txt     | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)
Documentation/devicetree/bindings/sound/renesas,rsnd.txt +40 -0
index bbcb327..27c45cb 100644
@@ -246,3 +246,43 @@ rcar_sound: sound at ec500000 {
 		};
 	};
 };
+
+Example: simple sound card
+
+	rsnd_ak4643: sound {
+		compatible = "simple-audio-card";
+
+		simple-audio-card,format = "left_j";
+		simple-audio-card,bitclock-master = <&sndcodec>;
+		simple-audio-card,frame-master = <&sndcodec>;
+
+		sndcpu: simple-audio-card,cpu {
+			sound-dai = <&rcar_sound>;
+		};
+
+		sndcodec: simple-audio-card,codec {
+			sound-dai = <&ak4643>;
+			clocks = <&audio_clock>;
+		};
+	};
+
+&rcar_sound {
+	pinctrl-0 = <&sound_pins &sound_clk_pins>;
+	pinctrl-names = "default";
+
+	/* Single DAI */
+	#sound-dai-cells = <0>;
+
+	status = "okay";
+
+	rcar_sound,dai {
+		dai0 {
+			playback = <&ssi0 &src2 &dvc0>;
+			capture  = <&ssi1 &src3 &dvc1>;
+		};
+	};
+};
+
+&ssi1 {
+	shared-pin;
+};
Signature · 1 line
2.7.4
author
#22 lore raw

PATCH 22/62 ASoC: rsnd: add missing DT example for Simple Card with TDM

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

(cherry picked from commit 44bf5361e21d507e23f8cf8d696c0600f3795e54)
---
 .../devicetree/bindings/sound/renesas,rsnd.txt        | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
Documentation/devicetree/bindings/sound/renesas,rsnd.txt +19 -0
index 27c45cb..3f03fd0 100644
@@ -286,3 +286,22 @@ Example: simple sound card
 &ssi1 {
 	shared-pin;
 };
+
+Example: simple sound card for TDM
+
+	rsnd_tdm: sound {
+		compatible = "simple-audio-card";
+
+		simple-audio-card,format = "left_j";
+		simple-audio-card,bitclock-master = <&sndcodec>;
+		simple-audio-card,frame-master = <&sndcodec>;
+
+		sndcpu: simple-audio-card,cpu {
+			sound-dai = <&rcar_sound>;
+			dai-tdm-slot-num = <6>;
+		};
+
+		sndcodec: simple-audio-card,codec {
+			sound-dai = <&xxx>;
+		};
+	};
Signature · 1 line
2.7.4
author
#23 lore raw

PATCH 23/62 ASoC: rsnd: Add device tree support for r8a774[35]

In reply to Biju Das

Document r8a774[35] specific compatible strings. The Renesas RZ/G1[ME] (r8a774[35]) sound modules are identical to the R-Car Gen2 family. No driver change is needed as the fallback compatible string "renesas,rcar_sound-gen2" activates the right code in the driver.

(cherry picked from commit b0a858a47a7889757dbc9ac9872685955eaa5cc0)
---
 Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/sound/renesas,rsnd.txt +3 -1
index 3f03fd0..649cd3a 100644
@@ -3,9 +3,11 @@ Renesas R-Car sound
 Required properties:
 - compatible			: "renesas,rcar_sound-<soctype>", fallbacks
 				  "renesas,rcar_sound-gen1" if generation1, and
-				  "renesas,rcar_sound-gen2" if generation2
+				  "renesas,rcar_sound-gen2" if generation2 (or RZ/G1)
 				  "renesas,rcar_sound-gen3" if generation3
 				  Examples with soctypes are:
+				    - "renesas,rcar_sound-r8a7743" (RZ/G1M)
+				    - "renesas,rcar_sound-r8a7745" (RZ/G1E)
 				    - "renesas,rcar_sound-r8a7778" (R-Car M1A)
 				    - "renesas,rcar_sound-r8a7790" (R-Car H2)
 				    - "renesas,rcar_sound-r8a7791" (R-Car M2-W)
Signature · 1 line
2.7.4
author
#24 lore raw

PATCH 24/62 ARM: shmobile: defconfig: Enable SGTL5000 audio codec

In reply to Biju Das

The iWave RZ/G1M Q7 carrier board supports I2S audio codec "SGTL5000".

To increase hardware support enable the driver in the shmobile_defconfig multiplatform configuration.

(cherry picked from commit 66d7b080aade3be61f7b41de800215c85a8d3593)
---
 arch/arm/configs/shmobile_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/shmobile_defconfig +1 -0
index dfbd2de..8b559ca 100644
@@ -162,6 +162,7 @@ CONFIG_SND_SOC_SH4_FSI=y
 CONFIG_SND_SOC_RCAR=y
 CONFIG_SND_SOC_RSRC_CARD=y
 CONFIG_SND_SOC_AK4642=y
+CONFIG_SND_SOC_SGTL5000=y
 CONFIG_SND_SOC_WM8978=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
Signature · 1 line
2.7.4
author
#25 lore raw

PATCH 25/62 dmaengine: rcar-dmac: Document SoC specific bindings

In reply to Biju Das

From: Simon Horman <[email protected]>

In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted.

Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller driver to follow this convention.

Cc devicetree at vger.kernel.org
Cc Magnus Damm <[email protected]>
Cc Laurent Pinchart <[email protected]>
(cherry picked from commit 6bf641039f96e0c0cf3b10ae9ba12039d1a01122)
---
 Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt +10 -3
index 09daeef..5b902ac 100644
@@ -14,7 +14,14 @@ not described in these device tree bindings.
 
 Required Properties:
 
-- compatible: must contain "renesas,rcar-dmac"
+- compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.
+	      Examples with soctypes are:
+		- "renesas,dmac-r8a7790" (R-Car H2)
+		- "renesas,dmac-r8a7791" (R-Car M2-W)
+		- "renesas,dmac-r8a7792" (R-Car V2H)
+		- "renesas,dmac-r8a7793" (R-Car M2-N)
+		- "renesas,dmac-r8a7794" (R-Car E2)
+		- "renesas,dmac-r8a7795" (R-Car H3)
 
 - reg: base address and length of the registers block for the DMAC
 
@@ -35,7 +42,7 @@ Required Properties:
 Example: R8A7790 (R-Car H2) SYS-DMACs
 
 	dmac0: dma-controller at e6700000 {
-		compatible = "renesas,rcar-dmac";
+		compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 		reg = <0 0xe6700000 0 0x20000>;
 		interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
 			      0 200 IRQ_TYPE_LEVEL_HIGH
@@ -65,7 +72,7 @@ Example: R8A7790 (R-Car H2) SYS-DMACs
 	};
 
 	dmac1: dma-controller@e6720000 {
-		compatible = "renesas,rcar-dmac";
+		compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 		reg = <0 0xe6720000 0 0x20000>;
 		interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
 			      0 216 IRQ_TYPE_LEVEL_HIGH
Signature · 1 line
2.7.4
author
#26 lore raw

PATCH 26/62 DT: dmaengine: rcar-dmac: document R8A7743/5 support

In reply to Biju Das

From: Sergei Shtylyov <[email protected]>

Renesas RZ/G SoC also have the R-Car gen2/3 compatible DMA controllers. Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings.

(cherry picked from commit 3770f2a6bfe00869a4b83ee3cced0361ab33289a)
---
 Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt +3 -1
index 5b902ac..5f2ce66 100644
@@ -1,4 +1,4 @@
-* Renesas R-Car DMA Controller Device Tree bindings
+* Renesas R-Car (RZ/G) DMA Controller Device Tree bindings
 
 Renesas R-Car Generation 2 SoCs have multiple multi-channel DMA
 controller instances named DMAC capable of serving multiple clients. Channels
@@ -16,6 +16,8 @@ Required Properties:
 
 - compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.
 	      Examples with soctypes are:
+		- "renesas,dmac-r8a7743" (RZ/G1M)
+		- "renesas,dmac-r8a7745" (RZ/G1E)
 		- "renesas,dmac-r8a7790" (R-Car H2)
 		- "renesas,dmac-r8a7791" (R-Car M2-W)
 		- "renesas,dmac-r8a7792" (R-Car V2H)
Signature · 1 line
2.7.4
author
#27 lore raw

PATCH 27/62 ASoC: sgtl5000: Remove misleading comment

In reply to Biju Das

From: Clemens Gruber <[email protected]>

All new designs should use external VDDD according to official documentation. See ER1 in errata sheet:
http://cache.nxp.com/files/analog/doc/errata/SGTL5000ER.pdf

(cherry picked from commit 7e74436410a9a74f41f3be9cc45b504e83544f60)
---
 sound/soc/codecs/sgtl5000.c | 1 -
 1 file changed, 1 deletion(-)
sound/soc/codecs/sgtl5000.c +0 -1
index 08b4046..23766bc 100644
@@ -1113,7 +1113,6 @@ static const u8 vol_quot_table[] = {
  * and should be set according to:
  * 1. vddd provided by external or not
  * 2. vdda and vddio voltage value. > 3.1v or not
- * 3. chip revision >=0x11 or not. If >=0x11, not use external vddd.
  */
 static int sgtl5000_set_power_regs(struct snd_soc_codec *codec)
 {
Signature · 1 line
2.7.4
author
#28 lore raw

PATCH 28/62 ASoC: sgtl5000: Fix regulator support

In reply to Biju Das

From: Eric Nelson <[email protected]>

Regulator support on SGTL5000 is broken because the VDDIO and VDDA and VDDD should be powered on before enabling MCLK as shown in Figure 4 of [1]. This requires moving control of the regulators from the codec block to the I2C block of the driver.

The bulk of this patch consists of swapping the codec device with the i2c client. The new field num_supplies in struct sgtl5000_priv is used instead of ARRAY_SIZE(supplies) to handle the special case when the internal LDO is used instead of external VDDD.

Note that ER1 in the SGTL5000 Errata document [2] suggests that all designs should use external VDDD.

Since the internal LDO can only be enabled after I2C is available, there's no benefit in treating it as a regulator, so this patch removes the regulator structure surrounding it.

Instead, a single block of code in sgtl5000_i2c_probe() performs the initialization sequence in section 2.2.1.1 of [3] and page 26 of [1].

References:
[1] SGTL5000 data sheet

    http://cache.nxp.com/files/analog/doc/data_sheet/SGTL5000.pdf
[2] SGTL5000 errata
    http://cache.nxp.com/files/analog/doc/errata/SGTL5000ER.pdf
[3] SGTL5000 Initialization and programming app note
    http://cache.nxp.com/files/analog/doc/app_note/AN3663.pdf
(cherry picked from commit 940adb280d23512965409c1fd6b42cc796ce6eb8)
---
 sound/soc/codecs/sgtl5000.c | 343 ++++++++++----------------------------------
 1 file changed, 78 insertions(+), 265 deletions(-)
sound/soc/codecs/sgtl5000.c +78 -265
index 23766bc..77bdd1d 100644
@@ -92,36 +92,8 @@ static const char *supply_names[SGTL5000_SUPPLY_NUM] = {
 	"VDDD"
 };
 
-#define LDO_CONSUMER_NAME	"VDDD_LDO"
 #define LDO_VOLTAGE		1200000
 
-static struct regulator_consumer_supply ldo_consumer[] = {
-	REGULATOR_SUPPLY(LDO_CONSUMER_NAME, NULL),
-};
-
-static struct regulator_init_data ldo_init_data = {
-	.constraints = {
-		.min_uV                 = 1200000,
-		.max_uV                 = 1200000,
-		.valid_modes_mask       = REGULATOR_MODE_NORMAL,
-		.valid_ops_mask         = REGULATOR_CHANGE_STATUS,
-	},
-	.num_consumer_supplies = 1,
-	.consumer_supplies = &ldo_consumer[0],
-};
-
-/*
- * sgtl5000 internal ldo regulator,
- * enabled when VDDD not provided
- */
-struct ldo_regulator {
-	struct regulator_desc desc;
-	struct regulator_dev *dev;
-	int voltage;
-	void *codec_data;
-	bool enabled;
-};
-
 enum sgtl5000_micbias_resistor {
 	SGTL5000_MICBIAS_OFF = 0,
 	SGTL5000_MICBIAS_2K = 2,
@@ -135,7 +107,7 @@ struct sgtl5000_priv {
 	int master;	/* i2s master or not */
 	int fmt;	/* i2s data format */
 	struct regulator_bulk_data supplies[SGTL5000_SUPPLY_NUM];
-	struct ldo_regulator *ldo;
+	int num_supplies;
 	struct regmap *regmap;
 	struct clk *mclk;
 	int revision;
@@ -778,155 +750,6 @@ static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream,
 	return 0;
 }
 
-#ifdef CONFIG_REGULATOR
-static int ldo_regulator_is_enabled(struct regulator_dev *dev)
-{
-	struct ldo_regulator *ldo = rdev_get_drvdata(dev);
-
-	return ldo->enabled;
-}
-
-static int ldo_regulator_enable(struct regulator_dev *dev)
-{
-	struct ldo_regulator *ldo = rdev_get_drvdata(dev);
-	struct snd_soc_codec *codec = (struct snd_soc_codec *)ldo->codec_data;
-	int reg;
-
-	if (ldo_regulator_is_enabled(dev))
-		return 0;
-
-	/* set regulator value firstly */
-	reg = (1600 - ldo->voltage / 1000) / 50;
-	reg = clamp(reg, 0x0, 0xf);
-
-	/* amend the voltage value, unit: uV */
-	ldo->voltage = (1600 - reg * 50) * 1000;
-
-	/* set voltage to register */
-	snd_soc_update_bits(codec, SGTL5000_CHIP_LINREG_CTRL,
-				SGTL5000_LINREG_VDDD_MASK, reg);
-
-	snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
-				SGTL5000_LINEREG_D_POWERUP,
-				SGTL5000_LINEREG_D_POWERUP);
-
-	/* when internal ldo is enabled, simple digital power can be disabled */
-	snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
-				SGTL5000_LINREG_SIMPLE_POWERUP,
-				0);
-
-	ldo->enabled = 1;
-	return 0;
-}
-
-static int ldo_regulator_disable(struct regulator_dev *dev)
-{
-	struct ldo_regulator *ldo = rdev_get_drvdata(dev);
-	struct snd_soc_codec *codec = (struct snd_soc_codec *)ldo->codec_data;
-
-	snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
-				SGTL5000_LINEREG_D_POWERUP,
-				0);
-
-	/* clear voltage info */
-	snd_soc_update_bits(codec, SGTL5000_CHIP_LINREG_CTRL,
-				SGTL5000_LINREG_VDDD_MASK, 0);
-
-	ldo->enabled = 0;
-
-	return 0;
-}
-
-static int ldo_regulator_get_voltage(struct regulator_dev *dev)
-{
-	struct ldo_regulator *ldo = rdev_get_drvdata(dev);
-
-	return ldo->voltage;
-}
-
-static struct regulator_ops ldo_regulator_ops = {
-	.is_enabled = ldo_regulator_is_enabled,
-	.enable = ldo_regulator_enable,
-	.disable = ldo_regulator_disable,
-	.get_voltage = ldo_regulator_get_voltage,
-};
-
-static int ldo_regulator_register(struct snd_soc_codec *codec,
-				struct regulator_init_data *init_data,
-				int voltage)
-{
-	struct ldo_regulator *ldo;
-	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
-	struct regulator_config config = { };
-
-	ldo = kzalloc(sizeof(struct ldo_regulator), GFP_KERNEL);
-
-	if (!ldo)
-		return -ENOMEM;
-
-	ldo->desc.name = kstrdup(dev_name(codec->dev), GFP_KERNEL);
-	if (!ldo->desc.name) {
-		kfree(ldo);
-		dev_err(codec->dev, "failed to allocate decs name memory\n");
-		return -ENOMEM;
-	}
-
-	ldo->desc.type  = REGULATOR_VOLTAGE;
-	ldo->desc.owner = THIS_MODULE;
-	ldo->desc.ops   = &ldo_regulator_ops;
-	ldo->desc.n_voltages = 1;
-
-	ldo->codec_data = codec;
-	ldo->voltage = voltage;
-
-	config.dev = codec->dev;
-	config.driver_data = ldo;
-	config.init_data = init_data;
-
-	ldo->dev = regulator_register(&ldo->desc, &config);
-	if (IS_ERR(ldo->dev)) {
-		int ret = PTR_ERR(ldo->dev);
-
-		dev_err(codec->dev, "failed to register regulator\n");
-		kfree(ldo->desc.name);
-		kfree(ldo);
-
-		return ret;
-	}
-	sgtl5000->ldo = ldo;
-
-	return 0;
-}
-
-static int ldo_regulator_remove(struct snd_soc_codec *codec)
-{
-	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
-	struct ldo_regulator *ldo = sgtl5000->ldo;
-
-	if (!ldo)
-		return 0;
-
-	regulator_unregister(ldo->dev);
-	kfree(ldo->desc.name);
-	kfree(ldo);
-
-	return 0;
-}
-#else
-static int ldo_regulator_register(struct snd_soc_codec *codec,
-				struct regulator_init_data *init_data,
-				int voltage)
-{
-	dev_err(codec->dev, "this setup needs regulator support in the kernel\n");
-	return -EINVAL;
-}
-
-static int ldo_regulator_remove(struct snd_soc_codec *codec)
-{
-	return 0;
-}
-#endif
-
 /*
  * set dac bias
  * common state changes:
@@ -950,7 +773,7 @@ static int sgtl5000_set_bias_level(struct snd_soc_codec *codec,
 	case SND_SOC_BIAS_STANDBY:
 		if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
 			ret = regulator_bulk_enable(
-						ARRAY_SIZE(sgtl5000->supplies),
+						sgtl5000->num_supplies,
 						sgtl5000->supplies);
 			if (ret)
 				return ret;
@@ -964,7 +787,7 @@ static int sgtl5000_set_bias_level(struct snd_soc_codec *codec,
 					"Failed to restore cache: %d\n", ret);
 
 				regcache_cache_only(sgtl5000->regmap, true);
-				regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies),
+				regulator_bulk_disable(sgtl5000->num_supplies,
 						       sgtl5000->supplies);
 
 				return ret;
@@ -974,8 +797,8 @@ static int sgtl5000_set_bias_level(struct snd_soc_codec *codec,
 		break;
 	case SND_SOC_BIAS_OFF:
 		regcache_cache_only(sgtl5000->regmap, true);
-		regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies),
-					sgtl5000->supplies);
+		regulator_bulk_disable(sgtl5000->num_supplies,
+				       sgtl5000->supplies);
 		break;
 	}
 
@@ -1130,7 +953,9 @@ static int sgtl5000_set_power_regs(struct snd_soc_codec *codec)
 
 	vdda  = regulator_get_voltage(sgtl5000->supplies[VDDA].consumer);
 	vddio = regulator_get_voltage(sgtl5000->supplies[VDDIO].consumer);
-	vddd  = regulator_get_voltage(sgtl5000->supplies[VDDD].consumer);
+	vddd  = (sgtl5000->num_supplies > VDDD)
+		? regulator_get_voltage(sgtl5000->supplies[VDDD].consumer)
+		: LDO_VOLTAGE;
 
 	vdda  = vdda / 1000;
 	vddio = vddio / 1000;
@@ -1255,78 +1080,43 @@ static int sgtl5000_set_power_regs(struct snd_soc_codec *codec)
 	return 0;
 }
 
-static int sgtl5000_replace_vddd_with_ldo(struct snd_soc_codec *codec)
-{
-	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
-	int ret;
-
-	/* set internal ldo to 1.2v */
-	ret = ldo_regulator_register(codec, &ldo_init_data, LDO_VOLTAGE);
-	if (ret) {
-		dev_err(codec->dev,
-			"Failed to register vddd internal supplies: %d\n", ret);
-		return ret;
-	}
-
-	sgtl5000->supplies[VDDD].supply = LDO_CONSUMER_NAME;
-
-	dev_info(codec->dev, "Using internal LDO instead of VDDD\n");
-	return 0;
-}
-
-static int sgtl5000_enable_regulators(struct snd_soc_codec *codec)
+static int sgtl5000_enable_regulators(struct i2c_client *client)
 {
 	int ret;
 	int i;
 	int external_vddd = 0;
-	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
 	struct regulator *vddd;
+	struct sgtl5000_priv *sgtl5000 = i2c_get_clientdata(client);
 
 	for (i = 0; i < ARRAY_SIZE(sgtl5000->supplies); i++)
 		sgtl5000->supplies[i].supply = supply_names[i];
 
-	/* External VDDD only works before revision 0x11 */
-	if (sgtl5000->revision < 0x11) {
-		vddd = regulator_get_optional(codec->dev, "VDDD");
-		if (IS_ERR(vddd)) {
-			/* See if it's just not registered yet */
-			if (PTR_ERR(vddd) == -EPROBE_DEFER)
-				return -EPROBE_DEFER;
-		} else {
-			external_vddd = 1;
-			regulator_put(vddd);
-		}
-	}
-
-	if (!external_vddd) {
-		ret = sgtl5000_replace_vddd_with_ldo(codec);
-		if (ret)
-			return ret;
+	vddd = regulator_get_optional(&client->dev, "VDDD");
+	if (IS_ERR(vddd)) {
+		/* See if it's just not registered yet */
+		if (PTR_ERR(vddd) == -EPROBE_DEFER)
+			return -EPROBE_DEFER;
+	} else {
+		external_vddd = 1;
+		regulator_put(vddd);
 	}
 
-	ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies),
+	sgtl5000->num_supplies = ARRAY_SIZE(sgtl5000->supplies)
+				 - 1 + external_vddd;
+	ret = regulator_bulk_get(&client->dev, sgtl5000->num_supplies,
 				 sgtl5000->supplies);
 	if (ret)
-		goto err_ldo_remove;
-
-	ret = regulator_bulk_enable(ARRAY_SIZE(sgtl5000->supplies),
-					sgtl5000->supplies);
-	if (ret)
-		goto err_regulator_free;
-
-	/* wait for all power rails bring up */
-	udelay(10);
+		return ret;
 
-	return 0;
+	ret = regulator_bulk_enable(sgtl5000->num_supplies,
+				    sgtl5000->supplies);
+	if (!ret)
+		usleep_range(10, 20);
+	else
+		regulator_bulk_free(sgtl5000->num_supplies,
+				    sgtl5000->supplies);
 
-err_regulator_free:
-	regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies),
-				sgtl5000->supplies);
-err_ldo_remove:
-	if (!external_vddd)
-		ldo_regulator_remove(codec);
 	return ret;
-
 }
 
 static int sgtl5000_probe(struct snd_soc_codec *codec)
@@ -1334,10 +1124,6 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
 	int ret;
 	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
 
-	ret = sgtl5000_enable_regulators(codec);
-	if (ret)
-		return ret;
-
 	/* power up sgtl5000 */
 	ret = sgtl5000_set_power_regs(codec);
 	if (ret)
@@ -1388,25 +1174,11 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
 	return 0;
 
 err:
-	regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies),
-						sgtl5000->supplies);
-	regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies),
-				sgtl5000->supplies);
-	ldo_regulator_remove(codec);
-
 	return ret;
 }
 
 static int sgtl5000_remove(struct snd_soc_codec *codec)
 {
-	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
-
-	regulator_bulk_disable(ARRAY_SIZE(sgtl5000->supplies),
-						sgtl5000->supplies);
-	regulator_bulk_free(ARRAY_SIZE(sgtl5000->supplies),
-				sgtl5000->supplies);
-	ldo_regulator_remove(codec);
-
 	return 0;
 }
 
@@ -1474,11 +1246,17 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 	if (!sgtl5000)
 		return -ENOMEM;
 
+	i2c_set_clientdata(client, sgtl5000);
+
+	ret = sgtl5000_enable_regulators(client);
+	if (ret)
+		return ret;
+
 	sgtl5000->regmap = devm_regmap_init_i2c(client, &sgtl5000_regmap);
 	if (IS_ERR(sgtl5000->regmap)) {
 		ret = PTR_ERR(sgtl5000->regmap);
 		dev_err(&client->dev, "Failed to allocate regmap: %d\n", ret);
-		return ret;
+		goto disable_regs;
 	}
 
 	sgtl5000->mclk = devm_clk_get(&client->dev, NULL);
@@ -1487,21 +1265,25 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 		dev_err(&client->dev, "Failed to get mclock: %d\n", ret);
 		/* Defer the probe to see if the clk will be provided later */
 		if (ret == -ENOENT)
-			return -EPROBE_DEFER;
-		return ret;
+			ret = -EPROBE_DEFER;
+		goto disable_regs;
 	}
 
 	ret = clk_prepare_enable(sgtl5000->mclk);
-	if (ret)
-		return ret;
+	if (ret) {
+		dev_err(&client->dev, "Error enabling clock %d\n", ret);
+		goto disable_regs;
+	}
 
 	/* Need 8 clocks before I2C accesses */
 	udelay(1);
 
 	/* read chip information */
 	ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, &reg);
-	if (ret)
+	if (ret) {
+		dev_err(&client->dev, "Error reading chip id %d\n", ret);
 		goto disable_clk;
+	}
 
 	if (((reg & SGTL5000_PARTID_MASK) >> SGTL5000_PARTID_SHIFT) !=
 	    SGTL5000_PARTID_PART_ID) {
@@ -1515,6 +1297,31 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 	dev_info(&client->dev, "sgtl5000 revision 0x%x\n", rev);
 	sgtl5000->revision = rev;
 
+	/* Follow section 2.2.1.1 of AN3663 */
+	if (sgtl5000->num_supplies <= VDDD) {
+		/* internal [email protected] */
+		regmap_update_bits(sgtl5000->regmap,
+				   SGTL5000_CHIP_LINREG_CTRL,
+				   SGTL5000_LINREG_VDDD_MASK, 8);
+		regmap_update_bits(sgtl5000->regmap,
+				   SGTL5000_CHIP_ANA_POWER,
+				   SGTL5000_LINEREG_D_POWERUP
+				   | SGTL5000_LINREG_SIMPLE_POWERUP,
+				   SGTL5000_LINEREG_D_POWERUP);
+		dev_info(&client->dev, "Using internal LDO instead of VDDD: check ER1\n");
+	} else {
+		/* using external LDO for VDDD
+		 * Clear startup powerup and simple powerup
+		 * bits to save power
+		 */
+		regmap_update_bits(sgtl5000->regmap,
+				   SGTL5000_CHIP_ANA_POWER,
+				   SGTL5000_STARTUP_POWERUP
+				   | SGTL5000_LINREG_SIMPLE_POWERUP,
+				   0);
+		dev_dbg(&client->dev, "Using external VDDD\n");
+	}
+
 	if (np) {
 		if (!of_property_read_u32(np,
 			"micbias-resistor-k-ohms", &value)) {
@@ -1556,8 +1363,6 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 		}
 	}
 
-	i2c_set_clientdata(client, sgtl5000);
-
 	/* Ensure sgtl5000 will start with sane register values */
 	ret = sgtl5000_fill_defaults(sgtl5000);
 	if (ret)
@@ -1572,6 +1377,11 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 
 disable_clk:
 	clk_disable_unprepare(sgtl5000->mclk);
+
+disable_regs:
+	regulator_bulk_disable(sgtl5000->num_supplies, sgtl5000->supplies);
+	regulator_bulk_free(sgtl5000->num_supplies, sgtl5000->supplies);
+
 	return ret;
 }
 
@@ -1581,6 +1391,9 @@ static int sgtl5000_i2c_remove(struct i2c_client *client)
 
 	snd_soc_unregister_codec(&client->dev);
 	clk_disable_unprepare(sgtl5000->mclk);
+	regulator_bulk_disable(sgtl5000->num_supplies, sgtl5000->supplies);
+	regulator_bulk_free(sgtl5000->num_supplies, sgtl5000->supplies);
+
 	return 0;
 }
 
Signature · 1 line
2.7.4
author
#29 lore raw

PATCH 29/62 ASoC: sgtl5000: Write all default registers

In reply to Biju Das

From: Eric Nelson <[email protected]>

If an error occurs writing defaults, produce an error message but continue writing other registers. The failure of a single write should not cause catastrophic device failure.

In at least one occurrence, I2C writes of CHIP_ANA_POWER were nacked, though continuing allowed the device to operate properly.

(cherry picked from commit f219b16959ee3df2fd49f09493b3f6b28487c416)
---
 sound/soc/codecs/sgtl5000.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)
sound/soc/codecs/sgtl5000.c +6 -7
index 77bdd1d..56d61a2 100644
@@ -1219,8 +1219,9 @@ static const struct regmap_config sgtl5000_regmap = {
  * and avoid problems like, not being able to probe after an audio playback
  * followed by a system reset or a 'reboot' command in Linux
  */
-static int sgtl5000_fill_defaults(struct sgtl5000_priv *sgtl5000)
+static void sgtl5000_fill_defaults(struct i2c_client *client)
 {
+	struct sgtl5000_priv *sgtl5000 = i2c_get_clientdata(client);
 	int i, ret, val, index;
 
 	for (i = 0; i < ARRAY_SIZE(sgtl5000_reg_defaults); i++) {
@@ -1228,10 +1229,10 @@ static int sgtl5000_fill_defaults(struct sgtl5000_priv *sgtl5000)
 		index = sgtl5000_reg_defaults[i].reg;
 		ret = regmap_write(sgtl5000->regmap, index, val);
 		if (ret)
-			return ret;
+			dev_err(&client->dev,
+				"%s: error %d setting reg 0x%02x to 0x%04x\n",
+				__func__, ret, index, val);
 	}
-
-	return 0;
 }
 
 static int sgtl5000_i2c_probe(struct i2c_client *client,
@@ -1364,9 +1365,7 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 	}
 
 	/* Ensure sgtl5000 will start with sane register values */
-	ret = sgtl5000_fill_defaults(sgtl5000);
-	if (ret)
-		goto disable_clk;
+	sgtl5000_fill_defaults(client);
 
 	ret = snd_soc_register_codec(&client->dev,
 			&sgtl5000_driver, &sgtl5000_dai, 1);
Signature · 1 line
2.7.4
author
#30 lore raw

PATCH 30/62 ASoC: sgtl5000: Initialize CHIP_ANA_POWER to power-on defaults

In reply to Biju Das

From: Eric Nelson <[email protected]>

Initialize CHIP_ANA_POWER to match power on defaults, which disables ADC, DAC, and charge pumps.

In the process, remove references to the following register/bitfields from the sgtl5000_set_power_regs routine:
CHIP_ANA_POWER/LINREG_SIMPLE_POWERUP and CHIP_LINREG_CTRL/LINREG_VDD_MASK

And remove CHIP_ANA_POWER and CHIP_LINREG_CTRL from the set of default registers so they don't get clobbered by sgtl5000_fill_defaults().

(cherry picked from commit 3d632cc87204b51a4b32bdaa970fe6b8d879347e)
---
 sound/soc/codecs/sgtl5000.c | 56 +++++++++++++++++----------------------------
 sound/soc/codecs/sgtl5000.h |  1 +
 2 files changed, 22 insertions(+), 35 deletions(-)
sound/soc/codecs/sgtl5000.c +21 -35
index 56d61a2..42f2eb6 100644
@@ -47,12 +47,10 @@ static const struct reg_default sgtl5000_reg_defaults[] = {
 	{ SGTL5000_CHIP_ANA_ADC_CTRL,		0x0000 },
 	{ SGTL5000_CHIP_ANA_HP_CTRL,		0x1818 },
 	{ SGTL5000_CHIP_ANA_CTRL,		0x0111 },
-	{ SGTL5000_CHIP_LINREG_CTRL,		0x0000 },
 	{ SGTL5000_CHIP_REF_CTRL,		0x0000 },
 	{ SGTL5000_CHIP_MIC_CTRL,		0x0000 },
 	{ SGTL5000_CHIP_LINE_OUT_CTRL,		0x0000 },
 	{ SGTL5000_CHIP_LINE_OUT_VOL,		0x0404 },
-	{ SGTL5000_CHIP_ANA_POWER,		0x7060 },
 	{ SGTL5000_CHIP_PLL_CTRL,		0x5000 },
 	{ SGTL5000_CHIP_CLK_TOP_CTRL,		0x0000 },
 	{ SGTL5000_CHIP_ANA_STATUS,		0x0000 },
@@ -93,6 +91,7 @@ static const char *supply_names[SGTL5000_SUPPLY_NUM] = {
 };
 
 #define LDO_VOLTAGE		1200000
+#define LINREG_VDDD	((1600 - LDO_VOLTAGE / 1000) / 50)
 
 enum sgtl5000_micbias_resistor {
 	SGTL5000_MICBIAS_OFF = 0,
@@ -1002,25 +1001,6 @@ static int sgtl5000_set_power_regs(struct snd_soc_codec *codec)
 
 	snd_soc_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr);
 
-	/* set voltage to register */
-	snd_soc_update_bits(codec, SGTL5000_CHIP_LINREG_CTRL,
-				SGTL5000_LINREG_VDDD_MASK, 0x8);
-
-	/*
-	 * if vddd linear reg has been enabled,
-	 * simple digital supply should be clear to get
-	 * proper VDDD voltage.
-	 */
-	if (ana_pwr & SGTL5000_LINEREG_D_POWERUP)
-		snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
-				SGTL5000_LINREG_SIMPLE_POWERUP,
-				0);
-	else
-		snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
-				SGTL5000_LINREG_SIMPLE_POWERUP |
-				SGTL5000_STARTUP_POWERUP,
-				0);
-
 	/*
 	 * set ADC/DAC VAG to vdda / 2,
 	 * should stay in range (0.8v, 1.575v)
@@ -1242,6 +1222,7 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 	int ret, reg, rev;
 	struct device_node *np = client->dev.of_node;
 	u32 value;
+	u16 ana_pwr;
 
 	sgtl5000 = devm_kzalloc(&client->dev, sizeof(*sgtl5000), GFP_KERNEL);
 	if (!sgtl5000)
@@ -1299,29 +1280,34 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 	sgtl5000->revision = rev;
 
 	/* Follow section 2.2.1.1 of AN3663 */
+	ana_pwr = SGTL5000_ANA_POWER_DEFAULT;
 	if (sgtl5000->num_supplies <= VDDD) {
 		/* internal [email protected] */
-		regmap_update_bits(sgtl5000->regmap,
-				   SGTL5000_CHIP_LINREG_CTRL,
-				   SGTL5000_LINREG_VDDD_MASK, 8);
-		regmap_update_bits(sgtl5000->regmap,
-				   SGTL5000_CHIP_ANA_POWER,
-				   SGTL5000_LINEREG_D_POWERUP
-				   | SGTL5000_LINREG_SIMPLE_POWERUP,
-				   SGTL5000_LINEREG_D_POWERUP);
-		dev_info(&client->dev, "Using internal LDO instead of VDDD: check ER1\n");
+		ret = regmap_update_bits(sgtl5000->regmap,
+					 SGTL5000_CHIP_LINREG_CTRL,
+					 SGTL5000_LINREG_VDDD_MASK,
+					 LINREG_VDDD);
+		if (ret)
+			dev_err(&client->dev,
+				"Error %d setting LINREG_VDDD\n", ret);
+
+		ana_pwr |= SGTL5000_LINEREG_D_POWERUP;
+		dev_info(&client->dev,
+			 "Using internal LDO instead of VDDD: check ER1\n");
 	} else {
 		/* using external LDO for VDDD
 		 * Clear startup powerup and simple powerup
 		 * bits to save power
 		 */
-		regmap_update_bits(sgtl5000->regmap,
-				   SGTL5000_CHIP_ANA_POWER,
-				   SGTL5000_STARTUP_POWERUP
-				   | SGTL5000_LINREG_SIMPLE_POWERUP,
-				   0);
+		ana_pwr &= ~(SGTL5000_STARTUP_POWERUP
+			     | SGTL5000_LINREG_SIMPLE_POWERUP);
 		dev_dbg(&client->dev, "Using external VDDD\n");
 	}
+	ret = regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, ana_pwr);
+	if (ret)
+		dev_err(&client->dev,
+			"Error %d setting CHIP_ANA_POWER to %04x\n",
+			ret, ana_pwr);
 
 	if (np) {
 		if (!of_property_read_u32(np,
sound/soc/codecs/sgtl5000.h +1 -0
index 1c317de..1be8237 100644
@@ -325,6 +325,7 @@
 /*
  * SGTL5000_CHIP_ANA_POWER
  */
+#define SGTL5000_ANA_POWER_DEFAULT		0x7060
 #define SGTL5000_DAC_STEREO			0x4000
 #define SGTL5000_LINREG_SIMPLE_POWERUP		0x2000
 #define SGTL5000_STARTUP_POWERUP		0x1000
Signature · 1 line
2.7.4
author
#31 lore raw

PATCH 31/62 ASoC: sgtl5000: Disable internal PLL early

In reply to Biju Das

From: Eric Nelson <[email protected]>

To handle the soft reboot case, the internal PLL must be disabled in SGTL5000_CHIP_CLK_CTRL before clearing bits SGTL5000_VCOAMP_POWERUP and SGTL5000_PLL_POWERUP in register SGTL5000_CHIP_ANA_POWER.

(cherry picked from commit 08dea16e0960ea5caf7876045b747145cb677096)
---
 sound/soc/codecs/sgtl5000.c | 9 ++++++++-
 sound/soc/codecs/sgtl5000.h | 1 +
 2 files changed, 9 insertions(+), 1 deletion(-)
sound/soc/codecs/sgtl5000.c +8 -1
index 42f2eb6..0916bb4 100644
@@ -38,7 +38,6 @@
 /* default value of sgtl5000 registers */
 static const struct reg_default sgtl5000_reg_defaults[] = {
 	{ SGTL5000_CHIP_DIG_POWER,		0x0000 },
-	{ SGTL5000_CHIP_CLK_CTRL,		0x0008 },
 	{ SGTL5000_CHIP_I2S_CTRL,		0x0010 },
 	{ SGTL5000_CHIP_SSS_CTRL,		0x0010 },
 	{ SGTL5000_CHIP_ADCDAC_CTRL,		0x020c },
@@ -1279,6 +1278,14 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
 	dev_info(&client->dev, "sgtl5000 revision 0x%x\n", rev);
 	sgtl5000->revision = rev;
 
+	/* reconfigure the clocks in case we're using the PLL */
+	ret = regmap_write(sgtl5000->regmap,
+			   SGTL5000_CHIP_CLK_CTRL,
+			   SGTL5000_CHIP_CLK_CTRL_DEFAULT);
+	if (ret)
+		dev_err(&client->dev,
+			"Error %d initializing CHIP_CLK_CTRL\n", ret);
+
 	/* Follow section 2.2.1.1 of AN3663 */
 	ana_pwr = SGTL5000_ANA_POWER_DEFAULT;
 	if (sgtl5000->num_supplies <= VDDD) {
sound/soc/codecs/sgtl5000.h +1 -0
index 1be8237..22f3442 100644
@@ -92,6 +92,7 @@
 /*
  * SGTL5000_CHIP_CLK_CTRL
  */
+#define SGTL5000_CHIP_CLK_CTRL_DEFAULT		0x0008
 #define SGTL5000_RATE_MODE_MASK			0x0030
 #define SGTL5000_RATE_MODE_SHIFT		4
 #define SGTL5000_RATE_MODE_WIDTH		2
Signature · 1 line
2.7.4
author
#32 lore raw

PATCH 32/62 ASoC: sgtl5000: Do not disable regulators in SND_SOC_BIAS_OFF

In reply to Biju Das

From: Eric Nelson <[email protected]>

Disabling the SGTL5000 through regulators would certainly save more power than simply disabling the reference voltages as described in the data sheet, but won't properly restore things on resume.

This driver does not support active regulators. So we simply disable the reference bias currents.

(cherry picked from commit 8419caa7270291e26f8b34b12b29680586c85d30)
---
 sound/soc/codecs/sgtl5000.c | 35 +++++------------------------------
 1 file changed, 5 insertions(+), 30 deletions(-)
sound/soc/codecs/sgtl5000.c +5 -30
index 0916bb4..39a178a 100644
@@ -761,42 +761,17 @@ static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream,
 static int sgtl5000_set_bias_level(struct snd_soc_codec *codec,
 				   enum snd_soc_bias_level level)
 {
-	int ret;
-	struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
-
 	switch (level) {
 	case SND_SOC_BIAS_ON:
 	case SND_SOC_BIAS_PREPARE:
-		break;
 	case SND_SOC_BIAS_STANDBY:
-		if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
-			ret = regulator_bulk_enable(
-						sgtl5000->num_supplies,
-						sgtl5000->supplies);
-			if (ret)
-				return ret;
-			udelay(10);
-
-			regcache_cache_only(sgtl5000->regmap, false);
-
-			ret = regcache_sync(sgtl5000->regmap);
-			if (ret != 0) {
-				dev_err(codec->dev,
-					"Failed to restore cache: %d\n", ret);
-
-				regcache_cache_only(sgtl5000->regmap, true);
-				regulator_bulk_disable(sgtl5000->num_supplies,
-						       sgtl5000->supplies);
-
-				return ret;
-			}
-		}
-
+		snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
+				    SGTL5000_REFTOP_POWERUP,
+				    SGTL5000_REFTOP_POWERUP);
 		break;
 	case SND_SOC_BIAS_OFF:
-		regcache_cache_only(sgtl5000->regmap, true);
-		regulator_bulk_disable(sgtl5000->num_supplies,
-				       sgtl5000->supplies);
+		snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
+				    SGTL5000_REFTOP_POWERUP, 0);
 		break;
 	}
 
Signature · 1 line
2.7.4
author
#33 lore raw

PATCH 33/62 sgtl5000: add Lineout volume control

In reply to Biju Das

From: Kalle Kankare <[email protected]>

This controls the volume for the line out pins of SGTL5000.

(cherry picked from commit 0593d4612146dc16ff6bd23423bdd434dd7b8c7b)
---
 sound/soc/codecs/sgtl5000.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
sound/soc/codecs/sgtl5000.c +10 -0
index 39a178a..527b759 100644
@@ -385,6 +385,9 @@ static const DECLARE_TLV_DB_RANGE(mic_gain_tlv,
 /* tlv for hp volume, -51.5db to 12.0db, step .5db */
 static const DECLARE_TLV_DB_SCALE(headphone_volume, -5150, 50, 0);
 
+/* tlv for lineout volume, 31 steps of .5db each */
+static const DECLARE_TLV_DB_SCALE(lineout_volume, -1550, 50, 0);
+
 static const struct snd_kcontrol_new sgtl5000_snd_controls[] = {
 	/* SOC_DOUBLE_S8_TLV with invert */
 	{
@@ -413,6 +416,13 @@ static const struct snd_kcontrol_new sgtl5000_snd_controls[] = {
 
 	SOC_SINGLE_TLV("Mic Volume", SGTL5000_CHIP_MIC_CTRL,
 			0, 3, 0, mic_gain_tlv),
+
+	SOC_DOUBLE_TLV("Lineout Playback Volume",
+			SGTL5000_CHIP_LINE_OUT_VOL,
+			SGTL5000_LINE_OUT_VOL_LEFT_SHIFT,
+			SGTL5000_LINE_OUT_VOL_RIGHT_SHIFT,
+			0x1f, 1,
+			lineout_volume),
 };
 
 /* mute the codec used by alsa core */
Signature · 1 line
2.7.4
author
#34 lore raw

PATCH 34/62 ARM: dts: r8a7743: Add audio clocks

In reply to Biju Das

Describe the external audio clocks required by the sound driver. Boards that provide audio clocks need to override the clock frequencies.

(cherry picked from commit f27244593782059ad9e4d176006814609f4abfa1)
---
 arch/arm/boot/dts/r8a7743.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +23 -0
index 9724609..e0531e7 100644
@@ -1499,6 +1499,29 @@
 		clock-frequency = <0>;
 	};
 
+	/*
+	 * The external audio clocks are configured as 0 Hz fixed frequency
+	 * clocks by default.
+	 * Boards that provide audio clocks should override them.
+	 */
+	audio_clk_a: audio_clk_a {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	audio_clk_b: audio_clk_b {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	audio_clk_c: audio_clk_c {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
 	/* External USB clock - can be overridden by the board */
 	usb_extal_clk: usb_extal {
 		compatible = "fixed-clock";
Signature · 1 line
2.7.4
author
#35 lore raw

PATCH 35/62 ARM: dts: r8a7743: Add audio DMAC support

In reply to Biju Das

Instantiate the two audio DMA controllers on the r8a7743 device tree.

(cherry picked from commit 1a86529ed8bc982c690a540ab472cd5a2d93c6cb)

(updated clocks and power-domains property. removed resets property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +60 -0
index e0531e7..625d5ac 100644
@@ -316,6 +316,66 @@
 			dma-channels = <15>;
 		};
 
+		audma0: dma-controller at ec700000 {
+			compatible = "renesas,dmac-r8a7743",
+				     "renesas,rcar-dmac";
+			reg = <0 0xec700000 0 0x10000>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					  "ch0", "ch1", "ch2", "ch3",
+					  "ch4", "ch5", "ch6", "ch7",
+					  "ch8", "ch9", "ch10", "ch11",
+					  "ch12";
+			clocks = <&mstp5_clks R8A7743_CLK_AUDIO_DMAC0>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			#dma-cells = <1>;
+			dma-channels = <13>;
+		};
+
+		audma1: dma-controller at ec720000 {
+			compatible = "renesas,dmac-r8a7743",
+				     "renesas,rcar-dmac";
+			reg = <0 0xec720000 0 0x10000>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					  "ch0", "ch1", "ch2", "ch3",
+					  "ch4", "ch5", "ch6", "ch7",
+					  "ch8", "ch9", "ch10", "ch11",
+					  "ch12";
+			clocks = <&mstp5_clks R8A7743_CLK_AUDIO_DMAC1>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			#dma-cells = <1>;
+			dma-channels = <13>;
+		};
+
 		usb_dmac0: dma-controller at e65a0000 {
 			compatible = "renesas,r8a7743-usb-dmac",
 				     "renesas,usb-dmac";
Signature · 1 line
2.7.4
author
#36 lore raw

PATCH 36/62 ARM: dts: r8a7743: Add sound support

In reply to Biju Das

Define the generic r8a7743(RZ/G1M) part of the sound device node.

This patch is based on the r8a7791 sound work by Kuninori Morimoto.

(cherry picked from commit de812613376a202d70c8ce37211044a29aae33b2)

(updated clock, power-domains property. Removed resets and reset-names properties. Also changed the rcar_sound,module children names (for eg:- ssi-0 to ssi at 0) for similarity with other r-car gen2 devices present in 4.4 kernel)

---
 arch/arm/boot/dts/r8a7743.dtsi | 179 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 179 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +179 -0
index 625d5ac..73c658b 100644
@@ -1549,6 +1549,185 @@
 			power-domains = <&cpg_clocks>;
 			status = "disabled";
 		};
+
+		rcar_sound: sound at ec500000 {
+			/*
+			 * #sound-dai-cells is required
+			 *
+			 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
+			 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
+			 */
+			compatible = "renesas,rcar_sound-r8a7743",
+				     "renesas,rcar_sound-gen2";
+			reg = <0 0xec500000 0 0x1000>, /* SCU */
+			      <0 0xec5a0000 0 0x100>,  /* ADG */
+			      <0 0xec540000 0 0x1000>, /* SSIU */
+			      <0 0xec541000 0 0x280>,  /* SSI */
+			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
+			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+			clocks = <&mstp10_clks R8A7743_CLK_SSI_ALL>,
+				 <&mstp10_clks R8A7743_CLK_SSI9>, <&mstp10_clks R8A7743_CLK_SSI8>,
+				 <&mstp10_clks R8A7743_CLK_SSI7>, <&mstp10_clks R8A7743_CLK_SSI6>,
+				 <&mstp10_clks R8A7743_CLK_SSI5>, <&mstp10_clks R8A7743_CLK_SSI4>,
+				 <&mstp10_clks R8A7743_CLK_SSI3>, <&mstp10_clks R8A7743_CLK_SSI2>,
+				 <&mstp10_clks R8A7743_CLK_SSI1>, <&mstp10_clks R8A7743_CLK_SSI0>,
+				 <&mstp10_clks R8A7743_CLK_SCU_SRC9>, <&mstp10_clks R8A7743_CLK_SCU_SRC8>,
+				 <&mstp10_clks R8A7743_CLK_SCU_SRC7>, <&mstp10_clks R8A7743_CLK_SCU_SRC6>,
+				 <&mstp10_clks R8A7743_CLK_SCU_SRC5>, <&mstp10_clks R8A7743_CLK_SCU_SRC4>,
+				 <&mstp10_clks R8A7743_CLK_SCU_SRC3>, <&mstp10_clks R8A7743_CLK_SCU_SRC2>,
+				 <&mstp10_clks R8A7743_CLK_SCU_SRC1>, <&mstp10_clks R8A7743_CLK_SCU_SRC0>,
+				 <&mstp10_clks R8A7743_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7743_CLK_SCU_CTU1_MIX1>,
+				 <&mstp10_clks R8A7743_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7743_CLK_SCU_CTU1_MIX1>,
+				 <&mstp10_clks R8A7743_CLK_SCU_DVC0>, <&mstp10_clks R8A7743_CLK_SCU_DVC1>,
+				 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+				 <&m2_clk>;
+			clock-names = "ssi-all",
+				      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+				      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+				      "src.9", "src.8", "src.7", "src.6", "src.5",
+				      "src.4", "src.3", "src.2", "src.1", "src.0",
+				      "ctu.0", "ctu.1",
+				      "mix.0", "mix.1",
+				      "dvc.0", "dvc.1",
+				      "clk_a", "clk_b", "clk_c", "clk_i";
+			power-domains = <&cpg_clocks>;
+
+			status = "disabled";
+
+			rcar_sound,dvc {
+				dvc0: dvc at 0 {
+					dmas = <&audma1 0xbc>;
+					dma-names = "tx";
+				};
+				dvc1: dvc at 1 {
+					dmas = <&audma1 0xbe>;
+					dma-names = "tx";
+				};
+			};
+
+			rcar_sound,mix {
+				mix0: mix at 0 { };
+				mix1: mix at 1 { };
+			};
+
+			rcar_sound,ctu {
+				ctu00: ctu at 0 { };
+				ctu01: ctu at 1 { };
+				ctu02: ctu at 2 { };
+				ctu03: ctu at 3 { };
+				ctu10: ctu at 4 { };
+				ctu11: ctu at 5 { };
+				ctu12: ctu at 6 { };
+				ctu13: ctu at 7 { };
+			};
+
+			rcar_sound,src {
+				src0: src at 0 {
+					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x85>, <&audma1 0x9a>;
+					dma-names = "rx", "tx";
+				};
+				src1: src at 1 {
+					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x87>, <&audma1 0x9c>;
+					dma-names = "rx", "tx";
+				};
+				src2: src at 2 {
+					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x89>, <&audma1 0x9e>;
+					dma-names = "rx", "tx";
+				};
+				src3: src at 3 {
+					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+					dma-names = "rx", "tx";
+				};
+				src4: src at 4 {
+					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+					dma-names = "rx", "tx";
+				};
+				src5: src at 5 {
+					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+					dma-names = "rx", "tx";
+				};
+				src6: src at 6 {
+					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x91>, <&audma1 0xb4>;
+					dma-names = "rx", "tx";
+				};
+				src7: src at 7 {
+					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x93>, <&audma1 0xb6>;
+					dma-names = "rx", "tx";
+				};
+				src8: src at 8 {
+					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x95>, <&audma1 0xb8>;
+					dma-names = "rx", "tx";
+				};
+				src9: src at 9 {
+					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x97>, <&audma1 0xba>;
+					dma-names = "rx", "tx";
+				};
+			};
+
+			rcar_sound,ssi {
+				ssi0: ssi at 0 {
+					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi1: ssi at 1 {
+					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi2: ssi at 2 {
+					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi3: ssi at 3 {
+					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi4: ssi at 4 {
+					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi5: ssi at 5 {
+					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi6: ssi at 6 {
+					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi7: ssi at 7 {
+					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi8: ssi at 8 {
+					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi9: ssi at 9 {
+					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+			};
+		};
 	};
 
 	/* External root clock */
Signature · 1 line
2.7.4
author
#37 lore raw

PATCH 37/62 ARM: dts: iwg20d-q7-common: Enable SGTL5000 audio codec

In reply to Biju Das

This patch enables SGTL5000 audio codec on the carrier board.

(cherry picked from commit 3091626868981e086f57d580cb1711b4553c5663)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +24 -0
index 624907b..8d69a67 100644
@@ -20,6 +20,20 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	audio_clock: audio_clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <26000000>;
+	};
+
+	reg_1p5v: 1p5v {
+		compatible = "regulator-fixed";
+		regulator-name = "1P5V";
+		regulator-min-microvolt = <1500000>;
+		regulator-max-microvolt = <1500000>;
+		regulator-always-on;
+	};
+
 	vcc_sdhi1: regulator-vcc-sdhi1 {
 		compatible = "regulator-fixed";
 
@@ -83,6 +97,16 @@
 		compatible = "bq32000";
 		reg = <0x68>;
 	};
+
+	sgtl5000: codec at a {
+		compatible = "fsl,sgtl5000";
+		#sound-dai-cells = <0>;
+		reg = <0x0a>;
+		clocks = <&audio_clock>;
+		VDDA-supply = <&reg_3p3v>;
+		VDDIO-supply = <&reg_3p3v>;
+		VDDD-supply = <&reg_1p5v>;
+	};
 };
 
 &pci0 {
Signature · 1 line
2.7.4
author
#38 lore raw

PATCH 38/62 ARM: dts: iwg20d-q7-common: Sound PIO support

In reply to Biju Das

Enable sound PIO support on carrier board.

(cherry picked from commit cfa2e2f7cf22d0523a88c6284606baa9b2698866)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 46 +++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +46 -0
index 8d69a67..01f60ce 100644
@@ -34,6 +34,22 @@
 		regulator-always-on;
 	};
 
+	rsnd_sgtl5000: sound {
+		compatible = "simple-audio-card";
+
+		simple-audio-card,format = "i2s";
+		simple-audio-card,bitclock-master = <&sndcodec>;
+		simple-audio-card,frame-master = <&sndcodec>;
+
+		sndcpu: simple-audio-card,cpu {
+			sound-dai = <&rcar_sound>;
+		};
+
+		sndcodec: simple-audio-card,codec {
+			sound-dai = <&sgtl5000>;
+		};
+	};
+
 	vcc_sdhi1: regulator-vcc-sdhi1 {
 		compatible = "regulator-fixed";
 
@@ -160,6 +176,11 @@
 		power-source = <3300>;
 	};
 
+	sound_pins: sound {
+		groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+		function = "ssi";
+	};
+
 	usb0_pins: usb0 {
 		groups = "usb0";
 		function = "usb0";
@@ -171,6 +192,22 @@
 	};
 };
 
+&rcar_sound {
+	pinctrl-0 = <&sound_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	/* Single DAI */
+	#sound-dai-cells = <0>;
+
+	rcar_sound,dai {
+		dai0 {
+			playback = <&ssi1>;
+			capture = <&ssi0>;
+		};
+	};
+};
+
 &scif0 {
 	pinctrl-0 = <&scif0_pins>;
 	pinctrl-names = "default";
@@ -197,6 +234,15 @@
 	status = "okay";
 };
 
+&ssi0 {
+	pio-transfer;
+};
+
+&ssi1 {
+	pio-transfer;
+	shared-pin;
+};
+
 &usbphy {
 	status = "okay";
 };
Signature · 1 line
2.7.4
author
#39 lore raw

PATCH 39/62 ARM: dts: iwg20d-q7-common: Sound DMA support on DTS

In reply to Biju Das

DMA transfer to/from SSI

DMA
[MEM] -> [SSI]

DMA
[MEM] <- [SSI]

(cherry picked from commit eeecf0b2a04e118c6404da7fbca3c8f82b0302a3)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +2 -2
index 01f60ce..0c16f4c 100644
@@ -235,11 +235,11 @@
 };
 
 &ssi0 {
-	pio-transfer;
+	no-busif;
 };
 
 &ssi1 {
-	pio-transfer;
+	no-busif;
 	shared-pin;
 };
 
Signature · 1 line
2.7.4
author
#40 lore raw

PATCH 40/62 ARM: dts: iwg20d-q7-common: Sound DMA support via BUSIF on DTS

In reply to Biju Das

DMA transfer to/from SSIU

DMA
[MEM] -> [SSIU] -> [SSI]

DMA
[MEM] <- [SSIU] <- [SSI]

(cherry picked from commit 354cce5a1c8700afa8cff8f85c93c84feb342815)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 5 -----
 1 file changed, 5 deletions(-)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +0 -5
index 0c16f4c..6c16f99 100644
@@ -234,12 +234,7 @@
 	status = "okay";
 };
 
-&ssi0 {
-	no-busif;
-};
-
 &ssi1 {
-	no-busif;
 	shared-pin;
 };
 
Signature · 1 line
2.7.4
author
#41 lore raw

PATCH 41/62 ARM: dts: iwg20d-q7-common: Sound DMA support via SRC on DTS

In reply to Biju Das

DMA transfer to/from SRC

DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]

DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]

Current sound driver is supporting SSI/SRC random connection. So, this patch is trying
SSI1 -> SRC3
SSI0 <- SRC2

(cherry picked from commit b4b2094511166d904e6f15df8eff9d2776bf138c)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +2 -2
index 6c16f99..937c6fe 100644
@@ -202,8 +202,8 @@
 
 	rcar_sound,dai {
 		dai0 {
-			playback = <&ssi1>;
-			capture = <&ssi0>;
+			playback = <&ssi1 &src3>;
+			capture = <&ssi0 &src2>;
 		};
 	};
 };
Signature · 1 line
2.7.4
author
#42 lore raw

PATCH 42/62 ARM: dts: iwg20d-q7-common: Sound DMA support via DVC on DTS

In reply to Biju Das

DMA transfer uses DVC

DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]

DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]

(cherry picked from commit 0ed33948cb43193ba3dbdff8e521f84326669405)
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)
arch/arm/boot/dts/iwg20d-q7-common.dtsi +25 -2
index 937c6fe..6920e3f 100644
@@ -8,6 +8,29 @@
  * kind, whether express or implied.
  */
 
+/*
+ * SSI-SGTL5000
+ *
+ * This command is required when Playback/Capture
+ *
+ *      amixer set "DVC Out" 100%
+ *      amixer set "DVC In" 100%
+ *
+ * You can use Mute
+ *
+ *      amixer set "DVC Out Mute" on
+ *      amixer set "DVC In Mute" on
+ *
+ * You can use Volume Ramp
+ *
+ *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
+ *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
+ *      amixer set "DVC Out Ramp" on
+ *      aplay xxx.wav &
+ *      amixer set "DVC Out"  80%  // Volume Down
+ *      amixer set "DVC Out" 100%  // Volume Up
+ */
+
 / {
 	aliases {
 		serial0 = &scif0;
@@ -202,8 +225,8 @@
 
 	rcar_sound,dai {
 		dai0 {
-			playback = <&ssi1 &src3>;
-			capture = <&ssi0 &src2>;
+			playback = <&ssi1 &src3 &dvc1>;
+			capture = <&ssi0 &src2 &dvc0>;
 		};
 	};
 };
Signature · 1 line
2.7.4
author
#43 lore raw

PATCH 43/62 pinctrl: sh-pfc: r8a7791: Add tpu groups and function

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

This patch adds tpu groups and function to r8a7743/r8a7791/r8a7793.

(cherry picked from commit 21047d5736918b19a3efe11e8ace856cb1b4b403)
---
 drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 42 ++++++++++++++++++++++++++++++++++--
 1 file changed, 40 insertions(+), 2 deletions(-)
drivers/pinctrl/sh-pfc/pfc-r8a7791.c +40 -2
index 39fc9ad..4f971a9 100644
@@ -4149,6 +4149,32 @@ static const unsigned int ssi9_ctrl_b_mux[] = {
 	SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
 };
 
+/* - TPU -------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+	RCAR_GP_PIN(6, 14),
+};
+static const unsigned int tpu_to0_mux[] = {
+	TPU_TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+	RCAR_GP_PIN(1, 17),
+};
+static const unsigned int tpu_to1_mux[] = {
+	TPU_TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+	RCAR_GP_PIN(1, 18),
+};
+static const unsigned int tpu_to2_mux[] = {
+	TPU_TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+	RCAR_GP_PIN(1, 24),
+};
+static const unsigned int tpu_to3_mux[] = {
+	TPU_TO3_MARK,
+};
+
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
 	RCAR_GP_PIN(7, 23), /* PWEN */
@@ -4435,7 +4461,7 @@ static const unsigned int vin2_clk_mux[] = {
 };
 
 static const struct {
-	struct sh_pfc_pin_group common[342];
+	struct sh_pfc_pin_group common[346];
 	struct sh_pfc_pin_group r8a779x[9];
 } pinmux_groups = {
 	.common = {
@@ -4747,6 +4773,10 @@ static const struct {
 		SH_PFC_PIN_GROUP(ssi9_data_b),
 		SH_PFC_PIN_GROUP(ssi9_ctrl),
 		SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+		SH_PFC_PIN_GROUP(tpu_to0),
+		SH_PFC_PIN_GROUP(tpu_to1),
+		SH_PFC_PIN_GROUP(tpu_to2),
+		SH_PFC_PIN_GROUP(tpu_to3),
 		SH_PFC_PIN_GROUP(usb0),
 		SH_PFC_PIN_GROUP(usb1),
 		VIN_DATA_PIN_GROUP(vin0_data, 24),
@@ -5282,6 +5312,13 @@ static const char * const ssi_groups[] = {
 	"ssi9_ctrl_b",
 };
 
+static const char * const tpu_groups[] = {
+	"tpu_to0",
+	"tpu_to1",
+	"tpu_to2",
+	"tpu_to3",
+};
+
 static const char * const usb0_groups[] = {
 	"usb0",
 };
@@ -5331,7 +5368,7 @@ static const char * const vin2_groups[] = {
 };
 
 static const struct {
-	struct sh_pfc_function common[57];
+	struct sh_pfc_function common[58];
 	struct sh_pfc_function r8a779x[2];
 } pinmux_functions = {
 	.common = {
@@ -5387,6 +5424,7 @@ static const struct {
 		SH_PFC_FUNCTION(sdhi1),
 		SH_PFC_FUNCTION(sdhi2),
 		SH_PFC_FUNCTION(ssi),
+		SH_PFC_FUNCTION(tpu),
 		SH_PFC_FUNCTION(usb0),
 		SH_PFC_FUNCTION(usb1),
 		SH_PFC_FUNCTION(vin0),
Signature · 1 line
2.7.4
author
#44 lore raw

PATCH 44/62 dt-bindings: pwm: renesas-tpu: Document r8a774[35] support

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Document r8a774[35] specific compatible strings. No driver change is needed as the fallback compatible string "renesas,tpu" activates the right code in the driver.

---
 Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt +3 -1
index b067e84..90e0a0a 100644
@@ -5,9 +5,11 @@ Required Properties:
   - compatible: should be one of the following.
     - "renesas,tpu-r8a73a4": for R8A77A4 (R-Mobile APE6) compatible PWM controller.
     - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.
+    - "renesas,tpu-r8a7743": for R8A7743 (RZ/G1M) compatible PWM controller.
+    - "renesas,tpu-r8a7745": for R8A7745 (RZ/G1E) compatible PWM controller.
     - "renesas,tpu-r8a7790": for R8A7790 (R-Car H2) compatible PWM controller.
     - "renesas,tpu-sh7372": for SH7372 (SH-Mobile AP4) compatible PWM controller.
-    - "renesas,tpu": for generic R-Car TPU PWM controller.
+    - "renesas,tpu": for generic R-Car and RZ/G1 TPU PWM controller.
 
   - reg: Base address and length of each memory resource used by the PWM
     controller hardware module.
Signature · 1 line
2.7.4
author
#45 lore raw

PATCH 45/62 ARM: dts: r8a7743: Add TPU support

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Add TPU support to SoC DT.

(cherry picked from commit ba8f6bda525121e310cec7532bf218d0bace4ff1)

(updated clock and power-domains property. removed resets property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +9 -0
index 73c658b..c0e53ee 100644
@@ -254,6 +254,15 @@
 			reg = <0 0xe6060000 0 0x250>;
 		};
 
+		tpu: pwm at e60f0000 {
+			compatible = "renesas,tpu-r8a7743", "renesas,tpu";
+			reg = <0 0xe60f0000 0 0x148>;
+			clocks = <&mstp3_clks R8A7743_CLK_TPU0>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		dmac0: dma-controller at e6700000 {
 			compatible = "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x20000>;
Signature · 1 line
2.7.4
author
#46 lore raw

PATCH 46/62 ARM: multi_v7_defconfig: Select PWM_RCAR as module

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Enable PWM support for R-Car and friends by default.

(cherry picked from commit 7c57fbcf1455e6823ac6ce44ab45cc351bd79b42)
---
 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/multi_v7_defconfig +1 -0
index ba520f6..47f98eb 100644
@@ -687,6 +687,7 @@ CONFIG_AK8975=y
 CONFIG_PWM=y
 CONFIG_PWM_ATMEL=m
 CONFIG_PWM_ATMEL_TCB=m
+CONFIG_PWM_RCAR=m
 CONFIG_PWM_RENESAS_TPU=y
 CONFIG_PWM_ROCKCHIP=m
 CONFIG_PWM_SAMSUNG=m
Signature · 1 line
2.7.4
author
#47 lore raw

PATCH 47/62 ARM: shmobile: defconfig: Enable PWM

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

RZ/G1 and R-Car platforms have PWM timers. This patch enables PWM support by default.

(cherry picked from commit 1943cbd3b39ee3310494d5b531a906e836bb9f7f)
---
 arch/arm/configs/shmobile_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/shmobile_defconfig +1 -0
index 8b559ca..31d7ccc 100644
@@ -193,6 +193,7 @@ CONFIG_RCAR_DMAC=y
 CONFIG_IIO=y
 CONFIG_AK8975=y
 CONFIG_PWM=y
+CONFIG_PWM_RCAR=y
 CONFIG_PWM_RENESAS_TPU=y
 CONFIG_GENERIC_PHY=y
 CONFIG_PHY_RCAR_GEN2=y
Signature · 1 line
2.7.4
author
#48 lore raw

PATCH 48/62 pwm: rcar: Improve accuracy of frequency division setting

In reply to Biju Das

From: Ryo Kodama <[email protected]>

When period_ns is set to the same value of RCAR_PWM_MAX_CYCLE in rcar_pwm_get_clock_division(), this function should allow such value for improving accuracy of frequency division setting.

(cherry picked from commit 72c16a9f98afad073b4a9c947c1c89bfb886ffcb)
---
 drivers/pwm/pwm-rcar.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-rcar.c +1 -1
index 6e99a63..7b8ac06 100644
@@ -81,7 +81,7 @@ static int rcar_pwm_get_clock_division(struct rcar_pwm_chip *rp, int period_ns)
 		max = (unsigned long long)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE *
 			(1 << div);
 		do_div(max, clk_rate);
-		if (period_ns < max)
+		if (period_ns <= max)
 			break;
 	}
 
Signature · 1 line
2.7.4
author
#49 lore raw

PATCH 49/62 pwm: rcar: Make use of pwm_is_enabled()

In reply to Biju Das

From: Boris BREZILLON <[email protected]>

Commit 5c31252c4a86 ("pwm: Add the pwm_is_enabled() helper") introduced a new function to test whether a PWM device is enabled or not without manipulating PWM internal fields.

Hiding this is necessary if we want to smoothly move to the atomic PWM config approach without impacting PWM drivers. Fix this driver to use pwm_is_enabled() instead of directly accessing the ->flags field.

(cherry picked from commit 3587c260906259632df07652743269627f408d85)
---
 drivers/pwm/pwm-rcar.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-rcar.c +1 -1
index 7b8ac06..1c85ecc 100644
@@ -157,7 +157,7 @@ static int rcar_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 		return div;
 
 	/* Let the core driver set pwm->period if disabled and duty_ns == 0 */
-	if (!test_bit(PWMF_ENABLED, &pwm->flags) && !duty_ns)
+	if (!pwm_is_enabled(pwm) && !duty_ns)
 		return 0;
 
 	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, RCAR_PWMCR_SYNC, RCAR_PWMCR);
Signature · 1 line
2.7.4
author
#50 lore raw

PATCH 50/62 pwm: rcar: Use PM Runtime to control module clock

In reply to Biju Das

From: Hien Dang <[email protected]>

Runtime PM API (pm_runtime_get_sync/pm_runtime_put) should be used to control module clock instead of clk_prepare_enable and clk_disable_unprepare.

(cherry picked from commit f2e6142cdc10b1b7edea8d65b07293f152e4d110)
---
 drivers/pwm/pwm-rcar.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)
drivers/pwm/pwm-rcar.c +2 -6
index 1c85ecc..b942010 100644
@@ -134,16 +134,12 @@ static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns,
 
 static int rcar_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
 {
-	struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);
-
-	return clk_prepare_enable(rp->clk);
+	return pm_runtime_get_sync(chip->dev);
 }
 
 static void rcar_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
 {
-	struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);
-
-	clk_disable_unprepare(rp->clk);
+	pm_runtime_put(chip->dev);
 }
 
 static int rcar_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
Signature · 1 line
2.7.4
author
#51 lore raw

PATCH 51/62 dt-bindings: pwm: rcar: Document r8a774[35] PWM bindings

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

This patch adds compatible strings specific to r8a774[35], no driver change is needed as the fallback compatible string will activate the right code.

Also, this patch replaces the example with a DT snippet used for adding PWM0 support to an r8a7743 based platform as the r8a7743 is now the first platform fully compatible with this driver and its PWM DT nodes refer to up-to-date code.

(cherry picked from commit 9d7e72858d9d84abbbb49e98e2dafeee2f7fd9b6)

(removed r8a7743 example,since it is based on cpg-mssr framework)

---
 Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt +2 -0
index 0822a08..4493fc5 100644
@@ -2,6 +2,8 @@
 
 Required Properties:
 - compatible: should be "renesas,pwm-rcar" and one of the following.
+ - "renesas,pwm-r8a7743": for RZ/G1M
+ - "renesas,pwm-r8a7745": for RZ/G1E
  - "renesas,pwm-r8a7778": for R-Car M1A
  - "renesas,pwm-r8a7779": for R-Car H1
  - "renesas,pwm-r8a7790": for R-Car H2
Signature · 1 line
2.7.4
author
#52 lore raw

PATCH 52/62 ARM: dts: r8a7743: Add PWM SoC support

In reply to Biju Das

From: Fabrizio Castro <[email protected]>

Add the definitions for pwm[0123456] to the SoC .dtsi.

(cherry picked from commit ea16b5896267a2358fc17cf5340b27b906513119)

(updated clocks and power-domains property.removed resets property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 63 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +63 -0
index c0e53ee..17be22c 100644
@@ -917,6 +917,69 @@
 			status = "disabled";
 		};
 
+		pwm0: pwm at e6e30000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e30000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm1: pwm at e6e31000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e31000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm2: pwm at e6e32000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e32000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm3: pwm at e6e33000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e33000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm4: pwm at e6e34000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e34000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm5: pwm at e6e35000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e35000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm6: pwm at e6e36000 {
+			compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
+			reg = <0 0xe6e36000 0 0x8>;
+			clocks = <&mstp5_clks R8A7743_CLK_PWM>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
 		/*
 		 * pci1 and xhci share the same phy, therefore only one of them
 		 * can be active at any one time. If both of them are enabled,
Signature · 1 line
2.7.4
author
#53 lore raw

PATCH 53/62 thermal: rcar: move rcar_thermal_dt_ids to upside

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

This patch is prepare for of-thermal support.

(cherry picked from commit ca1e4558fcca68a5ac2a4e0f7834f788f9f4ac8f)
---
 drivers/thermal/rcar_thermal.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
drivers/thermal/rcar_thermal.c +6 -6
index 13d01ed..96707a6 100644
@@ -81,6 +81,12 @@ struct rcar_thermal_priv {
 # define rcar_force_update_temp(priv)	0
 #endif
 
+static const struct of_device_id rcar_thermal_dt_ids[] = {
+	{ .compatible = "renesas,rcar-thermal", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, rcar_thermal_dt_ids);
+
 /*
  *		basic functions
  */
@@ -484,12 +490,6 @@ error_unregister:
 	return ret;
 }
 
-static const struct of_device_id rcar_thermal_dt_ids[] = {
-	{ .compatible = "renesas,rcar-thermal", },
-	{},
-};
-MODULE_DEVICE_TABLE(of, rcar_thermal_dt_ids);
-
 static struct platform_driver rcar_thermal_driver = {
 	.driver	= {
 		.name	= "rcar_thermal",
Signature · 1 line
2.7.4
author
#54 lore raw

PATCH 54/62 thermal: rcar: check every rcar_thermal_update_temp() return value

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

Every rcar_thermal_update_temp() return value will be checked.

And also, rcar_thermal_get_temp() always call
rcar_thermal_update_temp() by this patch.

(cherry picked from commit a1ade5653804b8eb9d14c5ba964da6d5c2f4cd30)
---
 drivers/thermal/rcar_thermal.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)
drivers/thermal/rcar_thermal.c +12 -10
index 96707a6..b012d90 100644
@@ -75,12 +75,6 @@ struct rcar_thermal_priv {
 #define rcar_has_irq_support(priv)	((priv)->common->base)
 #define rcar_id_to_shift(priv)		((priv)->id * 8)
 
-#ifdef DEBUG
-# define rcar_force_update_temp(priv)	1
-#else
-# define rcar_force_update_temp(priv)	0
-#endif
-
 static const struct of_device_id rcar_thermal_dt_ids[] = {
 	{ .compatible = "renesas,rcar-thermal", },
 	{},
@@ -209,9 +203,11 @@ err_out_unlock:
 static int rcar_thermal_get_temp(struct thermal_zone_device *zone, int *temp)
 {
 	struct rcar_thermal_priv *priv = rcar_zone_to_priv(zone);
+	int ret;
 
-	if (!rcar_has_irq_support(priv) || rcar_force_update_temp(priv))
-		rcar_thermal_update_temp(priv);
+	ret = rcar_thermal_update_temp(priv);
+	if (ret < 0)
+		return ret;
 
 	mutex_lock(&priv->lock);
 	*temp =  MCELSIUS((priv->ctemp * 5) - 65);
@@ -305,11 +301,15 @@ static void rcar_thermal_work(struct work_struct *work)
 {
 	struct rcar_thermal_priv *priv;
 	int cctemp, nctemp;
+	int ret;
 
 	priv = container_of(work, struct rcar_thermal_priv, work.work);
 
 	rcar_thermal_get_temp(priv->zone, &cctemp);
-	rcar_thermal_update_temp(priv);
+	ret = rcar_thermal_update_temp(priv);
+	if (ret < 0)
+		return;
+
 	rcar_thermal_irq_enable(priv);
 
 	rcar_thermal_get_temp(priv->zone, &nctemp);
@@ -447,7 +447,9 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 		mutex_init(&priv->lock);
 		INIT_LIST_HEAD(&priv->list);
 		INIT_DELAYED_WORK(&priv->work, rcar_thermal_work);
-		rcar_thermal_update_temp(priv);
+		ret = rcar_thermal_update_temp(priv);
+		if (ret < 0)
+			goto error_unregister;
 
 		priv->zone = thermal_zone_device_register("rcar_thermal",
 						1, 0, priv,
Signature · 1 line
2.7.4
author
#55 lore raw

PATCH 55/62 thermal: rcar: check irq possibility in rcar_thermal_irq_xxx()

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

Current rcar thermal driver sometimes checks irq possibility when it calls rcar_thermal_irq_enable/disable(), but sometimes not. This patch checks it inside rcar_thermal_irq_enable/disable().

(cherry picked from commit ffbcdf8a759c6dde71c6c4f646a552f7637bcca7)
---
 drivers/thermal/rcar_thermal.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)
drivers/thermal/rcar_thermal.c +5 -4
index b012d90..fb81fd7 100644
@@ -290,6 +290,9 @@ static void _rcar_thermal_irq_ctrl(struct rcar_thermal_priv *priv, int enable)
 	unsigned long flags;
 	u32 mask = 0x3 << rcar_id_to_shift(priv); /* enable Rising/Falling */
 
+	if (!rcar_has_irq_support(priv))
+		return;
+
 	spin_lock_irqsave(&common->lock, flags);
 
 	rcar_thermal_common_bset(common, INTMSK, mask, enable ? 0 : mask);
@@ -374,8 +377,7 @@ static int rcar_thermal_remove(struct platform_device *pdev)
 	struct rcar_thermal_priv *priv;
 
 	rcar_thermal_for_each_priv(priv, common) {
-		if (rcar_has_irq_support(priv))
-			rcar_thermal_irq_disable(priv);
+		rcar_thermal_irq_disable(priv);
 		thermal_zone_device_unregister(priv->zone);
 	}
 
@@ -461,8 +463,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 			goto error_unregister;
 		}
 
-		if (rcar_has_irq_support(priv))
-			rcar_thermal_irq_enable(priv);
+		rcar_thermal_irq_enable(priv);
 
 		list_move_tail(&priv->list, &common->head);
 
Signature · 1 line
2.7.4
author
#56 lore raw

PATCH 56/62 thermal: rcar: rcar_thermal_get_temp() return error if strange temp

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

(cherry picked from commit 5440c40b900fa561add48a7e70e9c892f0551387)
---
 drivers/thermal/rcar_thermal.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
drivers/thermal/rcar_thermal.c +11 -1
index fb81fd7..44b9c48 100644
@@ -203,6 +203,7 @@ err_out_unlock:
 static int rcar_thermal_get_temp(struct thermal_zone_device *zone, int *temp)
 {
 	struct rcar_thermal_priv *priv = rcar_zone_to_priv(zone);
+	int tmp;
 	int ret;
 
 	ret = rcar_thermal_update_temp(priv);
@@ -210,9 +211,18 @@ static int rcar_thermal_get_temp(struct thermal_zone_device *zone, int *temp)
 		return ret;
 
 	mutex_lock(&priv->lock);
-	*temp =  MCELSIUS((priv->ctemp * 5) - 65);
+	tmp =  MCELSIUS((priv->ctemp * 5) - 65);
 	mutex_unlock(&priv->lock);
 
+	if ((tmp < MCELSIUS(-45)) || (tmp > MCELSIUS(125))) {
+		struct device *dev = rcar_priv_to_dev(priv);
+
+		dev_err(dev, "it couldn't measure temperature correctly\n");
+		return -EIO;
+	}
+
+	*temp = tmp;
+
 	return 0;
 }
 
Signature · 1 line
2.7.4
author
#57 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

This patch enables to use thermal-zone on DT if it was calles as "renesas,rcar-thermal-gen2".
Previous style (= non thermal-zone) is still supported by "renesas,rcar-thermal" to keep compatibility for "git bisect".

(cherry picked from commit 8b477ea56383dc8b838f1f8b506e4571c14ceb30)
---
 .../devicetree/bindings/thermal/rcar-thermal.txt   | 37 +++++++++++++++++-
 drivers/thermal/rcar_thermal.c                     | 45 +++++++++++++++++++---
 2 files changed, 75 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/thermal/rcar-thermal.txt +35 -2
index 332e625..e5ee3f1 100644
@@ -1,8 +1,9 @@
 * Renesas R-Car Thermal
 
 Required properties:
-- compatible		: "renesas,thermal-<soctype>", "renesas,rcar-thermal"
-			  as fallback.
+- compatible		: "renesas,thermal-<soctype>",
+			   "renesas,rcar-gen2-thermal" (with thermal-zone) or
+			   "renesas,rcar-thermal" (without thermal-zone) as fallback.
 			  Examples with soctypes are:
 			    - "renesas,thermal-r8a73a4" (R-Mobile APE6)
 			    - "renesas,thermal-r8a7779" (R-Car H1)
@@ -36,3 +37,35 @@ thermal at e61f0000 {
 		0xe61f0300 0x38>;
 	interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
 };
+
+Example (with thermal-zone):
+
+thermal-zones {
+	cpu_thermal: cpu-thermal {
+		polling-delay-passive	= <1000>;
+		polling-delay		= <5000>;
+
+		thermal-sensors = <&thermal>;
+
+		trips {
+			cpu-crit {
+				temperature	= <115000>;
+				hysteresis	= <0>;
+				type		= "critical";
+			};
+		};
+		cooling-maps {
+		};
+	};
+};
+
+thermal: thermal at e61f0000 {
+	compatible =	"renesas,thermal-r8a7790",
+			"renesas,rcar-gen2-thermal",
+			"renesas,rcar-thermal";
+	reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+	interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
+	power-domains = <&cpg_clocks>;
+	#thermal-sensor-cells = <0>;
+};
drivers/thermal/rcar_thermal.c +40 -5

102 lines not on this page · raw message

Signature · 1 line
2.7.4
#58 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

Quoted 12 lines · Biju Das

From: Kuninori Morimoto <[email protected]>

This patch enables to use thermal-zone on DT if it was calles as "renesas,rcar-thermal-gen2".
Previous style (= non thermal-zone) is still supported by "renesas,rcar-thermal" to keep compatibility for "git bisect".

(cherry picked from commit 8b477ea56383dc8b838f1f8b506e4571c14ceb30)

[...]

Quoted 2 lines
drivers/thermal/rcar_thermal.c +0 -0

[...]

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct platform_device *pdev) · line 498

Quoted 9 lines
drivers/thermal/rcar_thermal.c +0 -0
@@ -463,7 +492,13 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 ?		if (ret < 0)
 ?			goto error_unregister;

?

drivers/thermal/rcar_thermal.c +4 -1
-		priv->zone = thermal_zone_device_register("rcar_thermal",
+		if (of_data == USE_OF_THERMAL)
+			priv->zone = thermal_zone_of_sensor_register(
+						dev, i, priv,
+						&rcar_thermal_zone_of_ops);

Doesn't this require a corresponding change to use thermal_zone_of_sensor_unregister()?

It looks like this was fixed upstream by commits 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") and d4b23c5c434a ("thermal:
rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL").

Ben.

Quoted 6 lines
drivers/thermal/rcar_thermal.c +3 -0
+		else
+			priv->zone = thermal_zone_device_register(
+						"rcar_thermal",

? 1, 0, priv,
? &rcar_thermal_zone_ops, NULL, 0,
? idle);

Signature · 2 lines
Ben Hutchings
Software Developer, Codethink Ltd.
#59 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

Hello Ben,

Quoted 28 lines

-----Original Message-----
From: Ben Hutchings [mailto:ben.hutchings at codethink.co.uk]
Sent: 11 May 2018 20:12
To: Biju Das <[email protected]>
Cc: Chris Paterson <[email protected]>; Fabrizio Castro <[email protected]>; cip-dev at lists.cip-project.org
Subject: Re: [PATCH 57/62] thermal: rcar: enable to use thermal-zone on DT

Quoted 12 lines · Biju Das

From: Kuninori Morimoto <[email protected]>

This patch enables to use thermal-zone on DT if it was calles as "renesas,rcar-thermal-gen2".
Previous style (= non thermal-zone) is still supported by "renesas,rcar-thermal" to keep compatibility for "git bisect".

(cherry picked from commit 8b477ea56383dc8b838f1f8b506e4571c14ceb30)

[...]

Quoted 2 lines
drivers/thermal/rcar_thermal.c +0 -0

[...]

Quoted 4 lines
drivers/thermal/rcar_thermal.c +0 -0
@@ -463,7 +492,13 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 if (ret < 0)
 goto error_unregister;
 
Quoted 8 lines

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct platform_device *pdev) · line 498

Quoted 5 lines
drivers/thermal/rcar_thermal.c +4 -1
-priv->zone = thermal_zone_device_register("rcar_thermal",
+if (of_data == USE_OF_THERMAL)
+priv->zone = thermal_zone_of_sensor_register(
+dev, i, priv,
+&rcar_thermal_zone_of_ops);

Doesn't this require a corresponding change to use thermal_zone_of_sensor_unregister()?

That's a good catch!

Quoted 6 lines

It looks like this was fixed upstream by commits 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") and d4b23c5c434a ("thermal:
rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL").

Thank you for the pointers, we will into them and we will send a v2.

Thank you for your help!

Cheers,
Fab

Quoted 12 lines

Ben.

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct platform_device *pdev) · line 504

Quoted 6 lines
drivers/thermal/rcar_thermal.c +3 -0
+else
+priv->zone = thermal_zone_device_register(
+"rcar_thermal",
 1, 0, priv,
 &rcar_thermal_zone_ops, NULL, 0,
 idle);

--
Ben Hutchings
Software Developer, Codethink Ltd.

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

author
#60 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

In reply to Ben Hutchings

Hi Ben,

Thanks for the feedback.

Quoted 31 lines

Subject: Re: [PATCH 57/62] thermal: rcar: enable to use thermal-zone on DT

Quoted 12 lines · Biju Das

From: Kuninori Morimoto <[email protected]>

This patch enables to use thermal-zone on DT if it was calles as "renesas,rcar-thermal-gen2".
Previous style (= non thermal-zone) is still supported by "renesas,rcar-thermal" to keep compatibility for "git bisect".

from commit 8b477ea56383dc8b838f1f8b506e4571c14ceb30)

[...]

Quoted 2 lines
drivers/thermal/rcar_thermal.c +0 -0

[...]

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct

Quoted 1 line
drivers/thermal/rcar_thermal.c +0 -0
@@ -463,7 +492,13 @@ static int rcar_thermal_probe(struct

platform_device *pdev)

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct platform_device *pdev)

Quoted 8 lines
drivers/thermal/rcar_thermal.c +4 -1
 if (ret < 0)
 goto error_unregister;
 
-priv->zone = thermal_zone_device_register("rcar_thermal",
+if (of_data == USE_OF_THERMAL)
+priv->zone = thermal_zone_of_sensor_register(
+dev, i, priv,
+

&rcar_thermal_zone_of_ops);

Quoted 2 lines

Doesn't this require a corresponding change to use thermal_zone_of_sensor_unregister()?

As per the commit(d4b23c5c434a) message "devm_thermal_zone_of_sensor_register() case doesn't need to call thermal_zone_device_unregister()"

We are not using devm version of thermal_zone_of_sensor_register, so I guess the below commit is not required. d4b23c5c434a ("thermal: rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL")

Quoted 5 lines

It looks like this was fixed upstream by commits 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") and d4b23c5c434a ("thermal:
rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL").

The commit 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") depend upon the commit e498b4984 ("thermal: of-thermal: Add devm version of thermal_zone_of_sensor_register") which is outside the scope of renesas thermal driver.

Are you ok for backporting the above patch? If yes, then it make sense to backport the commits 5e325868aa59 and d4b23c5c434a.

Regards,
Biju

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

#61 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

Quoted 39 lines · Biju Das

Hi Ben,

Thanks for the feedback.

Quoted 35 lines

Subject: Re: [PATCH 57/62] thermal: rcar: enable to use thermal-zone on DT

Quoted 12 lines · Biju Das

From: Kuninori Morimoto <[email protected]>

This patch enables to use thermal-zone on DT if it was calles as "renesas,rcar-thermal-gen2".
Previous style (= non thermal-zone) is still supported by "renesas,rcar-thermal" to keep compatibility for "git bisect".

from commit 8b477ea56383dc8b838f1f8b506e4571c14ceb30)

[...]

Quoted 2 lines
drivers/thermal/rcar_thermal.c +0 -0

[...]

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct

Quoted 1 line
drivers/thermal/rcar_thermal.c +0 -0
@@ -463,7 +492,13 @@ static int rcar_thermal_probe(struct

platform_device *pdev)

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct platform_device *pdev)

Quoted 8 lines
drivers/thermal/rcar_thermal.c +4 -1
 ?if (ret < 0)
 ?goto error_unregister;
 
-priv->zone = thermal_zone_device_register("rcar_thermal",
+if (of_data == USE_OF_THERMAL)
+priv->zone = thermal_zone_of_sensor_register(
+dev, i, priv,
+

&rcar_thermal_zone_of_ops);

Quoted 7 lines
Quoted 2 lines

Doesn't this require a corresponding change to use thermal_zone_of_sensor_unregister()?

As per??the commit(d4b23c5c434a) message "devm_thermal_zone_of_sensor_register() case doesn't need to call???thermal_zone_device_unregister()"

We are not using devm version of thermal_zone_of_sensor_register, so??I guess the below commit is not required. d4b23c5c434a ("thermal: rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL")

Even so, it is wrong to use thermal_zone_of_sensor_register() and then thermal_zone_device_unregister().

Quoted 11 lines
Quoted 5 lines

It looks like this was fixed upstream by commits 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") and d4b23c5c434a ("thermal:
rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL").

The commit 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") depend upon the commit e498b4984 ("thermal: of-thermal: Add devm version of??thermal_zone_of_sensor_register") which is outside the scope of renesas thermal driver.

?Are you ok for backporting the above patch? If yes, then it make sense to backport the commits 5e325868aa59 and d4b23c5c434a.

Yes, I think this is OK. Commit?e498b4984 doesn't change any existing functions so it should be safe to add.

Ben.

Signature · 4 lines
Ben Hutchings, Software Developer                ?        Codethink Ltd
https://www.codethink.co.uk/                 Dale House, 35 Dale Street
                                     Manchester, M1 2HF, United Kingdom
We respect your privacy.?? See https://www.codethink.co.uk/privacy.html
author
#62 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

Hi Ben,

Thanks for the feedback.

Quoted 75 lines

-----Original Message-----
From: Ben Hutchings [mailto:ben.hutchings at codethink.co.uk]
Sent: 30 May 2018 16:29
To: Biju Das <[email protected]>
Cc: Chris Paterson <[email protected]>; Fabrizio Castro <[email protected]>; cip-dev at lists.cip-project.org
Subject: Re: [PATCH 57/62] thermal: rcar: enable to use thermal-zone on DT

Quoted 41 lines · Biju Das

Hi Ben,

Thanks for the feedback.

Quoted 37 lines

Subject: Re: [PATCH 57/62] thermal: rcar: enable to use thermal-zone on DT

Quoted 13 lines · Biju Das

From: Kuninori Morimoto <[email protected]>

This patch enables to use thermal-zone on DT if it was calles as "renesas,rcar-thermal-gen2".
Previous style (= non thermal-zone) is still supported by "renesas,rcar-thermal" to keep compatibility for "git bisect".

Signed-off-by: Kuninori Morimoto
<[email protected]>

picked from commit 8b477ea56383dc8b838f1f8b506e4571c14ceb30)

[...]

Quoted 2 lines
drivers/thermal/rcar_thermal.c +0 -0

[...]

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct

Quoted 1 line
drivers/thermal/rcar_thermal.c +0 -0
@@ -463,7 +492,13 @@ static int rcar_thermal_probe(struct

platform_device *pdev)

drivers/thermal/rcar_thermal.c static int rcar_thermal_probe(struct platform_device *pdev)

Quoted 8 lines
drivers/thermal/rcar_thermal.c +4 -1
 if (ret < 0)
 goto error_unregister;
 
-priv->zone = thermal_zone_device_register("rcar_thermal",
+if (of_data == USE_OF_THERMAL)
+priv->zone = thermal_zone_of_sensor_register(
+dev, i, priv,
+

&rcar_thermal_zone_of_ops);

Quoted 4 lines
Quoted 2 lines

Doesn't this require a corresponding change to use thermal_zone_of_sensor_unregister()?

As per the commit(d4b23c5c434a) message

"devm_thermal_zone_of_sensor_register() case doesn't need to
call thermal_zone_device_unregister()"

Quoted 2 lines

We are not using devm version of thermal_zone_of_sensor_register, so I

guess the below commit is not required.

Quoted 2 lines

d4b23c5c434a ("thermal: rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL")

Even so, it is wrong to use thermal_zone_of_sensor_register() and then thermal_zone_device_unregister().

Quoted 10 lines
Quoted 5 lines

It looks like this was fixed upstream by commits 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register") and d4b23c5c434a ("thermal:
rcar_thermal: don't call thermal_zone_device_unregister when USE_OF_THERMAL").

The commit 5e325868aa59 ("thermal: convert rcar_thermal to use devm_thermal_zone_of_sensor_register")
depend upon the commit e498b4984 ("thermal: of-thermal: Add devm version of thermal_zone_of_sensor_register") which is outside the scope

Quoted 7 lines

of renesas thermal driver.

Quoted 2 lines

Are you ok for backporting the above patch? If yes, then it make sense to

backport the commits 5e325868aa59 and d4b23c5c434a.

Yes, I think this is OK. Commit e498b4984 doesn't change any existing functions so it should be safe to add.

Shall I send only thermal related patches or do you want me to send V2 with 65 patches? Please let me know.

Regards,
Biju

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

#63 lore raw

PATCH 57/62 thermal: rcar: enable to use thermal-zone on DT

On Wed, 2018-05-30 at 16:34 +0000, Biju Das wrote:
[...]

Quoted 8 lines
Quoted 5 lines
Quoted 2 lines

?Are you ok for backporting the above patch? If yes, then it make sense to backport the commits 5e325868aa59 and d4b23c5c434a.

Yes, I think this is OK.??Commit e498b4984 doesn't change any existing functions so it should be safe to add.

Shall I send only thermal related patches??or do you want me to send V2 with 65 patches? Please let me know.

I saved that patch series, so please just let me know what needs to be added or replaced.

Ben.

Signature · 4 lines
Ben Hutchings, Software Developer                ?        Codethink Ltd
https://www.codethink.co.uk/                 Dale House, 35 Dale Street
                                     Manchester, M1 2HF, United Kingdom
We respect your privacy.?? See https://www.codethink.co.uk/privacy.html
author
#64 lore raw

PATCH 58/62 thermal: rcar_thermal: don't open code of_device_get_match_data()

In reply to Biju Das

From: Wolfram Sang <[email protected]>

This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable.

(cherry picked from commit 67bc3f4226c1d29ee820eff98fcaf8a9283938fe)
---
 drivers/thermal/rcar_thermal.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/thermal/rcar_thermal.c +1 -2
index 0e735ac..82daba0 100644
@@ -430,8 +430,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 	struct rcar_thermal_priv *priv;
 	struct device *dev = &pdev->dev;
 	struct resource *res, *irq;
-	const struct of_device_id *of_id = of_match_device(rcar_thermal_dt_ids, dev);
-	unsigned long of_data = (unsigned long)of_id->data;
+	unsigned long of_data = (unsigned long)of_device_get_match_data(dev);
 	int mres = 0;
 	int i;
 	int ret = -ENODEV;
Signature · 1 line
2.7.4
author
#65 lore raw

PATCH 59/62 thermal: rcar_thermal: Fix priv->zone error handling

In reply to Biju Das

From: Dirk Behme <[email protected]>

In case thermal_zone_xxx_register() returns an error, priv->zone isn't NULL any more, but contains the error code.

This is passed to thermal_zone_device_unregister(), then. This checks for priv->zone being NULL, but the error code is != NULL. So it works with the error code as a pointer. Crashing immediately.

To fix this, reset priv->zone to NULL before entering rcar_gen3_thermal_remove().

(cherry picked from commit 87260d3f7aecba9a5fadc6886c338b2a8fccfca9)
---
 drivers/thermal/rcar_thermal.c | 1 +
 1 file changed, 1 insertion(+)
drivers/thermal/rcar_thermal.c +1 -0
index 82daba0..f0f0743 100644
@@ -504,6 +504,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 		if (IS_ERR(priv->zone)) {
 			dev_err(dev, "can't register thermal zone\n");
 			ret = PTR_ERR(priv->zone);
+			priv->zone = NULL;
 			goto error_unregister;
 		}
 
Signature · 1 line
2.7.4
author
#66 lore raw

PATCH 60/62 thermal: rcar-thermal: enable hwmon when thermal_zone_of_sensor_register is used

In reply to Biju Das

From: Kuninori Morimoto <[email protected]>

rcar-thermal is supporting both thermal_zone_of_sensor_register() and thermal_zone_device_register(). But thermal_zone_of_sensor_register() doesn't enable hwmon as default.
This patch enables it to keep compatibility

(cherry picked from commit 64a411e8042ed00057658000126fd9f2b4105bdd)
---
 drivers/thermal/rcar_thermal.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)
drivers/thermal/rcar_thermal.c +18 -2
index f0f0743..187b3f4 100644
@@ -31,6 +31,8 @@
 #include <linux/spinlock.h>
 #include <linux/thermal.h>
 
+#include "thermal_hwmon.h"
+
 #define IDLE_INTERVAL	5000
 
 #define COMMON_STR	0x00
@@ -75,6 +77,8 @@ struct rcar_thermal_priv {
 #define rcar_priv_to_dev(priv)		((priv)->common->dev)
 #define rcar_has_irq_support(priv)	((priv)->common->base)
 #define rcar_id_to_shift(priv)		((priv)->id * 8)
+#define rcar_of_data(dev)		((unsigned long)of_device_get_match_data(dev))
+#define rcar_use_of_thermal(dev)	(rcar_of_data(dev) == USE_OF_THERMAL)
 
 #define USE_OF_THERMAL	1
 static const struct of_device_id rcar_thermal_dt_ids[] = {
@@ -416,6 +420,8 @@ static int rcar_thermal_remove(struct platform_device *pdev)
 	rcar_thermal_for_each_priv(priv, common) {
 		rcar_thermal_irq_disable(priv);
 		thermal_zone_device_unregister(priv->zone);
+		if (rcar_use_of_thermal(dev))
+			thermal_remove_hwmon_sysfs(priv->zone);
 	}
 
 	pm_runtime_put(dev);
@@ -430,7 +436,6 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 	struct rcar_thermal_priv *priv;
 	struct device *dev = &pdev->dev;
 	struct resource *res, *irq;
-	unsigned long of_data = (unsigned long)of_device_get_match_data(dev);
 	int mres = 0;
 	int i;
 	int ret = -ENODEV;
@@ -491,7 +496,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 		if (ret < 0)
 			goto error_unregister;
 
-		if (of_data == USE_OF_THERMAL)
+		if (rcar_use_of_thermal(dev))
 			priv->zone = thermal_zone_of_sensor_register(
 						dev, i, priv,
 						&rcar_thermal_zone_of_ops);
@@ -508,6 +513,17 @@ static int rcar_thermal_probe(struct platform_device *pdev)
 			goto error_unregister;
 		}
 
+		if (rcar_use_of_thermal(dev)) {
+			/*
+			 * thermal_zone doesn't enable hwmon as default,
+			 * but, enable it here to keep compatible
+			 */
+			priv->zone->tzp->no_hwmon = false;
+			ret = thermal_add_hwmon_sysfs(priv->zone);
+			if (ret)
+				goto error_unregister;
+		}
+
 		rcar_thermal_irq_enable(priv);
 
 		list_move_tail(&priv->list, &common->head);
Signature · 1 line
2.7.4
author
#67 lore raw

PATCH 61/62 dt-bindings: thermal: rcar: Add device tree support for r8a7743

In reply to Biju Das

Add thermal sensor support for r8a7743 SoC. The Renesas RZ/G1M (r8a7743) thermal sensor module is identical to the R-Car Gen2 family.

No driver change is needed due to the fallback compatible value "renesas,rcar-gen2-thermal".

---
 Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/thermal/rcar-thermal.txt +1 -0
index e5ee3f1..689e7e8 100644
@@ -6,6 +6,7 @@ Required properties:
 			   "renesas,rcar-thermal" (without thermal-zone) as fallback.
 			  Examples with soctypes are:
 			    - "renesas,thermal-r8a73a4" (R-Mobile APE6)
+			    - "renesas,thermal-r8a7743" (RZ/G1M)
 			    - "renesas,thermal-r8a7779" (R-Car H1)
 			    - "renesas,thermal-r8a7790" (R-Car H2)
 			    - "renesas,thermal-r8a7791" (R-Car M2-W)
Signature · 1 line
2.7.4
author
#68 lore raw

PATCH 62/62 ARM: dts: r8a7743: Add thermal device to DT

In reply to Biju Das

This patch instantiates the thermal sensor module with thermal-zone support.

This patch is based on the commit cac68a56e34b
("ARM: dts: r8a7791: enable to use thermal-zone") by Kuninori Morimoto.

(cherry picked from commit 6c76b4f7d89e89f0ae405dfc7a64c6d2b5d02813)

(updated clocks and power-domains property.removed resets property)

---
 arch/arm/boot/dts/r8a7743.dtsi | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +31 -0
index 17be22c..1d9adcc 100644
@@ -237,6 +237,37 @@
 			power-domains = <&cpg_clocks>;
 		};
 
+		thermal: thermal at e61f0000 {
+			compatible = "renesas,thermal-r8a7743",
+				     "renesas,rcar-gen2-thermal",
+				     "renesas,rcar-thermal";
+			reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
+			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp5_clks R8A7743_CLK_THERMAL>;
+			power-domains = <&cpg_clocks>;
+			#thermal-sensor-cells = <0>;
+		};
+
+		thermal-zones {
+			cpu_thermal: cpu-thermal {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+
+				thermal-sensors = <&thermal>;
+
+				trips {
+					cpu-crit {
+						temperature = <95000>;
+						hysteresis = <0>;
+						type = "critical";
+					};
+				};
+
+				cooling-maps {
+				};
+			};
+		};
+
 		timer {
 			compatible = "arm,armv7-timer";
 			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
Signature · 1 line
2.7.4