ARM: dts: tegra: Remove skeleton.dtsi and fix DTC warnings for /memory

Remove unneeded address/size cells properties and unit addresses to fix DTC warnings like:

arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (unit_address_vs_reg):
/i2c@7000d000/stmpe811@41/stmpe_touchscreen@0: node has a unit
name, but no reg property
arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning
(avoid_unnecessary_addr_size):

        /i2c@7000d000/stmpe811@41: unnecessary

#address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by Krzysztof Kozlowski <[email protected]>

---

Changes since v4:
1. None

---
 arch/arm/boot/dts/tegra30-apalis.dtsi  | 4 +---
 arch/arm/boot/dts/tegra30-beaver.dts   | 3 ---
 arch/arm/boot/dts/tegra30-colibri.dtsi | 2 --
 3 files changed, 1 insertion(+), 8 deletions(-)

arch/arm/boot/dts/tegra30-apalis.dtsi +1 -3

index 184f60c720fa..5038ca7b68af 100644
@@ -590,8 +590,6 @@
 		/* STMPE811 touch screen controller */
 		stmpe811@41 {
 			compatible = "st,stmpe811";
-			#address-cells = <1>;
-			#size-cells = <0>;
 			reg = <0x41>;
 			interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&gpio>;

@@ -600,7 +598,7 @@
 			blocks = <0x5>;
 			irq-trigger = <0x1>;
 
-			stmpe_touchscreen@0 {
+			stmpe_touchscreen {
 				compatible = "st,stmpe-ts";
 				/* 3.25 MHz ADC clock speed */
 				st,adc-freq = <1>;

arch/arm/boot/dts/tegra30-beaver.dts +0 -3

index 72369877d284..961934f70639 100644
@@ -1791,9 +1791,6 @@
 			vccio-supply = <&vdd_5v_in_reg>;
 
 			regulators {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
 				vdd1_reg: vdd1 {
 					regulator-name = "vddio_ddr_1v2";
 					regulator-min-microvolt = <1200000>;

arch/arm/boot/dts/tegra30-colibri.dtsi +0 -2

index cc46cedf80b9..a593dc8be47f 100644
@@ -352,8 +352,6 @@
 		/* STMPE811 touch screen controller */
 		stmpe811@41 {
 			compatible = "st,stmpe811";
-			#address-cells = <1>;
-			#size-cells = <0>;
 			reg = <0x41>;
 			interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&gpio>;

Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM (with 1024 MB NAND) flavors. Both of them will use the same DTSI expecting the bootloader to do the fixup of /memory node. However in case it does not happen, let's stay on safe side by limiting the memory to 256 MB for both versions of Colibri-T20.

Signed-off-by Krzysztof Kozlowski <[email protected]>

---

RFT:
Not tested on 512 MB module as I have only the 256 MB one.

Changes since v4:
1. Drop the 512 suffix from file names (suggested by Stefan).

Changes since v3:
1. Reduce the memory in existing DTSI instead of creating a new one (suggested by Marcel).

Changes since v2:
1. Do not add new compatible but use everywhere existing "toradex,colibri_t20-512" (suggested by Rob).

Changes since v1:
1. Fix memory size in tegra20-colibri-256.dtsi (was working fine because my bootloader uses mem= argument).

---
 arch/arm/boot/dts/Makefile                                       | 2 +-
 .../boot/dts/{tegra20-colibri-512.dtsi => tegra20-colibri.dtsi}  | 9 +++++++--
 arch/arm/boot/dts/{tegra20-iris-512.dts => tegra20-iris.dts}     | 4 ++--

 3 files changed, 10 insertions(+), 5 deletions(-)
 rename arch/arm/boot/dts/{tegra20-colibri-512.dtsi =>
tegra20-colibri.dtsi} (98%)
 rename arch/arm/boot/dts/{tegra20-iris-512.dts => tegra20-iris.dts} (95%)

arch/arm/boot/dts/Makefile +1 -1

index ec2024ea8b1e..837f8274b3ee 100644
@@ -1030,7 +1030,7 @@ dtb-$(CONFIG_ARCH_TANGO) += \
 	tango4-vantage-1172.dtb
 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
 	tegra20-harmony.dtb \
-	tegra20-iris-512.dtb \
+	tegra20-iris.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
 	tegra20-plutux.dtb \

arch/arm/boot/dts/tegra20-colibri.dtsi renamed from arch/arm/boot/dts/tegra20-colibri-512.dtsi +7 -2

similarity index 98%
rename from arch/arm/boot/dts/tegra20-colibri-512.dtsi
rename to arch/arm/boot/dts/tegra20-colibri.dtsi
index 305efb275b48..b9387c540450 100644
@@ -2,7 +2,7 @@
 #include "tegra20.dtsi"
 
 / {
-	model = "Toradex Colibri T20 512MB";
+	model = "Toradex Colibri T20 256/512 MB";
 	compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
 
 	aliases {

@@ -12,7 +12,12 @@
 
 	memory@0 {
 		device_type = "memory";
-		reg = <0x00000000 0x20000000>;
+		/*
+		 * Set memory to 256 MB to be safe as this could be used on
+		 * 256 or 512 MB module. It is expected from bootloader
+		 * to fix this up for 512 MB version.
+		 */
+		reg = <0x00000000 0x10000000>;
 	};
 
 	host1x@50000000 {

arch/arm/boot/dts/tegra20-iris.dts renamed from arch/arm/boot/dts/tegra20-iris-512.dts +2 -2

similarity index 95%
rename from arch/arm/boot/dts/tegra20-iris-512.dts
rename to arch/arm/boot/dts/tegra20-iris.dts
index 40126388946d..57f16c0e9917 100644
@@ -1,10 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0
 /dts-v1/;
 
-#include "tegra20-colibri-512.dtsi"
+#include "tegra20-colibri.dtsi"
 
 / {
-	model = "Toradex Colibri T20 512MB on Iris";
+	model = "Toradex Colibri T20 256/512 MB on Iris";
 	compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
 
 	aliases {

Remove the usage of skeleton.dtsi and add necessary properties to /memory node to fix the DTC warnings:

arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name

The DTB after the change is the same as before except adding unit-address to /memory node.

Signed-off-by Krzysztof Kozlowski <[email protected]>

---

Changes since v4:
1. None

---
 arch/arm/boot/dts/tegra114-dalmore.dts      | 3 ++-
 arch/arm/boot/dts/tegra114-roth.dts         | 3 ++-
 arch/arm/boot/dts/tegra114-tn7.dts          | 3 ++-
 arch/arm/boot/dts/tegra114.dtsi             | 4 ++--
 arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 3 ++-
 arch/arm/boot/dts/tegra124-apalis.dtsi      | 3 ++-
 arch/arm/boot/dts/tegra124-jetson-tk1.dts   | 3 ++-
 arch/arm/boot/dts/tegra124-nyan.dtsi        | 3 ++-
 arch/arm/boot/dts/tegra124-venice2.dts      | 3 ++-
 arch/arm/boot/dts/tegra124.dtsi             | 2 --
 arch/arm/boot/dts/tegra20-colibri-512.dtsi  | 3 ++-
 arch/arm/boot/dts/tegra20-harmony.dts       | 3 ++-
 arch/arm/boot/dts/tegra20-paz00.dts         | 3 ++-
 arch/arm/boot/dts/tegra20-seaboard.dts      | 3 ++-
 arch/arm/boot/dts/tegra20-tamonten.dtsi     | 3 ++-
 arch/arm/boot/dts/tegra20-trimslice.dts     | 3 ++-
 arch/arm/boot/dts/tegra20-ventana.dts       | 3 ++-
 arch/arm/boot/dts/tegra20.dtsi              | 7 +++++--
 arch/arm/boot/dts/tegra30-apalis.dtsi       | 5 +++++
 arch/arm/boot/dts/tegra30-beaver.dts        | 3 ++-
 arch/arm/boot/dts/tegra30-cardhu.dtsi       | 3 ++-
 arch/arm/boot/dts/tegra30-colibri.dtsi      | 3 ++-
 arch/arm/boot/dts/tegra30.dtsi              | 7 +++++--
 23 files changed, 53 insertions(+), 26 deletions(-)

arch/arm/boot/dts/tegra114-dalmore.dts +2 -1

index eafff16765b4..5cdcedfc19cb 100644
@@ -23,7 +23,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@80000000 {
+		device_type = "memory";
 		reg = <0x80000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra114-roth.dts +2 -1

index 7ed7370ee67a..b4f329a07c60 100644
@@ -28,7 +28,8 @@
 		};
 	};
 
-	memory {
+	memory@80000000 {
+		device_type = "memory";
 		/* memory >= 0x79600000 is reserved for firmware usage */
 		reg = <0x80000000 0x79600000>;
 	};

arch/arm/boot/dts/tegra114-tn7.dts +2 -1

index 7fc4a8b31e45..12092d344ce8 100644
@@ -28,7 +28,8 @@
 		};
 	};
 
-	memory {
+	memory@80000000 {
+		device_type = "memory";
 		/* memory >= 0x37e00000 is reserved for firmware usage */
 		reg = <0x80000000 0x37e00000>;
 	};

arch/arm/boot/dts/tegra114.dtsi +2 -2

index 0e4a13295d8a..b917784d3f97 100644
@@ -5,11 +5,11 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "skeleton.dtsi"
-
 / {
 	compatible = "nvidia,tegra114";
 	interrupt-parent = <&lic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
 
 	host1x@50000000 {
 		compatible = "nvidia,tegra114-host1x", "simple-bus";

arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +2 -1

index bb67edb016c5..80b52c612891 100644
@@ -15,7 +15,8 @@
 	compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
 		     "nvidia,tegra124";
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x0 0x80000000 0x0 0x80000000>;
 	};
 

arch/arm/boot/dts/tegra124-apalis.dtsi +2 -1

index 65a2161b9b8e..3ca7601cafe9 100644
@@ -50,7 +50,8 @@
 	model = "Toradex Apalis TK1";
 	compatible = "toradex,apalis-tk1", "nvidia,tegra124";
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x0 0x80000000 0x0 0x80000000>;
 	};
 

arch/arm/boot/dts/tegra124-jetson-tk1.dts +2 -1

index 6dbcf84dafbc..8d9e6ee6c6a7 100644
@@ -24,7 +24,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x0 0x80000000 0x0 0x80000000>;
 	};
 

arch/arm/boot/dts/tegra124-nyan.dtsi +2 -1

index 3609367037a6..15a2b0e3237e 100644
@@ -13,7 +13,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x0 0x80000000 0x0 0x80000000>;
 	};
 

arch/arm/boot/dts/tegra124-venice2.dts +2 -1

index 89bcc178994d..241cdc4b6600 100644
@@ -18,7 +18,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x0 0x80000000 0x0 0x80000000>;
 	};
 

arch/arm/boot/dts/tegra124.dtsi +0 -2

index 174092bfac90..df1642876a4c 100644
@@ -7,8 +7,6 @@
 #include <dt-bindings/reset/tegra124-car.h>
 #include <dt-bindings/thermal/tegra124-soctherm.h>
 
-#include "skeleton.dtsi"
-
 / {
 	compatible = "nvidia,tegra124";
 	interrupt-parent = <&lic>;

arch/arm/boot/dts/tegra20-colibri-512.dtsi +2 -1

index 5c202b3e3bb1..305efb275b48 100644
@@ -10,7 +10,8 @@
 		rtc1 = "/rtc@7000e000";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x20000000>;
 	};
 

arch/arm/boot/dts/tegra20-harmony.dts +2 -1

index 628a55a9318b..5009a55ae15c 100644
@@ -18,7 +18,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra20-paz00.dts +2 -1

index 30436969adc0..e794ac5442ef 100644
@@ -19,7 +19,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x20000000>;
 	};
 

arch/arm/boot/dts/tegra20-seaboard.dts +2 -1

index 284aae351ff2..6cb832cfa4f3 100644
@@ -18,7 +18,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra20-tamonten.dtsi +2 -1

index 872046d48709..6ceb1228fed3 100644
@@ -15,7 +15,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x20000000>;
 	};
 

arch/arm/boot/dts/tegra20-trimslice.dts +2 -1

index d55c6b240a30..3f94be3da9e5 100644
@@ -18,7 +18,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra20-ventana.dts +2 -1

index ee3fbf941e79..c897a90289bc 100644
@@ -18,7 +18,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@0 {
+		device_type = "memory";
 		reg = <0x00000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra20.dtsi +5 -2

index 0a7136462a1a..290ebbeb210f 100644
@@ -4,11 +4,14 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "skeleton.dtsi"
-
 / {
 	compatible = "nvidia,tegra20";
 	interrupt-parent = <&lic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	chosen { };
+	aliases { };
 
 	iram@40000000 {
 		compatible = "mmio-sram";

arch/arm/boot/dts/tegra30-apalis.dtsi +5 -0

index d1d21ec2a844..184f60c720fa 100644
@@ -10,6 +10,11 @@
 	model = "Toradex Apalis T30";
 	compatible = "toradex,apalis_t30", "nvidia,tegra30";
 
+	memory@0 {
+		device_type = "memory";
+		reg = <0 0>;
+	};
+
 	pcie@3000 {
 		avdd-pexa-supply = <&vdd2_reg>;
 		vdd-pexa-supply = <&vdd2_reg>;

arch/arm/boot/dts/tegra30-beaver.dts +2 -1

index ae52a5039506..72369877d284 100644
@@ -17,7 +17,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@80000000 {
+		device_type = "memory";
 		reg = <0x80000000 0x7ff00000>;
 	};
 

arch/arm/boot/dts/tegra30-cardhu.dtsi +2 -1

index 92a9740c533f..24c04d4c335d 100644
@@ -40,7 +40,8 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory {
+	memory@80000000 {
+		device_type = "memory";
 		reg = <0x80000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra30-colibri.dtsi +2 -1

index c44d8c40c410..cc46cedf80b9 100644
@@ -10,7 +10,8 @@
 	model = "Toradex Colibri T30";
 	compatible = "toradex,colibri_t30", "nvidia,tegra30";
 
-	memory {
+	memory@80000000 {
+		device_type = "memory";
 		reg = <0x80000000 0x40000000>;
 	};
 

arch/arm/boot/dts/tegra30.dtsi +0 -0

index a110cf84d85f..4383f0fd789d 100644
@@ -5,11 +5,14 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 

arch/arm/boot/dts/tegra30.dtsi +0 -0

 	pcie@3000 {
 		compatible = "nvidia,tegra30-pcie";

Quoted 388 lines · Krzysztof Kozlowski

Remove the usage of skeleton.dtsi and add necessary properties to /memory node to fix the DTC warnings:

arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name

The DTB after the change is the same as before except adding unit-address to /memory node.

Signed-off-by Krzysztof Kozlowski <[email protected]>

---

Changes since v4:
1. None

---
 arch/arm/boot/dts/tegra114-dalmore.dts      | 3 ++-
 arch/arm/boot/dts/tegra114-roth.dts         | 3 ++-
 arch/arm/boot/dts/tegra114-tn7.dts          | 3 ++-
 arch/arm/boot/dts/tegra114.dtsi             | 4 ++--
 arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 3 ++-
 arch/arm/boot/dts/tegra124-apalis.dtsi      | 3 ++-
 arch/arm/boot/dts/tegra124-jetson-tk1.dts   | 3 ++-
 arch/arm/boot/dts/tegra124-nyan.dtsi        | 3 ++-
 arch/arm/boot/dts/tegra124-venice2.dts      | 3 ++-
 arch/arm/boot/dts/tegra124.dtsi             | 2 --
 arch/arm/boot/dts/tegra20-colibri-512.dtsi  | 3 ++-
 arch/arm/boot/dts/tegra20-harmony.dts       | 3 ++-
 arch/arm/boot/dts/tegra20-paz00.dts         | 3 ++-
 arch/arm/boot/dts/tegra20-seaboard.dts      | 3 ++-
 arch/arm/boot/dts/tegra20-tamonten.dtsi     | 3 ++-
 arch/arm/boot/dts/tegra20-trimslice.dts     | 3 ++-
 arch/arm/boot/dts/tegra20-ventana.dts       | 3 ++-
 arch/arm/boot/dts/tegra20.dtsi              | 7 +++++--
 arch/arm/boot/dts/tegra30-apalis.dtsi       | 5 +++++
 arch/arm/boot/dts/tegra30-beaver.dts        | 3 ++-
 arch/arm/boot/dts/tegra30-cardhu.dtsi       | 3 ++-
 arch/arm/boot/dts/tegra30-colibri.dtsi      | 3 ++-
 arch/arm/boot/dts/tegra30.dtsi              | 7 +++++--
 23 files changed, 53 insertions(+), 26 deletions(-)

arch/arm/boot/dts/tegra114-dalmore.dts +2 -1

index eafff16765b4..5cdcedfc19cb 100644
@@ -23,7 +23,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra114-roth.dts +2 -1

index 7ed7370ee67a..b4f329a07c60 100644
@@ -28,7 +28,8 @@
              };
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              /* memory >= 0x79600000 is reserved for firmware usage */
              reg = <0x80000000 0x79600000>;
      };

arch/arm/boot/dts/tegra114-tn7.dts +2 -1

index 7fc4a8b31e45..12092d344ce8 100644
@@ -28,7 +28,8 @@
              };
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              /* memory >= 0x37e00000 is reserved for firmware usage */
              reg = <0x80000000 0x37e00000>;
      };

arch/arm/boot/dts/tegra114.dtsi +2 -2

index 0e4a13295d8a..b917784d3f97 100644
@@ -5,11 +5,11 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra114";
      interrupt-parent = <&lic>;
+     #address-cells = <1>;
+     #size-cells = <1>;
 
      host1x@50000000 {
              compatible = "nvidia,tegra114-host1x", "simple-bus";

arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +2 -1

index bb67edb016c5..80b52c612891 100644
@@ -15,7 +15,8 @@
      compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
                   "nvidia,tegra124";
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-apalis.dtsi +2 -1

index 65a2161b9b8e..3ca7601cafe9 100644
@@ -50,7 +50,8 @@
      model = "Toradex Apalis TK1";
      compatible = "toradex,apalis-tk1", "nvidia,tegra124";
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-jetson-tk1.dts +2 -1

index 6dbcf84dafbc..8d9e6ee6c6a7 100644
@@ -24,7 +24,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-nyan.dtsi +2 -1

index 3609367037a6..15a2b0e3237e 100644
@@ -13,7 +13,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-venice2.dts +2 -1

index 89bcc178994d..241cdc4b6600 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124.dtsi +0 -2

index 174092bfac90..df1642876a4c 100644
@@ -7,8 +7,6 @@
 #include <dt-bindings/reset/tegra124-car.h>
 #include <dt-bindings/thermal/tegra124-soctherm.h>
 
-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra124";
      interrupt-parent = <&lic>;

arch/arm/boot/dts/tegra20-colibri-512.dtsi +2 -1

index 5c202b3e3bb1..305efb275b48 100644
@@ -10,7 +10,8 @@
              rtc1 = "/rtc@7000e000";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x20000000>;
      };
 

arch/arm/boot/dts/tegra20-harmony.dts +2 -1

index 628a55a9318b..5009a55ae15c 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20-paz00.dts +2 -1

index 30436969adc0..e794ac5442ef 100644
@@ -19,7 +19,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x20000000>;
      };
 

arch/arm/boot/dts/tegra20-seaboard.dts +2 -1

index 284aae351ff2..6cb832cfa4f3 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20-tamonten.dtsi +2 -1

index 872046d48709..6ceb1228fed3 100644
@@ -15,7 +15,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x20000000>;
      };
 

arch/arm/boot/dts/tegra20-trimslice.dts +2 -1

index d55c6b240a30..3f94be3da9e5 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20-ventana.dts +2 -1

index ee3fbf941e79..c897a90289bc 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20.dtsi +5 -2

index 0a7136462a1a..290ebbeb210f 100644
@@ -4,11 +4,14 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra20";
      interrupt-parent = <&lic>;
+     #address-cells = <1>;
+     #size-cells = <1>;
+
+     chosen { };
+     aliases { };
 
      iram@40000000 {
              compatible = "mmio-sram";

arch/arm/boot/dts/tegra30-apalis.dtsi +5 -0

index d1d21ec2a844..184f60c720fa 100644
@@ -10,6 +10,11 @@
      model = "Toradex Apalis T30";
      compatible = "toradex,apalis_t30", "nvidia,tegra30";
 
+     memory@0 {
+             device_type = "memory";
+             reg = <0 0>;
+     };
+
      pcie@3000 {
              avdd-pexa-supply = <&vdd2_reg>;
              vdd-pexa-supply = <&vdd2_reg>;

arch/arm/boot/dts/tegra30-beaver.dts +2 -1

index ae52a5039506..72369877d284 100644
@@ -17,7 +17,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x7ff00000>;
      };
 

arch/arm/boot/dts/tegra30-cardhu.dtsi +2 -1

index 92a9740c533f..24c04d4c335d 100644
@@ -40,7 +40,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra30-colibri.dtsi +2 -1

index c44d8c40c410..cc46cedf80b9 100644
@@ -10,7 +10,8 @@
      model = "Toradex Colibri T30";
      compatible = "toradex,colibri_t30", "nvidia,tegra30";
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra30.dtsi +0 -0

index a110cf84d85f..4383f0fd789d 100644
@@ -5,11 +5,14 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 

arch/arm/boot/dts/tegra30.dtsi line 15

Quoted 10 lines

arch/arm/boot/dts/tegra30.dtsi +5 -2

-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra30";
      interrupt-parent = <&lic>;
+     #address-cells = <1>;
+     #size-cells = <1>;
+
+     chosen { };
+     aliases { };

Could we not add

        memory { device_type = "memory"; };

in the SoC level device trees?

This would save device_type in all other instances.

That is also how it is done in other places, e.g.
arch/arm/boot/dts/imx6qdl.dtsi

Also, could we maybe split this in two?

ARM: dts: tegra: Remove skeleton.dtsi
ARM: dts: tegra: fix DTC warnings for /memory

The first would only touch SoC level dts.

The second then would fix DTC warnings by adding the address to the memory nodes in all board files.

--
Stefan

Quoted 3 lines

arch/arm/boot/dts/tegra30.dtsi +0 -0

      pcie@3000 {
              compatible = "nvidia,tegra30-pcie";

Quoted 402 lines · Stefan Agner

Quoted 388 lines · Krzysztof Kozlowski

Remove the usage of skeleton.dtsi and add necessary properties to /memory node to fix the DTC warnings:

arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name

The DTB after the change is the same as before except adding unit-address to /memory node.

Signed-off-by Krzysztof Kozlowski <[email protected]>

---

Changes since v4:
1. None

---
 arch/arm/boot/dts/tegra114-dalmore.dts      | 3 ++-
 arch/arm/boot/dts/tegra114-roth.dts         | 3 ++-
 arch/arm/boot/dts/tegra114-tn7.dts          | 3 ++-
 arch/arm/boot/dts/tegra114.dtsi             | 4 ++--
 arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 3 ++-
 arch/arm/boot/dts/tegra124-apalis.dtsi      | 3 ++-
 arch/arm/boot/dts/tegra124-jetson-tk1.dts   | 3 ++-
 arch/arm/boot/dts/tegra124-nyan.dtsi        | 3 ++-
 arch/arm/boot/dts/tegra124-venice2.dts      | 3 ++-
 arch/arm/boot/dts/tegra124.dtsi             | 2 --
 arch/arm/boot/dts/tegra20-colibri-512.dtsi  | 3 ++-
 arch/arm/boot/dts/tegra20-harmony.dts       | 3 ++-
 arch/arm/boot/dts/tegra20-paz00.dts         | 3 ++-
 arch/arm/boot/dts/tegra20-seaboard.dts      | 3 ++-
 arch/arm/boot/dts/tegra20-tamonten.dtsi     | 3 ++-
 arch/arm/boot/dts/tegra20-trimslice.dts     | 3 ++-
 arch/arm/boot/dts/tegra20-ventana.dts       | 3 ++-
 arch/arm/boot/dts/tegra20.dtsi              | 7 +++++--
 arch/arm/boot/dts/tegra30-apalis.dtsi       | 5 +++++
 arch/arm/boot/dts/tegra30-beaver.dts        | 3 ++-
 arch/arm/boot/dts/tegra30-cardhu.dtsi       | 3 ++-
 arch/arm/boot/dts/tegra30-colibri.dtsi      | 3 ++-
 arch/arm/boot/dts/tegra30.dtsi              | 7 +++++--
 23 files changed, 53 insertions(+), 26 deletions(-)

arch/arm/boot/dts/tegra114-dalmore.dts +2 -1

index eafff16765b4..5cdcedfc19cb 100644
@@ -23,7 +23,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra114-roth.dts +2 -1

index 7ed7370ee67a..b4f329a07c60 100644
@@ -28,7 +28,8 @@
              };
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              /* memory >= 0x79600000 is reserved for firmware usage */
              reg = <0x80000000 0x79600000>;
      };

arch/arm/boot/dts/tegra114-tn7.dts +2 -1

index 7fc4a8b31e45..12092d344ce8 100644
@@ -28,7 +28,8 @@
              };
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              /* memory >= 0x37e00000 is reserved for firmware usage */
              reg = <0x80000000 0x37e00000>;
      };

arch/arm/boot/dts/tegra114.dtsi +2 -2

index 0e4a13295d8a..b917784d3f97 100644
@@ -5,11 +5,11 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra114";
      interrupt-parent = <&lic>;
+     #address-cells = <1>;
+     #size-cells = <1>;
 
      host1x@50000000 {
              compatible = "nvidia,tegra114-host1x", "simple-bus";

arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +2 -1

index bb67edb016c5..80b52c612891 100644
@@ -15,7 +15,8 @@
      compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
                   "nvidia,tegra124";
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-apalis.dtsi +2 -1

index 65a2161b9b8e..3ca7601cafe9 100644
@@ -50,7 +50,8 @@
      model = "Toradex Apalis TK1";
      compatible = "toradex,apalis-tk1", "nvidia,tegra124";
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-jetson-tk1.dts +2 -1

index 6dbcf84dafbc..8d9e6ee6c6a7 100644
@@ -24,7 +24,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-nyan.dtsi +2 -1

index 3609367037a6..15a2b0e3237e 100644
@@ -13,7 +13,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124-venice2.dts +2 -1

index 89bcc178994d..241cdc4b6600 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x0 0x80000000 0x0 0x80000000>;
      };
 

arch/arm/boot/dts/tegra124.dtsi +0 -2

index 174092bfac90..df1642876a4c 100644
@@ -7,8 +7,6 @@
 #include <dt-bindings/reset/tegra124-car.h>
 #include <dt-bindings/thermal/tegra124-soctherm.h>
 
-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra124";
      interrupt-parent = <&lic>;

arch/arm/boot/dts/tegra20-colibri-512.dtsi +2 -1

index 5c202b3e3bb1..305efb275b48 100644
@@ -10,7 +10,8 @@
              rtc1 = "/rtc@7000e000";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x20000000>;
      };
 

arch/arm/boot/dts/tegra20-harmony.dts +2 -1

index 628a55a9318b..5009a55ae15c 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20-paz00.dts +2 -1

index 30436969adc0..e794ac5442ef 100644
@@ -19,7 +19,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x20000000>;
      };
 

arch/arm/boot/dts/tegra20-seaboard.dts +2 -1

index 284aae351ff2..6cb832cfa4f3 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20-tamonten.dtsi +2 -1

index 872046d48709..6ceb1228fed3 100644
@@ -15,7 +15,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x20000000>;
      };
 

arch/arm/boot/dts/tegra20-trimslice.dts +2 -1

index d55c6b240a30..3f94be3da9e5 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20-ventana.dts +2 -1

index ee3fbf941e79..c897a90289bc 100644
@@ -18,7 +18,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@0 {
+             device_type = "memory";
              reg = <0x00000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra20.dtsi +5 -2

index 0a7136462a1a..290ebbeb210f 100644
@@ -4,11 +4,14 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra20";
      interrupt-parent = <&lic>;
+     #address-cells = <1>;
+     #size-cells = <1>;
+
+     chosen { };
+     aliases { };
 
      iram@40000000 {
              compatible = "mmio-sram";

arch/arm/boot/dts/tegra30-apalis.dtsi +5 -0

index d1d21ec2a844..184f60c720fa 100644
@@ -10,6 +10,11 @@
      model = "Toradex Apalis T30";
      compatible = "toradex,apalis_t30", "nvidia,tegra30";
 
+     memory@0 {
+             device_type = "memory";
+             reg = <0 0>;
+     };
+
      pcie@3000 {
              avdd-pexa-supply = <&vdd2_reg>;
              vdd-pexa-supply = <&vdd2_reg>;

arch/arm/boot/dts/tegra30-beaver.dts +2 -1

index ae52a5039506..72369877d284 100644
@@ -17,7 +17,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x7ff00000>;
      };
 

arch/arm/boot/dts/tegra30-cardhu.dtsi +2 -1

index 92a9740c533f..24c04d4c335d 100644
@@ -40,7 +40,8 @@
              stdout-path = "serial0:115200n8";
      };
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra30-colibri.dtsi +2 -1

index c44d8c40c410..cc46cedf80b9 100644
@@ -10,7 +10,8 @@
      model = "Toradex Colibri T30";
      compatible = "toradex,colibri_t30", "nvidia,tegra30";
 
-     memory {
+     memory@80000000 {
+             device_type = "memory";
              reg = <0x80000000 0x40000000>;
      };
 

arch/arm/boot/dts/tegra30.dtsi +0 -0

index a110cf84d85f..4383f0fd789d 100644
@@ -5,11 +5,14 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 

arch/arm/boot/dts/tegra30.dtsi line 15

Quoted 10 lines

arch/arm/boot/dts/tegra30.dtsi +5 -2

-#include "skeleton.dtsi"
-
 / {
      compatible = "nvidia,tegra30";
      interrupt-parent = <&lic>;
+     #address-cells = <1>;
+     #size-cells = <1>;
+
+     chosen { };
+     aliases { };

Could we not add

Quoted 8 lines

        memory { device_type = "memory"; };

in the SoC level device trees?

This would save device_type in all other instances.

That is also how it is done in other places, e.g.
arch/arm/boot/dts/imx6qdl.dtsi

Not really because the unit address will not match between different boards. The imx6qdl, as I see, has the same issue:
- imx6qdl.dtsi defines "memory" node
- imx6dl-apf6dev.dts includes the previous and defines "memory@10000000"

This is wrong - two memory nodes.

Quoted 4 lines

Also, could we maybe split this in two?

ARM: dts: tegra: Remove skeleton.dtsi
ARM: dts: tegra: fix DTC warnings for /memory

It is possible to split it but this really won't bring any benefit because the removal of skeleton.dtsi is the way to fix the errors. Or saying it differently - the warnings are the reason to remove the skeleton.dtsi. If you split them, what is the reason to remove the skeleton.dtsi? (Theoretically it was deprecated so this could be explanation).

If you wish, I can prepare something like:
1. Remove skeleton.dtsi and add everywhere 'device_type = "memory"'. All the warnings will stay but the end DTB should be equal between changes.
2. Fix warnings.

Quoted 1 line

The first would only touch SoC level dts.

No, because device_type has to be added everywhere. And because of warnings (explained before) it cannot be added to SoC DTSI.

Best regards,
Krzysztof

Quoted 10 lines

The second then would fix DTC warnings by adding the address to the memory nodes in all board files.

--
Stefan

Quoted 3 lines

arch/arm/boot/dts/tegra30.dtsi +0 -0

      pcie@3000 {
              compatible = "nvidia,tegra30-pcie";

Quoted 13 lines · Krzysztof Kozlowski

Quoted 11 lines · Stefan Agner

On 17.05.2018 09:45, Krzysztof Kozlowski wrote:
Could we not add

        memory { device_type = "memory"; };

in the SoC level device trees?

This would save device_type in all other instances.

That is also how it is done in other places, e.g.
arch/arm/boot/dts/imx6qdl.dtsi

Quoted 7 lines

Not really because the unit address will not match between different boards. The imx6qdl, as I see, has the same issue:
- imx6qdl.dtsi defines "memory" node
- imx6dl-apf6dev.dts includes the previous and defines "memory@10000000"

This is wrong - two memory nodes.

Hm I see. We could add

memory@0 { device_type = "memory"; };

Since the reg property is specified in the board level device tree it would be still fine?

Or probably better to provide a complete spec with length zero:

memory@0 {
        device_type = "memory";
        reg = <0x0 0x0>;
};

Even some boards do that and assume that boot loader will fill it correctly, so that should be fine.

Quoted 31 lines · Stefan Agner

Quoted 13 lines · Krzysztof Kozlowski

Quoted 11 lines · Stefan Agner

On 17.05.2018 09:45, Krzysztof Kozlowski wrote:
Could we not add

        memory { device_type = "memory"; };

in the SoC level device trees?

This would save device_type in all other instances.

That is also how it is done in other places, e.g.
arch/arm/boot/dts/imx6qdl.dtsi

Quoted 7 lines

Not really because the unit address will not match between different boards. The imx6qdl, as I see, has the same issue:
- imx6qdl.dtsi defines "memory" node
- imx6dl-apf6dev.dts includes the previous and defines "memory@10000000"

This is wrong - two memory nodes.

Hm I see. We could add

memory@0 { device_type = "memory"; };

Since the reg property is specified in the board level device tree it would be still fine?

Or probably better to provide a complete spec with length zero:

Quoted 7 lines

memory@0 {
        device_type = "memory";
        reg = <0x0 0x0>;
};

Even some boards do that and assume that boot loader will fill it correctly, so that should be fine.

That could be the solution although tegra30-apalis.dtsi is a problem here. For Tegra 114, 124 and 20 it would work fine - all boards from given SoC have the same address of memory (0x0 or 0x80000000). However for Tegra30 the Apalis did not have any memory reg before so I am not sure what should be used. I added 0x0. The other Tegra30 boards have memory@80000000.