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pinctrl: npcm: add NPCM7xx pinctrl driver

PATCH Applied Tomer Maimon 2 participants 5 messages May 17, 2018 – May 18, 2018

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Tomer Maimon

author maintainer
#0 lore raw

v2 cover pinctrl: npcm: add NPCM7xx pinctrl driver

Changes since version 1:
fixed comments from Andrew Jeffery<[email protected]>:
https://patchwork.ozlabs.org/patch/853395/

This patch set adds pin controller support for the Nuvoton NPCM7xx Baseboard Management Controller (BMC).

The NPCM7XX Pin Controller multi-function routed through the multiplexing block, Each pin supports GPIO functionality (GPIOx) and multiple functions that directly connect the pin to different hardware blocks.

Tomer Maimon (2):
dt-binding: pinctrl: document NPCM7xx pin controller DT bindings
pinctrl: npcm: add NPCM7xx pin control driver

 .../bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt   |   70 +
 drivers/pinctrl/Kconfig                            |    1 +
 drivers/pinctrl/Makefile                           |    2 +
 drivers/pinctrl/nuvoton/Kconfig                    |   12 +
 drivers/pinctrl/nuvoton/Makefile                   |    1 +
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c          | 2133 ++++++++++++++++++++
 6 files changed, 2219 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
 create mode 100644 drivers/pinctrl/nuvoton/Kconfig
 create mode 100644 drivers/pinctrl/nuvoton/Makefile
 create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
Signature · 1 line
2.14.1
author maintainer
#1 lore raw

PATCH v2 1/2 dt-binding: pinctrl: document NPCM7xx pin controller DT bindings

Added device tree binding documentation for
Nuvoton NPCM7xx pin controller

---
 .../bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt   | 70 ++++++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt new file +70 -0
new file mode 100644
index 000000000000..a2bba4d5893e
@@ -0,0 +1,70 @@
+Nuvoton NPCM7XX Pin Controllers
+
+The NPCM7XX Pin Controller multi-function routed through
+the multiplexing block, Each pin supports GPIO functionality (GPIOx)
+and multiple functions that directly connect the pin to different
+hardware blocks.
+
+Required properties:
+- compatible      : "nuvoton,npcm750-pinctrl" for Poleg NPCM750.
+
+Contents of function subnode node
+---------------------------------
+Required subnode-properties:
+- groups : An array of strings. Each string contains the name of a group.
+- function: A string containing the name of the function to mux to the
+  group.
+
+  Valid values for group and function names can be found from looking at the
+  group and function arrays in driver files:
+  drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+
+For example, pinctrl might have subnodes like the following:
+	r1err_pins: r1err_pins {
+		groups = "r1err";
+		function = "r1err";
+	};
+	r1md_pins: r1md_pins {
+		groups = "r1md";
+		function = "r1md";
+	};
+	r1_pins: r1_pins {
+		groups = "r1";
+		function = "r1";
+	};
+
+For a specific board, if it wants to use EMC (10/100 network),
+it can add the following to its board-specific .dts file.
+emc0: eth@f0825000 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&r1_pins
+				 &r1err_pins
+				 &r1md_pins>;
+	phy-mode = "rmii";
+
+if EMC hardware is not used the EMC pin can used for GPIO56
+	pinctrl-names = "default";
+	pinctrl-0 = <&gpio56_pins>
+
+Examples
+========
+
+pinctrl: pinctrl@0 {
+	compatible = "nuvoton,npcm7xx-pinctrl";
+	status = "okay";
+	iox1_pins: iox1_pins {
+		groups = "iox1";
+		function = "iox1";
+	};
+	iox2_pins: iox2_pins {
+		groups = "iox2";
+		function = "iox2";
+	};
+
+	....
+
+	clkreq_pins: clkreq_pins {
+		groups = "clkreq";
+		function = "clkreq";
+	};
+};
Signature · 1 line
2.14.1
author maintainer
#2 lore raw

PATCH v2 2/2 pinctrl: npcm: add NPCM7xx pin control driver

In reply to Tomer Maimon

Add Nuvoton BMC NPCM7xx pin controller driver.

The NPCM7XX Pin Controller multi-function routed through the multiplexing block, Each pin supports GPIO functionality (GPIOx) and multiple functions that directly connect the pin to different hardware blocks.

---
 drivers/pinctrl/Kconfig                   |    1 +
 drivers/pinctrl/Makefile                  |    2 +
 drivers/pinctrl/nuvoton/Kconfig           |   12 +
 drivers/pinctrl/nuvoton/Makefile          |    1 +
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 2133 +++++++++++++++++++++++++++++
 5 files changed, 2149 insertions(+)
 create mode 100644 drivers/pinctrl/nuvoton/Kconfig
 create mode 100644 drivers/pinctrl/nuvoton/Makefile
 create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
drivers/pinctrl/Kconfig +1 -0
index e14b46c7b37f..25b7c1383631 100644
@@ -351,6 +351,7 @@ source "drivers/pinctrl/uniphier/Kconfig"
 source "drivers/pinctrl/vt8500/Kconfig"
 source "drivers/pinctrl/mediatek/Kconfig"
 source "drivers/pinctrl/zte/Kconfig"
+source "drivers/pinctrl/nuvoton/Kconfig"
 
 config PINCTRL_XWAY
 	bool
drivers/pinctrl/Makefile +2 -0
index 2bc641d62400..925d99b05e47 100644
@@ -62,3 +62,5 @@ obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_ARCH_VT8500)	+= vt8500/
 obj-$(CONFIG_PINCTRL_MTK)	+= mediatek/
 obj-$(CONFIG_PINCTRL_ZX)	+= zte/
+obj-$(CONFIG_ARCH_NPCM7XX)	+= nuvoton/
+
drivers/pinctrl/nuvoton/Kconfig new file +12 -0
new file mode 100644
index 000000000000..e174a83e8be2
@@ -0,0 +1,12 @@
+config PINCTRL_NPCM7XX
+	bool "Pinctrl driver for Nuvoton NPCM7XX"
+	depends on (ARCH_NPCM7XX || COMPILE_TEST) && OF
+	depends on MFD_SYSCON
+	select GPIOLIB
+	select GPIOLIB_IRQCHIP
+	select PINMUX
+	select PINCONF
+	select GENERIC_PINCONF
+	help
+	  Say Y here to enable pin controller and GPIO support 
+	  for Nuvoton NPCM7xx SoCs.
drivers/pinctrl/nuvoton/Makefile new file +1 -0
new file mode 100644
index 000000000000..244dcd978d6a
@@ -0,0 +1 @@
+obj-$(CONFIG_PINCTRL_NPCM7XX)	+= pinctrl-npcm7xx.o
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file +2133 -0

2,133 lines not on this page · raw message

Signature · 1 line
2.14.1
#3 lore raw

Re: [PATCH linux dev-4.13 v2 2/2] pinctrl: npcm: add NPCM7xx pin control driver

Hi Tomer,

Quoted 9 lines · Tomer Maimon

Add Nuvoton BMC NPCM7xx pin controller driver.

The NPCM7XX Pin Controller multi-function routed through the multiplexing block, Each pin supports GPIO functionality (GPIOx) and multiple functions that directly connect the pin to different hardware blocks.

I've applied this to dev-4.13 with some minor fixes. How is the upstream submission of this one going?

Quoted 39 lines
---
 drivers/pinctrl/Kconfig                   |    1 +
 drivers/pinctrl/Makefile                  |    2 +
 drivers/pinctrl/nuvoton/Kconfig           |   12 +
 drivers/pinctrl/nuvoton/Makefile          |    1 +
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 2133 +++++++++++++++++++++++++++++
 5 files changed, 2149 insertions(+)
 create mode 100644 drivers/pinctrl/nuvoton/Kconfig
 create mode 100644 drivers/pinctrl/nuvoton/Makefile
 create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
drivers/pinctrl/Kconfig +1 -0
index e14b46c7b37f..25b7c1383631 100644
@@ -351,6 +351,7 @@ source "drivers/pinctrl/uniphier/Kconfig"
 source "drivers/pinctrl/vt8500/Kconfig"
 source "drivers/pinctrl/mediatek/Kconfig"
 source "drivers/pinctrl/zte/Kconfig"
+source "drivers/pinctrl/nuvoton/Kconfig"
 
 config PINCTRL_XWAY
        bool
drivers/pinctrl/Makefile +2 -0
index 2bc641d62400..925d99b05e47 100644
@@ -62,3 +62,5 @@ obj-$(CONFIG_PINCTRL_UNIPHIER)        += uniphier/
 obj-$(CONFIG_ARCH_VT8500)      += vt8500/
 obj-$(CONFIG_PINCTRL_MTK)      += mediatek/
 obj-$(CONFIG_PINCTRL_ZX)       += zte/
+obj-$(CONFIG_ARCH_NPCM7XX)     += nuvoton/
+
drivers/pinctrl/nuvoton/Kconfig new file +0 -0
new file mode 100644
index 000000000000..e174a83e8be2

drivers/pinctrl/nuvoton/Kconfig line 4

Quoted 4 lines
drivers/pinctrl/nuvoton/Kconfig new file +4 -0
@@ -0,0 +1,12 @@
+config PINCTRL_NPCM7XX
+       bool "Pinctrl driver for Nuvoton NPCM7XX"
+       depends on (ARCH_NPCM7XX || COMPILE_TEST) && OF
+       depends on MFD_SYSCON

This needed to be select MFD_SYSCON, or else I got Kconfig warnings.

Quoted 11 lines
drivers/pinctrl/nuvoton/Kconfig new file +8 -0
+       select GPIOLIB
+       select GPIOLIB_IRQCHIP
+       select PINMUX
+       select PINCONF
+       select GENERIC_PINCONF
+       help
+         Say Y here to enable pin controller and GPIO support
+         for Nuvoton NPCM7xx SoCs.

drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c line 27

Quoted 4 lines
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file +3 -0
 
+
+#define DRV_DATE    "2018-05-14"
+#define DRV_VERSION "2.0.0"

I don't think this is necessary.

Quoted 25 lines
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file +25 -0
+/* Get slew rate of pin (high/low) */
+static int npcm_get_slew_rate(struct NPCM_GPIO *bank,
+                             struct regmap *gcr_regmap, unsigned int pin)
+{
+       u32 val;
+       int gpio = (pin % bank->gc.ngpio);
+
+       if (pincfg[pin].flag & SLEW)
+               return gpio_bitop(bank, opGETBIT, gpio, NPCM_GP_N_OSRC);
+       /* LPC Slew rate in SRCNT register */
+       if (pincfg[pin].flag & SLEWLPC)
+       {
+               regmap_read(gcr_regmap, NPCM7XX_GCR_SRCNT, &val);
+               return !!(val & SRCNT_ESPI);
+       }
+       return -EINVAL;
+}
+
+/* Get drive strength for a pin, if supported */
+static int npcm_get_drive_strength(struct pinctrl_dev *pctldev,
+                                  unsigned int pin)
+{
+       struct NPCM7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);
+       struct NPCM_GPIO *bank = &npcm->gpio_bank[pin/GPIO_PER_BANK];
+       int gpio = (pin % bank->gc.ngpio);

drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c line 1569

Quoted 10 lines
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file +10 -0
+       u32 val, ds = 0;
+       int flg;
+
+       flg = pincfg[pin].flag;
+       if (flg & DRIVE_STRENGTH_MASK) {
+               /* Get standard reading */
+               val = gpio_bitop(bank, opGETBIT, gpio, NPCM_GP_N_ODSC);
+               ds = val ? DSHI(flg) : DSLO(flg);
+       }
+       dev_dbg(bank->gc.parent, " pin %d strength %d = %d\n", pin, val, ds);

I got a warning here:

drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c: In function ‘npcm_config_get’:
./include/linux/dynamic_debug.h:134:3: warning: ‘val’ may be used uninitialized in this function [-Wmaybe-uninitialized]
__dynamic_dev_dbg(&descriptor, dev, fmt, \
^~~~~~~~~~~~~~~~~
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c:1560:6: note: ‘val’ was declared here

  u32 val, ds = 0;
      ^~~

It might make sense to move the dev_dbg up into the if ().

Quoted 1 line

+ return ds;

In the case where DRIVE_STRENGTH_MASK is not supported, should you instead return EINVAL like you do for the slew rate above?

Quoted 17 lines
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file +16 -0
+}
+
+/* Set drive strength for a pin, if supported */
+static int npcm_set_drive_strength(struct NPCM7xx_pinctrl *npcm,
+                                  unsigned int pin, int nval)
+{
+       int v;
+       struct NPCM_GPIO *bank = &npcm->gpio_bank[pin/GPIO_PER_BANK];
+       int gpio = (pin % bank->gc.ngpio);
+
+       v = (pincfg[pin].flag & DRIVE_STRENGTH_MASK);
+       if (!nval || !v)
+               return 0;
+       if (DSLO(v) == nval) {
+               dev_dbg(bank->gc.parent, " setting pin %d to low strength "
+                                        "[%d]\n", pin, nval);

drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c line 1596

Quoted 10 lines
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file +10 -0
+               gpio_bitop(bank, opCLRBIT, gpio, NPCM_GP_N_ODSC);
+               return 1;
+       } else if (DSHI(v) == nval) {
+               dev_dbg(bank->gc.parent, " setting pin %d to high strength "
+                                        "[%d]\n", pin, nval);
+               gpio_bitop(bank, opSETBIT, gpio, NPCM_GP_N_ODSC);
+               return 1;
+       }
+       return 0;
+}

Cheers,

Joel

Applied
#4 lore raw
In reply to Tomer Maimon
Quoted 4 lines · Tomer Maimon

Changes since version 1:
fixed comments from Andrew Jeffery<[email protected]>:
https://patchwork.ozlabs.org/patch/853395/

Quoted 8 lines

This patch set adds pin controller support for the Nuvoton NPCM7xx Baseboard Management Controller (BMC).

The NPCM7XX Pin Controller multi-function routed through the multiplexing block, Each pin supports GPIO functionality (GPIOx) and multiple functions that directly connect the pin to different hardware blocks.

I've applied these to dev-4.13.

How is the upstream submission going?

Cheers,

Joel

Quoted 20 lines

Tomer Maimon (2):
dt-binding: pinctrl: document NPCM7xx pin controller DT bindings
pinctrl: npcm: add NPCM7xx pin control driver

 .../bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt   |   70 +
 drivers/pinctrl/Kconfig                            |    1 +
 drivers/pinctrl/Makefile                           |    2 +
 drivers/pinctrl/nuvoton/Kconfig                    |   12 +
 drivers/pinctrl/nuvoton/Makefile                   |    1 +
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c          | 2133 ++++++++++++++++++++
 6 files changed, 2219 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
 create mode 100644 drivers/pinctrl/nuvoton/Kconfig
 create mode 100644 drivers/pinctrl/nuvoton/Makefile
 create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c

--
2.14.1