Add HDMI support to iwg20d
Subsystems (6)
cover Add HDMI support to iwg20d
Dear Ben,
this series adds HDMI video output to iWave's iwg20d board.
I had to take out interrupt (hotplug) support from the hdmi DT node as it looks like commit 9183e45db7774716d056319c237a4185baba19c7 introduced "connector" data field with struct adv7511, but drm_connector_init was left behind, and as such connector.dev is NULL, and that causes issues to function adv7511_hpd_work, preventing HDMI hotplug from working properly.
While investigating HDMI hotplugging, I have found out that when using a GPIO purely as an interrupt source the corresponding GPIO module clock is not enabled, therefore this series backports the fix for this. I yet have to check if this fix is any good to 4.4 LTS, I'll send it to stable at vger.kernel.org in case it works for 4.4 LTS too.
This series applies on top of tag v4.4.126-cip22.
Thanks,
Fab
Fabrizio Castro (4):
dt-bindings: display: rcar-du: Document R8A774[35] DU
drm: rcar-du: Add R8A7743 support
ARM: dts: r8a7743: Add DU support
ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
Geert Uytterhoeven (1):
gpio: rcar: Add Runtime PM handling for interrupts
Linus Walleij (1):
gpio: rcar: use gpiochip data pointer
Niklas S?derlund (1):
ARM: shmobile: defconfig: Enable CMA for DMA
.../devicetree/bindings/display/renesas,du.txt | 24 ++++--- arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 73 +++++++++++++++++++++ arch/arm/boot/dts/r8a7743.dtsi | 30 +++++++++ arch/arm/configs/shmobile_defconfig | 3 + drivers/gpio/gpio-rcar.c | 75 ++++++++++++++++------ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 23 +++++++ 6 files changed, 197 insertions(+), 31 deletions(-)
Signature · 1 line
2.7.4
PATCH 1/7 dt-bindings: display: rcar-du: Document R8A774[35] DU
Add device tree bindings for r8a7743 and r8a7745 DUs. r8a7743 DU is similar to the one from r8a7791, r8a7745 DU is similar to the one from r8a7794.
(removed R-Car gen3 SoCs)
--- .../devicetree/bindings/display/renesas,du.txt | 24 +++++++++++++--------- 1 file changed, 14 insertions(+), 10 deletions(-)
Documentation/devicetree/bindings/display/renesas,du.txt +14 -10
@@ -3,6 +3,8 @@ Required Properties: - compatible: must be one of the following. + - "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU + - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
@@ -24,10 +26,10 @@ Required Properties: - clock-names: Name of the clocks. This property is model-dependent. - R8A7779 uses a single functional clock. The clock doesn't need to be named. - - R8A779[0134] use one functional clock per channel and one clock per LVDS - encoder (if available). The functional clocks must be named "du.x" with - "x" being the channel numerical index. The LVDS clocks must be named - "lvds.x" with "x" being the LVDS encoder numerical index. + - All other DU instances use one functional clock per channel and one + clock per LVDS encoder (if available). The functional clocks must be + named "du.x" with "x" being the channel numerical index. The LVDS clocks + must be named "lvds.x" with "x" being the LVDS encoder numerical index. - In addition to the functional and encoder clocks, all DU versions also support externally supplied pixel clocks. Those clocks are optional. When supplied they must be named "dclkin.x" with "x" being the input
@@ -41,13 +43,15 @@ bindings specified in Documentation/devicetree/bindings/graph.txt. The following table lists for each supported model the port number corresponding to each DU output. - Port 0 Port1 Port2 + Port 0 Port1 Port2 ----------------------------------------------------------------------------- - R8A7779 (H1) DPAD 0 DPAD 1 - - R8A7790 (H2) DPAD LVDS 0 LVDS 1 - R8A7791 (M2-W) DPAD LVDS 0 - - R8A7793 (M2-N) DPAD LVDS 0 - - R8A7794 (E2) DPAD 0 DPAD 1 - + R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - + R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - + R8A7779 (R-Car H1) DPAD 0 DPAD 1 - + R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 + R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - + R8A7793 (R-Car M2-N) DPAD 0 LVDS 0 - + R8A7794 (R-Car E2) DPAD 0 DPAD 1 - Example: R8A7790 (R-Car H2) DU
Signature · 1 line
2.7.4
PATCH 2/7 drm: rcar-du: Add R8A7743 support
In reply to Fabrizio CastroAdd support for the R8A7743 DU (which is very similar to the R8A7791 DU); it has 1 DPAD (RGB) output and 1 LVDS output.
(removed .gen/added .encoder_type from/to rzg1_du_r8a7743_info)
--- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
drivers/gpu/drm/rcar-du/rcar_du_drv.c +23 -0
@@ -35,6 +35,28 @@* Device Information */ +static const struct rcar_du_device_info rzg1_du_r8a7743_info = { + .features =RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + |RCAR_DU_FEATURE_EXT_CTRL_REGS , + .num_crtcs =2 , + .routes = { +/* +* R8A7743 has one RGB output and one LVDS output +*/ + [RCAR_DU_OUTPUT_DPAD0 ] = { + .possible_crtcs =BIT (1 ) |BIT (0 ), + .encoder_type =DRM_MODE_ENCODER_NONE , + .port =0 , + }, + [RCAR_DU_OUTPUT_LVDS0 ] = { + .possible_crtcs =BIT (0 ), + .encoder_type =DRM_MODE_ENCODER_LVDS , + .port =1 , + }, + }, + .num_lvds =1 , +}; +static const struct rcar_du_device_info rcar_du_r8a7779_info = { .features =0 , .num_crtcs =2 ,
@@ -130,6 +152,7 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = { };static const struct of_device_id rcar_du_of_table[] = { + { .compatible ="renesas,du-r8a7743" , .data = &rzg1_du_r8a7743_info }, { .compatible ="renesas,du-r8a7779" , .data = &rcar_du_r8a7779_info }, { .compatible ="renesas,du-r8a7790" , .data = &rcar_du_r8a7790_info }, { .compatible ="renesas,du-r8a7791" , .data = &rcar_du_r8a7791_info },
Signature · 1 line
2.7.4
PATCH 3/7 ARM: dts: r8a7743: Add DU support
In reply to Fabrizio CastroAdd du node to r8a7743 SoC DT. Boards that want to enable the DU need to specify the output topology.
(changed clocks property)
--- arch/arm/boot/dts/r8a7743.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +30 -0
@@ -1330,6 +1330,36 @@ }; }; + du: display at feb00000 { + compatible = "renesas,du-r8a7743"; + reg = <0 0xfeb00000 0 0x40000>, + <0 0xfeb90000 0 0x1c>; + reg-names = "du", "lvds.0"; + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp7_clks R8A7743_CLK_DU0>, + <&mstp7_clks R8A7743_CLK_DU1>, + <&mstp7_clks R8A7743_CLK_LVDS0>; + clock-names = "du.0", "du.1", "lvds.0"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + du_out_rgb: endpoint { + }; + }; + port at 1 { + reg = <1>; + du_out_lvds0: endpoint { + }; + }; + }; + }; + pci0: pci at ee090000 { compatible = "renesas,pci-r8a7743", "renesas,pci-rcar-gen2";
Signature · 1 line
2.7.4
PATCH 4/7 ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
In reply to Fabrizio CastroAlthough there is a HDMI connector on the q7 carrier board it is not connected to the RZ/G1M SoC. One must use the HDMI connector on the camera daughter board.
This patch adds support for this connector.
(taken out interrupt support)
--- arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi | 73 ++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+)
arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi +73 -0
@@ -13,6 +13,37 @@ serial1 = &scif1; serial4 = &hscif1; }; + + cec_clock: cec-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12000000>; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_out: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + port at 0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + }; }; &hscif1 {
@@ -23,7 +54,49 @@ status = "okay"; }; +&i2c5 { + status = "okay"; + clock-frequency = <400000>; + + hdmi at 39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + clocks = <&cec_clock>; + clock-names = "cec"; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port at 1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con_out>; + }; + }; + }; + }; +}; + &pfc { + du_pins: du { + groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; + function = "du"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data_c", "hscif1_ctrl_c"; function = "hscif1";
Signature · 1 line
2.7.4
PATCH 4/7 ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
Quoted 4 lines · Fabrizio Castro
Although there is a HDMI connector on the q7 carrier board it is not connected to the RZ/G1M SoC. One must use the HDMI connector on the camera daughter board.
Quoted 8 lines
This patch adds support for this connector.
Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>Reviewed-by Laurent Pinchart <[email protected]>Signed-off-by Simon Horman <[email protected]>(cherry picked from commit 55cce0a07678e5fe21c7f81cc437653b485a712c)(taken out interrupt support)
Why is that? Is it a limitation of the GPIO driver in 4.4?
Ben.
Quoted 2 lines
Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>
[...]
Signature · 4 lines
Ben Hutchings, Software Developer ? Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom
We respect your privacy.?? See https://www.codethink.co.uk/privacy.htmlPATCH 4/7 ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
Hi Ben,
Thank you for your feedback.
Quoted 21 lines
-----Original Message-----
From: Ben Hutchings [mailto:ben.hutchings at codethink.co.uk]
Sent: 30 May 2018 16:46
To: Fabrizio Castro <[email protected]>
Cc: cip-dev at lists.cip-project.org; Chris Paterson <[email protected]>; Biju Das <[email protected]>
Subject: Re: [cip-dev][PATCH 4/7] ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video outputQuoted 4 lines · Fabrizio Castro
Although there is a HDMI connector on the q7 carrier board it is not connected to the RZ/G1M SoC. One must use the HDMI connector on the camera daughter board.
Quoted 8 lines
This patch adds support for this connector.
Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>Reviewed-by Laurent Pinchart <[email protected]>Signed-off-by Simon Horman <[email protected]>(cherry picked from commit 55cce0a07678e5fe21c7f81cc437653b485a712c)(taken out interrupt support)
Quoted 3 lines
Why is that? Is it a limitation of the GPIO driver in 4.4?
From the cover letter this patch belongs to:
" I had to take out interrupt (hotplug) support from the hdmi DT node as it looks like commit 9183e45db7774716d056319c237a4185baba19c7 introduced "connector" data field with struct adv7511, but drm_connector_init was left behind, and as such connector.dev is NULL, and that causes issues to function adv7511_hpd_work, preventing HDMI hotplug from working properly.
While investigating HDMI hotplugging, I have found out that when using a GPIO purely as an interrupt source the corresponding GPIO module clock is not enabled, therefore this series backports the fix for this. I yet have to check if this fix is any good to 4.4 LTS, I'll send it to stable at vger.kernel.org in case it works for 4.4 LTS too."
I have dropped the fix for the gpio driver from this series (patches 6 and 7), and I have reworked it to make it suitable for 4.4 stable, and I have sent it to Greg (he has taken it already). You were in copy in the email to Greg, I guess you will get to it at some point later today.
We are going to leave HDMI hotplugging disabled for now as the HDMI transmitter driver needs proper fixing, and we don't have time for this just now.
Thanks,
Fab
Quoted 5 lines
Ben.
Quoted 2 lines
Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>
Quoted 7 lines
[...]
--
Ben Hutchings, Software Developer Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom
We respect your privacy. See https://www.codethink.co.uk/privacy.html
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
PATCH 4/7 ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video output
Quoted 25 lines · Fabrizio Castro
Hi Ben,
Thank you for your feedback.
Quoted 21 lines
-----Original Message-----
From: Ben Hutchings [mailto:ben.hutchings at codethink.co.uk]
Sent: 30 May 2018 16:46
To: Fabrizio Castro <[email protected]>
Cc: cip-dev at lists.cip-project.org; Chris Paterson <[email protected]>; Biju Das <[email protected]>
Subject: Re: [cip-dev][PATCH 4/7] ARM: dts: iwg20d-q7-dbcm-ca: Add HDMI video outputQuoted 12 lines · Fabrizio Castro
Although there is a HDMI connector on the q7 carrier board it is not connected to the RZ/G1M SoC. One must use the HDMI connector on the camera daughter board.
This patch adds support for this connector.
Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>Reviewed-by Laurent Pinchart <[email protected]>Signed-off-by Simon Horman <[email protected]>(cherry picked from commit 55cce0a07678e5fe21c7f81cc437653b485a712c)(taken out interrupt support)
Quoted 3 lines
Quoted 1 line
Why is that???Is it a limitation of the GPIO driver in 4.4?
From the cover letter this patch belongs to:
[...]
Oops, sorry, I must remember to read the cover letter first.
Ben.
Signature · 4 lines
Ben Hutchings, Software Developer ? Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom
We respect your privacy.?? See https://www.codethink.co.uk/privacy.htmlPATCH 5/7 ARM: shmobile: defconfig: Enable CMA for DMA
In reply to Fabrizio CastroFrom: Niklas S?derlund <[email protected]>
To be able to use VIN with larger frame sizes CMA memory are needed for DMA. If this is not enabled trying to capture large frames can result in errors such as:
rcar-vin e6ef0000.video: dma_alloc_coherent of size 8388608 failed
A CMA area of 64MB are needed for v4l2-compliance to pass on all formats on the largest possible frame size of 2048x2048.
--- arch/arm/configs/shmobile_defconfig | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/configs/shmobile_defconfig +3 -0
@@ -35,6 +35,7 @@ CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_NR_CPUS=8 CONFIG_AEABI=y CONFIG_HIGHMEM=y +CONFIG_CMA=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ARM_APPENDED_DTB=y
@@ -58,6 +59,8 @@ CONFIG_IP_PNP_DHCP=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=64 CONFIG_SIMPLE_PM_BUS=y CONFIG_MTD=y CONFIG_MTD_BLOCK=y
Signature · 1 line
2.7.4
PATCH 6/7 gpio: rcar: use gpiochip data pointer
In reply to Fabrizio CastroFrom: Linus Walleij <[email protected]>
This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of().
--- drivers/gpio/gpio-rcar.c | 33 ++++++++++++--------------------- 1 file changed, 12 insertions(+), 21 deletions(-)
drivers/gpio/gpio-rcar.c +12 -21
@@ -84,8 +84,7 @@ static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,static void gpio_rcar_irq_disable (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); - struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, - gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);gpio_rcar_write (p,INTMSK , ~BIT (irqd_to_hwirq (d))); }
@@ -93,8 +92,7 @@ static void gpio_rcar_irq_disable(struct irq_data *d)static void gpio_rcar_irq_enable (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); - struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, - gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);gpio_rcar_write (p,MSKCLR ,BIT (irqd_to_hwirq (d))); }
@@ -137,8 +135,7 @@ static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,static int gpio_rcar_irq_set_type (struct irq_data *d,unsigned int type) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); - struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, - gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);unsigned int hwirq =irqd_to_hwirq (d);dev_dbg (&p->pdev->dev,"sense irq = %d, type = %d\n" , hwirq, type);
@@ -175,8 +172,7 @@ static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)static int gpio_rcar_irq_set_wake (struct irq_data *d,unsigned int on) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); - struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, - gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);int error;if (p->irq_parent) {
@@ -218,16 +214,11 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)return irqs_handled ?IRQ_HANDLED :IRQ_NONE ; } -static inline struct gpio_rcar_priv *gpio_to_priv (struct gpio_chip *chip) -{ - return container_of(chip, struct gpio_rcar_priv, gpio_chip); -} -static void gpio_rcar_config_general_input_output_mode (struct gpio_chip *chip,unsigned int gpio,bool output) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);unsigned long flags;/* follow steps in the GPIO documentation for
@@ -251,7 +242,7 @@ static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,static int gpio_rcar_request (struct gpio_chip *chip,unsigned offset) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);int error; error =pm_runtime_get_sync (&p->pdev->dev);
@@ -267,7 +258,7 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)static void gpio_rcar_free (struct gpio_chip *chip,unsigned offset) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);pinctrl_free_gpio (chip->base + offset);
@@ -291,15 +282,15 @@ static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)/* testing on r8a7790 shows that INDT does not show correct pin state * when configured as output, so use OUTDT in case of output pins */ -if (gpio_rcar_read (gpio_to_priv (chip),INOUTSEL ) & bit) -return !!(gpio_rcar_read (gpio_to_priv (chip),OUTDT ) & bit); +if (gpio_rcar_read (gpiochip_get_data (chip),INOUTSEL ) & bit) +return !!(gpio_rcar_read (gpiochip_get_data (chip),OUTDT ) & bit);else -return !!(gpio_rcar_read (gpio_to_priv (chip),INDT ) & bit); +return !!(gpio_rcar_read (gpiochip_get_data (chip),INDT ) & bit); }static void gpio_rcar_set (struct gpio_chip *chip,unsigned offset,int value) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);unsigned long flags;spin_lock_irqsave (&p->lock, flags);
@@ -466,7 +457,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) irq_chip->irq_set_wake = gpio_rcar_irq_set_wake; irq_chip->flags =IRQCHIP_SET_TYPE_MASKED |IRQCHIP_MASK_ON_SUSPEND ; - ret =gpiochip_add (gpio_chip); + ret =gpiochip_add_data (gpio_chip, p);if (ret) {dev_err (dev,"failed to add GPIO controller\n" ); goto err0;
Signature · 1 line
2.7.4
PATCH 6/7 gpio: rcar: use gpiochip data pointer
Hello Ben,
I would like to drop this patch as it is not applicable to 4.4 stable.
Thanks,
Fab
Quoted 135 lines
-----Original Message-----
From: Fabrizio Castro [mailto:fabrizio.castro at bp.renesas.com]
Sent: 15 May 2018 12:20
To: Ben Hutchings <[email protected]>
Cc: cip-dev at lists.cip-project.org; Chris Paterson <[email protected]>; Biju Das <[email protected]>; Fabrizio Castro <[email protected]>
Subject: [cip-dev][PATCH 6/7] gpio: rcar: use gpiochip data pointerFrom: Linus Walleij <[email protected]>
This makes the driver use the data pointer added to the
gpio_chipto store a pointer to the state container instead of relying oncontainer_of().Cc Ulrich Hecht <[email protected]>Cc Geert Uytterhoeven <[email protected]>Cc Hisashi Nakamura <[email protected]>Signed-off-by Linus Walleij <[email protected]>(cherry picked from commit c7b6f457cb53bceece484f4c528d1c149995e6c7)Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>--- drivers/gpio/gpio-rcar.c | 33 ++++++++++++--------------------- 1 file changed, 12 insertions(+), 21 deletions(-)drivers/gpio/gpio-rcar.c +12
-22@@ -84,8 +84,7 @@ static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,static void gpio_rcar_irq_disable (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); -struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, -gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);gpio_rcar_write (p,INTMSK , ~BIT (irqd_to_hwirq (d))); }@@ -93,8 +92,7 @@ static void gpio_rcar_irq_disable(struct irq_data *d)static void gpio_rcar_irq_enable (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); -struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, -gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);gpio_rcar_write (p,MSKCLR ,BIT (irqd_to_hwirq (d))); }@@ -137,8 +135,7 @@ static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,static int gpio_rcar_irq_set_type (struct irq_data *d,unsigned int type) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); -struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, -gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);unsigned int hwirq =irqd_to_hwirq (d);dev_dbg (&p->pdev->dev,"sense irq = %d, type = %d\n" , hwirq, type);@@ -175,8 +172,7 @@ static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)static int gpio_rcar_irq_set_wake (struct irq_data *d,unsigned int on) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d); -struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, -gpio_chip); +struct gpio_rcar_priv *p =gpiochip_get_data (gc);int error;if (p->irq_parent) {@@ -218,16 +214,11 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)return irqs_handled ?IRQ_HANDLED :IRQ_NONE ; } -static inline struct gpio_rcar_priv *gpio_to_priv (struct gpio_chip *chip) -{ -return container_of(chip, struct gpio_rcar_priv, gpio_chip); -} -static void gpio_rcar_config_general_input_output_mode (struct gpio_chip *chip,unsigned int gpio,bool output) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);unsigned long flags;/* follow steps in the GPIO documentation for @@ -251,7 +242,7 @@ static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,static int gpio_rcar_request (struct gpio_chip *chip,unsigned offset) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);int error; error =pm_runtime_get_sync (&p->pdev->dev);@@ -267,7 +258,7 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)static void gpio_rcar_free (struct gpio_chip *chip,unsigned offset) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);pinctrl_free_gpio (chip->base + offset);@@ -291,15 +282,15 @@ static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)/* testing on r8a7790 shows that INDT does not show correct pin state * when configured as output, so use OUTDT in case of output pins */ -if (gpio_rcar_read (gpio_to_priv (chip),INOUTSEL ) & bit) -return !!(gpio_rcar_read (gpio_to_priv (chip),OUTDT ) & bit); +if (gpio_rcar_read (gpiochip_get_data (chip),INOUTSEL ) & bit) +return !!(gpio_rcar_read (gpiochip_get_data (chip),OUTDT ) & bit);else -return !!(gpio_rcar_read (gpio_to_priv (chip),INDT ) & bit); +return !!(gpio_rcar_read (gpiochip_get_data (chip),INDT ) & bit); }static void gpio_rcar_set (struct gpio_chip *chip,unsigned offset,int value) { -struct gpio_rcar_priv *p =gpio_to_priv (chip); +struct gpio_rcar_priv *p =gpiochip_get_data (chip);unsigned long flags;spin_lock_irqsave (&p->lock, flags);@@ -466,7 +457,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) irq_chip->irq_set_wake = gpio_rcar_irq_set_wake; irq_chip->flags=IRQCHIP_SET_TYPE_MASKED |IRQCHIP_MASK_ON_SUSPEND ; -ret =gpiochip_add (gpio_chip); +ret =gpiochip_add_data (gpio_chip, p);if (ret) {dev_err (dev,"failed to add GPIO controller\n" ); goto err0; --
Quoted 1 line
2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
PATCH 7/7 gpio: rcar: Add Runtime PM handling for interrupts
In reply to Fabrizio CastroFrom: Geert Uytterhoeven <[email protected]>
The R-Car GPIO driver handles Runtime PM for requested GPIOs only.
When using a GPIO purely as an interrupt source, no Runtime PM handling is done, and the GPIO module's clock may not be enabled.
To fix this:
- Add .irq_request_resources() and .irq_release_resources() callbacks to handle Runtime PM when an interrupt is requested,
- Add irq_bus_lock() and sync_unlock() callbacks to handle Runtime PM when e.g. disabling/enabling an interrupt, or configuring the interrupt type.
--- drivers/gpio/gpio-rcar.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)
drivers/gpio/gpio-rcar.c +42 -0
@@ -196,6 +196,44 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on)return 0 ; } +static void gpio_rcar_irq_bus_lock (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); + +pm_runtime_get_sync (&p->pdev->dev); +} + +static void gpio_rcar_irq_bus_sync_unlock (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); + +pm_runtime_put (&p->pdev->dev); +} + + +static int gpio_rcar_irq_request_resources (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); +int error; + + error =pm_runtime_get_sync (&p->pdev->dev); +if (error <0 ) +return error; + +return 0 ; +} + +static void gpio_rcar_irq_release_resources (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); + +pm_runtime_put (&p->pdev->dev); +} +static irqreturn_t gpio_rcar_irq_handler (int irq,void *dev_id) {struct gpio_rcar_priv *p = dev_id;
@@ -455,6 +493,10 @@ static int gpio_rcar_probe(struct platform_device *pdev) irq_chip->irq_unmask = gpio_rcar_irq_enable; irq_chip->irq_set_type = gpio_rcar_irq_set_type; irq_chip->irq_set_wake = gpio_rcar_irq_set_wake; + irq_chip->irq_bus_lock = gpio_rcar_irq_bus_lock; + irq_chip->irq_bus_sync_unlock = gpio_rcar_irq_bus_sync_unlock; + irq_chip->irq_request_resources = gpio_rcar_irq_request_resources; + irq_chip->irq_release_resources = gpio_rcar_irq_release_resources; irq_chip->flags =IRQCHIP_SET_TYPE_MASKED |IRQCHIP_MASK_ON_SUSPEND ; ret =gpiochip_add_data (gpio_chip, p);
Signature · 1 line
2.7.4
PATCH 7/7 gpio: rcar: Add Runtime PM handling for interrupts
Hello Ben,
I would like to drop this patch. I am preparing a new version of this patch suitable for 4.4 stable to send to Greg. I'll put you in copy.
Thanks,
Fab
Quoted 93 lines
-----Original Message-----
From: Fabrizio Castro [mailto:fabrizio.castro at bp.renesas.com]
Sent: 15 May 2018 12:20
To: Ben Hutchings <[email protected]>
Cc: cip-dev at lists.cip-project.org; Chris Paterson <[email protected]>; Biju Das <[email protected]>; Fabrizio Castro <[email protected]>
Subject: [cip-dev][PATCH 7/7] gpio: rcar: Add Runtime PM handling for interruptsFrom: Geert Uytterhoeven <[email protected]>
The R-Car GPIO driver handles Runtime PM for requested GPIOs only.
When using a GPIO purely as an interrupt source, no Runtime PM handling is done, and the GPIO module's clock may not be enabled.
To fix this:
- Add .irq_request_resources() and .irq_release_resources() callbacks to handle Runtime PM when an interrupt is requested,
- Addirq_bus_lock()andsync_unlock()callbacks to handle Runtime PM when e.g. disabling/enabling an interrupt, or configuring the interrupt type.Fixes d5c3d84657db57bd "net: phy: Avoid polling PHY with PHY_IGNORE_INTERRUPTS"Signed-off-by Geert Uytterhoeven <[email protected]>Signed-off-by Linus Walleij <[email protected]>(cherry picked from commit b26a719bdba9aa926ceaadecc66e07623d2b8a53)Signed-off-by Fabrizio Castro <[email protected]>Reviewed-by Biju Das <[email protected]>--- drivers/gpio/gpio-rcar.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)drivers/gpio/gpio-rcar.c +42
-1@@ -196,6 +196,44 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on)return 0 ; } +static void gpio_rcar_irq_bus_lock (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); + +pm_runtime_get_sync (&p->pdev->dev); +} + +static void gpio_rcar_irq_bus_sync_unlock (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); + +pm_runtime_put (&p->pdev->dev); +} + + +static int gpio_rcar_irq_request_resources (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); +int error; + +error =pm_runtime_get_sync (&p->pdev->dev); +if (error <0 ) +return error; + +return 0 ; +} + +static void gpio_rcar_irq_release_resources (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct gpio_rcar_priv *p =gpiochip_get_data (gc); + +pm_runtime_put (&p->pdev->dev); +} +static irqreturn_t gpio_rcar_irq_handler (int irq,void *dev_id) {struct gpio_rcar_priv *p = dev_id;@@ -455,6 +493,10 @@ static int gpio_rcar_probe(struct platform_device *pdev) irq_chip->irq_unmask = gpio_rcar_irq_enable; irq_chip->irq_set_type = gpio_rcar_irq_set_type; irq_chip->irq_set_wake = gpio_rcar_irq_set_wake; +irq_chip->irq_bus_lock = gpio_rcar_irq_bus_lock; +irq_chip->irq_bus_sync_unlock = gpio_rcar_irq_bus_sync_unlock; +irq_chip->irq_request_resources = gpio_rcar_irq_request_resources; +irq_chip->irq_release_resources = gpio_rcar_irq_release_resources; irq_chip->flags=IRQCHIP_SET_TYPE_MASKED |IRQCHIP_MASK_ON_SUSPEND ; ret =gpiochip_add_data (gpio_chip, p); --
Quoted 1 line
2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
cover Add HDMI support to iwg20d
In reply to Fabrizio CastroQuoted 11 lines · Fabrizio Castro
Dear Ben,
this series adds HDMI video output to iWave's iwg20d board.
I had to take out interrupt (hotplug) support from the hdmi DT node as it looks like commit
9183e45db7774716d056319c237a4185baba19c7introduced "connector" data field with struct adv7511, butdrm_connector_initwas left behind, and as such connector.dev is NULL, and that causes issues to functionadv7511_hpd_work, preventing HDMI hotplug from working properly.
Quoted 7 lines
While investigating HDMI hotplugging, I have found out that when using a GPIO purely as an interrupt source the corresponding GPIO module clock is not enabled, therefore this series backports the fix for this. I yet have to check if this fix is any good to 4.4 LTS, I'll send it to stable at vger.kernel.org in case it works for 4.4 LTS too.
This series applies on top of tag v4.4.126-cip22.
[...]
Sorry, I didn't have time to look at this yet. I will review it when I get back from holiday on the 29th.
Ben.
Signature · 2 lines
Ben Hutchings Software Developer, Codethink Ltd.
Ben Hutchings
Appliedcover Add HDMI support to iwg20d
In reply to Fabrizio CastroQuoted 11 lines · Fabrizio Castro
Dear Ben,
this series adds HDMI video output to iWave's iwg20d board.
I had to take out interrupt (hotplug) support from the hdmi DT node as it looks like commit
9183e45db7774716d056319c237a4185baba19c7introduced "connector" data field with struct adv7511, butdrm_connector_initwas left behind, and as such connector.dev is NULL, and that causes issues to functionadv7511_hpd_work, preventing HDMI hotplug from working properly.
Quoted 7 lines
While investigating HDMI hotplugging, I have found out that when using a GPIO purely as an interrupt source the corresponding GPIO module clock is not enabled, therefore this series backports the fix for this. I yet have to check if this fix is any good to 4.4 LTS, I'll send it to stable at vger.kernel.org in case it works for 4.4 LTS too.
This series applies on top of tag v4.4.126-cip22.
[...]
I've applied patches 1-5 only, as you requested. Thanks.
Ben.
Signature · 4 lines
Ben Hutchings, Software Developer ? Codethink Ltd
https://www.codethink.co.uk/ Dale House, 35 Dale Street
Manchester, M1 2HF, United Kingdom
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