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ARM: socfpga: Make DRAM node available in SPL

PATCH New Marek Vasut 2 participants 2 messages May 29, 2018 – May 31, 2018 Arm (32-bit)

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Marek Vasut

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PATCH 1/1 ARM: socfpga: Make DRAM node available in SPL

The SPL can also parse the DRAM configuration node to figure out the memory layout, make sure it is available.

Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
---
 arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/dts/socfpga_arria10_socdk.dtsi +1 -0
index d7616dd1c5..3f59f02577 100644
@@ -34,6 +34,7 @@
 		name = "memory";
 		device_type = "memory";
 		reg = <0x0 0x40000000>; /* 1GB */
+		u-boot,dm-pre-reloc;
 	};
 
 	a10leds {
Signature · 1 line
2.17.0
#1 lore raw

PATCH 1/1 ARM: socfpga: Make DRAM node available in SPL

Quoted 20 lines · Marek Vasut

The SPL can also parse the DRAM configuration node to figure out the memory layout, make sure it is available.

Signed-off-by Marek Vasut <[email protected]>
Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>

---
 arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 +

 1 file changed, 1 insertion(+)
arch/arm/dts/socfpga_arria10_socdk.dtsi +0 -0
index d7616dd1c5..3f59f02577 100644
@@ -34,6 +34,7 @@
  		name = "memory";
  		device_type = "memory";

  reg = <0x0 0x40000000>; /* 1GB */

arch/arm/dts/socfpga_arria10_socdk.dtsi +1 -0
+		u-boot,dm-pre-reloc;
Quoted 3 lines

  };

  a10leds {

Reviewed-by Chin Liang See <[email protected]>

Thanks
Chin Liang