clk: qcom: Move frequency table macro to common file
Subsystems (3)
PATCH 1/1 clk: qcom: Move frequency table macro to common file
Frequency table macro is used by multiple clock drivers, move frequency table macro to common header file.
Change-Id I78d76f04b6c335c05dd9325025be7db1e99cbeac
Signed-off-by Taniya Das <[email protected]>
--- drivers/clk/qcom/clk-rcg.h | 2 ++ drivers/clk/qcom/gcc-apq8084.c | 2 -- drivers/clk/qcom/gcc-ipq4019.c | 2 -- drivers/clk/qcom/gcc-ipq8074.c | 2 -- drivers/clk/qcom/gcc-msm8916.c | 2 -- drivers/clk/qcom/gcc-msm8974.c | 2 -- drivers/clk/qcom/gcc-msm8994.c | 2 -- drivers/clk/qcom/gcc-msm8996.c | 2 -- drivers/clk/qcom/gcc-msm8998.c | 2 -- drivers/clk/qcom/gcc-sdm845.c | 2 -- drivers/clk/qcom/mmcc-apq8084.c | 2 -- drivers/clk/qcom/mmcc-msm8974.c | 2 -- drivers/clk/qcom/mmcc-msm8996.c | 2 -- drivers/clk/qcom/videocc-sdm845.c | 2 -- 14 files changed, 2 insertions(+), 26 deletions(-)
drivers/clk/qcom/clk-rcg.h +2 -0
@@ -7,6 +7,8 @@#include <linux/clk-provider.h> #include "clk-regmap.h" +#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } +struct freq_tbl {unsigned long freq;u8 src;
drivers/clk/qcom/gcc-apq8084.c +0 -2
@@ -106,8 +106,6 @@ enum { "sleep_clk_src", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static struct clk_pll gpll0 = { .l_reg =0x0004 , .m_reg =0x0008 ,
drivers/clk/qcom/gcc-ipq4019.c +0 -2
@@ -179,8 +179,6 @@ struct clk_fepll { "ddrpllapss", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = {F (48000000 ,P_XO ,1 ,0 ,0 ),F (200000000 ,P_FEPLL200 ,1 ,0 ,0 ),
drivers/clk/qcom/gcc-ipq8074.c +0 -2
@@ -32,8 +32,6 @@#include "clk-regmap-mux.h" #include "reset.h" -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -enum {P_XO ,P_GPLL0 ,
drivers/clk/qcom/gcc-msm8916.c +0 -2
@@ -264,8 +264,6 @@ enum { "sleep_clk", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static struct clk_pll gpll0 = { .l_reg =0x21004 , .m_reg =0x21008 ,
drivers/clk/qcom/gcc-msm8974.c +0 -2
@@ -62,8 +62,6 @@ enum { "gpll4_vote", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static struct clk_pll gpll0 = { .l_reg =0x0004 , .m_reg =0x0008 ,
drivers/clk/qcom/gcc-msm8994.c +0 -2
@@ -57,8 +57,6 @@ enum { "gpll4", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static struct clk_fixed_factor xo = { .mult =1 , .div =1 ,
drivers/clk/qcom/gcc-msm8996.c +0 -2
@@ -32,8 +32,6 @@#include "reset.h" #include "gdsc.h" -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -enum {P_XO ,P_GPLL0 ,
drivers/clk/qcom/gcc-msm8998.c +0 -2
@@ -25,8 +25,6 @@#include "reset.h" #include "gdsc.h" -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -enum {P_AUD_REF_CLK ,P_CORE_BI_PLL_TEST_SE ,
drivers/clk/qcom/gcc-sdm845.c +0 -2
@@ -25,8 +25,6 @@#include "gdsc.h" #include "reset.h" -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -enum {P_BI_TCXO ,P_AUD_REF_CLK ,
drivers/clk/qcom/mmcc-apq8084.c +0 -2
@@ -219,8 +219,6 @@ enum { "sleep_clk_src", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static struct clk_pll mmpll0 = { .l_reg =0x0004 , .m_reg =0x0008 ,
drivers/clk/qcom/mmcc-msm8974.c +0 -2
@@ -184,8 +184,6 @@ enum { "dsi1pllbyte", }; -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -static struct clk_pll mmpll0 = { .l_reg =0x0004 , .m_reg =0x0008 ,
drivers/clk/qcom/mmcc-msm8996.c +0 -2
@@ -34,8 +34,6 @@#include "reset.h" #include "gdsc.h" -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -enum {P_XO ,P_MMPLL0 ,
drivers/clk/qcom/videocc-sdm845.c +0 -2
@@ -18,8 +18,6 @@#include "clk-pll.h" #include "gdsc.h" -#define F (f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } -enum {P_BI_TCXO ,P_CORE_BI_PLL_TEST_SE ,
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