Net: phy: ti: Fix fifo_depth register write
A message that is not in the archive (sent off-list or not yet received): [email protected]
PATCH 4/12 Net: phy: ti: Fix fifo_depth register write
Quoted 20 lines · u-boot-request at lists.denx.de
Message: 52
Date: Thu, 14 Jun 2018 11:48:48 +0200
From: Janine Hagemann <[email protected]>
To: albert.u.boot at aribaud.net, sjg at chromium.org,
philipp.tomsich at theobroma-systems.com, w.egorov at phytec.de, joe.hershberger at ni.com, u-boot at lists.denx.de
Subject: [U-Boot] [PATCH 04/12] Net: phy: ti: Fixfifo_depthregister
write
Message-ID: <[email protected]>The register was not read before the writing, so the previous value was overwritten.
(quoted diff) +3
-0@@ -233,9 +235,14 @@ static int dp83867_config(struct phy_device *phydev) val | DP83867_SW_RESTART); if (phy_interface_is_rgmii(phydev)) { + val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL); + if (val < 0) + return val;
Review static int dp83867_config(struct phy_device *phydev) · line 248
Quoted 10 lines
(quoted diff) +4
-2+ val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK; + val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT); ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, - (DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) | - (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); + val); + if (ret) goto err_out; } else if (phy_interface_is_sgmii(phydev)) {
If any of the bits that prevent the phy from working are set, like DEEP_POWER_DOWN_EN, POWER_SAVE_MODE, and so on, they won't be reset anymore. I.e., put phy in power save mode, reboot, phy doesn't work anymore. I think the code here is suppose to be configuring the phy, rather than changing a configuration that was done elsewhere.
PATCH 4/12 Net: phy: ti: Fix fifo_depth register write
Quoted 11 lines · Trent Piepho
Quoted 10 lines · u-boot-request at lists.denx.de
Message: 52
Date: Thu, 14 Jun 2018 11:48:48 +0200
From: Janine Hagemann <[email protected]>
To: albert.u.boot at aribaud.net, sjg at chromium.org,
philipp.tomsich at theobroma-systems.com, w.egorov at phytec.de, joe.hershberger at ni.com, u-boot at lists.denx.de
Subject: [U-Boot] [PATCH 04/12] Net: phy: ti: Fixfifo_depthregister
write
Message-ID: <[email protected]>
Quoted 2 lines
Quoted 2 lines
The register was not read before the writing, so the previous value was overwritten.
Was this changed because of some problem? Please include more details in the change log.
Quoted 27 lines
Quoted 7 lines
(quoted diff) +3
-0@@ -233,9 +235,14 @@ static int dp83867_config(struct phy_device *phydev) val | DP83867_SW_RESTART); if (phy_interface_is_rgmii(phydev)) { + val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL); + if (val < 0) + return val;Review static int dp83867_config(struct phy_device *phydev) · line 248
Quoted 10 lines
(quoted diff) +4
-2+ val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK; + val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT); ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, - (DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) | - (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); + val); + if (ret) goto err_out; } else if (phy_interface_is_sgmii(phydev)) {If any of the bits that prevent the phy from working are set, like
DEEP_POWER_DOWN_EN,POWER_SAVE_MODE, and so on, they won't be reset anymore. I.e., put phy in power save mode, reboot, phy doesn't work anymore. I think the code here is suppose to be configuring the phy, rather than changing a configuration that was done elsewhere.
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
https://lists.denx.de/listinfo/u-boot