x86,tlb,mm: make lazy TLB mode even lazier
Subsystems (9)
v3 cover x86,tlb,mm: make lazy TLB mode even lazier
Song noticed switch_mm_irqs_off taking a lot of CPU time in recent kernels, using 1.9% of a 48 CPU system during a netperf run. Digging into the profile, the atomic operations in cpumask_clear_cpu and cpumask_set_cpu are responsible for about half of that CPU use.
However, the CPUs running netperf are simply switching back and forth between netperf and the idle task, which does not require any changes to the mm_cpumask if lazy TLB mode were used.
Additionally, the init_mm cpumask ends up being the most heavily contended one in the system, for no reason at all.
Making really lazy TLB mode work again on modern kernels, by sending a shootdown IPI only when page table pages are being unmapped, we get back some performance.
v3 of the series addresses Andy Lutomirski's latest comments, and seems to work well.
On memcache workloads on 2 socket systems, this patch series seems to reduce total system CPU use by 1-2%. On Song's netbench tests, CPU use in the context switch time is about cut in half.
These patches also provide a little memory savings by shrinking the size of mm_struct, especially on distro kernels compiled with a gigantically large NR_CPUS.
PATCH v3 1/7 mm: allocate mm_cpumask dynamically based on nr_cpu_ids
The mm_struct always contains a cpumask bitmap, regardless of CONFIG_CPUMASK_OFFSTACK. That means the first step can be to simplify things, and simply have one bitmask at the end of the mm_struct for the mm_cpumask.
This does necessitate moving everything else in mm_struct into an anonymous sub-structure, which can be randomized when struct randomization is enabled.
The second step is to determine the correct size for the mm_struct slab object from the size of the mm_struct (excluding the cpu bitmap) and the size the cpumask.
For init_mm we can simply allocate the maximum size this kernel is compiled for, since we only have one init_mm in the system, anyway.
--- include/linux/mm_types.h | 237 ++++++++++++++++++++++++----------------------- kernel/fork.c | 15 +-- mm/init-mm.c | 11 +++ 3 files changed, 140 insertions(+), 123 deletions(-)
include/linux/mm_types.h +120 -117
@@ -335,176 +335,179 @@ struct core_state {struct kioctx_table ;struct mm_struct { -struct vm_area_struct *mmap;/* list of VMAs */ -struct rb_root mm_rb; -u32 vmacache_seqnum;/* per-thread vmacache */ +struct { +struct vm_area_struct *mmap;/* list of VMAs */ +struct rb_root mm_rb; +u32 vmacache_seqnum;/* per-thread vmacache */ #ifdef CONFIG_MMU -unsigned long (*get_unmapped_area) (struct file *filp, +unsigned long (*get_unmapped_area) (struct file *filp,unsigned long addr,unsigned long len,unsigned long pgoff,unsigned long flags);#endif -unsigned long mmap_base;/* base of mmap area */ -unsigned long mmap_legacy_base;/* base of mmap area in bottom-up allocations */ +unsigned long mmap_base;/* base of mmap area */ +unsigned long mmap_legacy_base;/* base of mmap area in bottom-up allocations */ #ifdef CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES -/* Base adresses for compatible mmap() */ -unsigned long mmap_compat_base; -unsigned long mmap_compat_legacy_base; +/* Base adresses for compatible mmap() */ +unsigned long mmap_compat_base; +unsigned long mmap_compat_legacy_base;#endif -unsigned long task_size;/* size of task vm space */ -unsigned long highest_vm_end;/* highest vma end address */ -pgd_t * pgd; - -/** -* @mm_users: The number of users including userspace. -* -* Use mmget()/mmget_not_zero()/mmput() to modify. When this drops -* to 0 (i.e. when the task exits and there are no other temporary -* reference holders), we also release a reference on @mm_count -* (which may then free the &struct mm_struct if @mm_count also -* drops to 0). -*/ -atomic_t mm_users; - -/** -* @mm_count: The number of references to &struct mm_struct -* (@mm_users count as 1). -* -* Use mmgrab()/mmdrop() to modify. When this drops to 0, the -* &struct mm_struct is freed. -*/ -atomic_t mm_count; +unsigned long task_size;/* size of task vm space */ +unsigned long highest_vm_end;/* highest vma end address */ +pgd_t * pgd; + +/** +* @mm_users: The number of users including userspace. +* +* Use mmget()/mmget_not_zero()/mmput() to modify. When this +* drops to 0 (i.e. when the task exits and there are no other +* temporary reference holders), we also release a reference on +* @mm_count (which may then free the &struct mm_struct if +* @mm_count also drops to 0). +*/ +atomic_t mm_users; + +/** +* @mm_count: The number of references to &struct mm_struct +* (@mm_users count as 1). +* +* Use mmgrab()/mmdrop() to modify. When this drops to 0, the +* &struct mm_struct is freed. +*/ +atomic_t mm_count;#ifdef CONFIG_MMU -atomic_long_t pgtables_bytes;/* PTE page table pages */ +atomic_long_t pgtables_bytes;/* PTE page table pages */ #endif -int map_count;/* number of VMAs */ +int map_count;/* number of VMAs */ -spinlock_t page_table_lock;/* Protects page tables and some counters */ -struct rw_semaphore mmap_sem; +spinlock_t page_table_lock;/* Protects page tables and some +* counters +*/ +struct rw_semaphore mmap_sem; -struct list_head mmlist;/* List of maybe swapped mm's. These are globally strung -* together off init_mm.mmlist, and are protected -* by mmlist_lock -*/ +struct list_head mmlist;/* List of maybe swapped mm's. These +* are globally strung together off +* init_mm.mmlist, and are protected +* by mmlist_lock +*/ -unsigned long hiwater_rss;/* High-watermark of RSS usage */ -unsigned long hiwater_vm;/* High-water virtual memory usage */ +unsigned long hiwater_rss;/* High-watermark of RSS usage */ +unsigned long hiwater_vm;/* High-water virtual memory usage */ -unsigned long total_vm;/* Total pages mapped */ -unsigned long locked_vm;/* Pages that have PG_mlocked set */ -unsigned long pinned_vm;/* Refcount permanently increased */ -unsigned long data_vm;/* VM_WRITE & ~VM_SHARED & ~VM_STACK */ -unsigned long exec_vm;/* VM_EXEC & ~VM_WRITE & ~VM_STACK */ -unsigned long stack_vm;/* VM_STACK */ -unsigned long def_flags; +unsigned long total_vm;/* Total pages mapped */ +unsigned long locked_vm;/* Pages that have PG_mlocked set */ +unsigned long pinned_vm;/* Refcount permanently increased */ +unsigned long data_vm;/* VM_WRITE & ~VM_SHARED & ~VM_STACK */ +unsigned long exec_vm;/* VM_EXEC & ~VM_WRITE & ~VM_STACK */ +unsigned long stack_vm;/* VM_STACK */ +unsigned long def_flags; -spinlock_t arg_lock;/* protect the below fields */ -unsigned long start_code, end_code, start_data, end_data; -unsigned long start_brk, brk, start_stack; -unsigned long arg_start, arg_end, env_start, env_end; +spinlock_t arg_lock;/* protect the below fields */ +unsigned long start_code, end_code, start_data, end_data; +unsigned long start_brk, brk, start_stack; +unsigned long arg_start, arg_end, env_start, env_end; -unsigned long saved_auxv[AT_VECTOR_SIZE ];/* for /proc/PID/auxv */ +unsigned long saved_auxv[AT_VECTOR_SIZE ];/* for /proc/PID/auxv */ -/* -* Special counters, in some configurations protected by the -* page_table_lock, in other configurations by being atomic. -*/ -struct mm_rss_stat rss_stat; - -struct linux_binfmt *binfmt; +/* +* Special counters, in some configurations protected by the +* page_table_lock, in other configurations by being atomic. +*/ +struct mm_rss_stat rss_stat; -cpumask_var_t cpu_vm_mask_var; +struct linux_binfmt *binfmt; -/* Architecture-specific MM context */ -mm_context_t context; +/* Architecture-specific MM context */ +mm_context_t context; -unsigned long flags;/* Must use atomic bitops to access the bits */ +unsigned long flags;/* Must use atomic bitops to access */ -struct core_state *core_state;/* coredumping support */ +struct core_state *core_state;/* coredumping support */ #ifdef CONFIG_MEMBARRIER -atomic_t membarrier_state; +atomic_t membarrier_state;#endif #ifdef CONFIG_AIO -spinlock_t ioctx_lock; -struct kioctx_table __rcu *ioctx_table; +spinlock_t ioctx_lock; +struct kioctx_table __rcu *ioctx_table;#endif #ifdef CONFIG_MEMCG -/* -* "owner" points to a task that is regarded as the canonical -* user/owner of this mm. All of the following must be true in -* order for it to be changed: -* -* current == mm->owner -* current->mm != mm -* new_owner->mm == mm -* new_owner->alloc_lock is held -*/ -struct task_struct __rcu *owner; +/* +* "owner" points to a task that is regarded as the canonical +* user/owner of this mm. All of the following must be true in +* order for it to be changed: +* +* current == mm->owner +* current->mm != mm +* new_owner->mm == mm +* new_owner->alloc_lock is held +*/ +struct task_struct __rcu *owner;#endif -struct user_namespace *user_ns; +struct user_namespace *user_ns; -/* store ref to file /proc/<pid>/exe symlink points to */ -struct file __rcu *exe_file; +/* store ref to file /proc/<pid>/exe symlink points to */ +struct file __rcu *exe_file;#ifdef CONFIG_MMU_NOTIFIER -struct mmu_notifier_mm *mmu_notifier_mm; +struct mmu_notifier_mm *mmu_notifier_mm;#endif #if defined(CONFIG_TRANSPARENT_HUGEPAGE ) && !USE_SPLIT_PMD_PTLOCKS -pgtable_t pmd_huge_pte;/* protected by page_table_lock */ -#endif -#ifdef CONFIG_CPUMASK_OFFSTACK -struct cpumask cpumask_allocation; +pgtable_t pmd_huge_pte;/* protected by page_table_lock */ #endif #ifdef CONFIG_NUMA_BALANCING -/* -* numa_next_scan is the next time that the PTEs will be marked -* pte_numa. NUMA hinting faults will gather statistics and migrate -* pages to new nodes if necessary. -*/ -unsigned long numa_next_scan; +/* +* numa_next_scan is the next time that the PTEs will be marked +* pte_numa. NUMA hinting faults will gather statistics and +* migrate pages to new nodes if necessary. +*/ +unsigned long numa_next_scan; -/* Restart point for scanning and setting pte_numa */ -unsigned long numa_scan_offset; +/* Restart point for scanning and setting pte_numa */ +unsigned long numa_scan_offset; -/* numa_scan_seq prevents two threads setting pte_numa */ -int numa_scan_seq; +/* numa_scan_seq prevents two threads setting pte_numa */ +int numa_scan_seq;#endif -/* -* An operation with batched TLB flushing is going on. Anything that -* can move process memory needs to flush the TLB when moving a -* PROT_NONE or PROT_NUMA mapped page. -*/ -atomic_t tlb_flush_pending; +/* +* An operation with batched TLB flushing is going on. Anything +* that can move process memory needs to flush the TLB when +* moving a PROT_NONE or PROT_NUMA mapped page. +*/ +atomic_t tlb_flush_pending;#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH -/* See flush_tlb_batched_pending() */ -bool tlb_flush_batched; +/* See flush_tlb_batched_pending() */ +bool tlb_flush_batched;#endif -struct uprobes_state uprobes_state; +struct uprobes_state uprobes_state;#ifdef CONFIG_HUGETLB_PAGE -atomic_long_t hugetlb_usage; +atomic_long_t hugetlb_usage;#endif -struct work_struct async_put_work; +struct work_struct async_put_work;#if IS_ENABLED (CONFIG_HMM ) -/* HMM needs to track a few things per mm */ -struct hmm *hmm; +/* HMM needs to track a few things per mm */ +struct hmm *hmm;#endif -} __randomize_layout; + } __randomize_layout; + +/* +* The mm_cpumask needs to be at the end of mm_struct, because it +* is dynamically sized based on nr_cpu_ids. +*/ +unsigned long cpu_bitmap[]; +};extern struct mm_struct init_mm;static inline void mm_init_cpumask (struct mm_struct *mm) { -#ifdef CONFIG_CPUMASK_OFFSTACK - mm->cpu_vm_mask_var = &mm->cpumask_allocation; -#endif -cpumask_clear (mm->cpu_vm_mask_var); +cpumask_clear ((struct cpumask *)&mm->cpu_bitmap); }/* Future-safe accessor for struct mm_struct's cpu_vm_mask. */ static inline cpumask_t *mm_cpumask (struct mm_struct *mm) { -return mm->cpu_vm_mask_var; +return (struct cpumask *)&mm->cpu_bitmap; }struct mmu_gather ;
kernel/fork.c +9 -6
@@ -2253,6 +2253,8 @@ static void sighand_ctor(void *data)void __init proc_caches_init (void ) { +unsigned int mm_size; + sighand_cachep = kmem_cache_create("sighand_cache", sizeof(struct sighand_struct), 0, SLAB_HWCACHE_ALIGN|SLAB_PANIC|SLAB_TYPESAFE_BY_RCU|
@@ -2269,15 +2271,16 @@ void __init proc_caches_init(void)sizeof (struct fs_struct ),0 ,SLAB_HWCACHE_ALIGN |SLAB_PANIC |SLAB_ACCOUNT , NULL); +/* -* FIXME! The "sizeof(struct mm_struct)" currently includes the -* whole struct cpumask for the OFFSTACK case. We could change -* this to *only* allocate as much of it as required by the -* maximum number of CPU's we can ever have. The cpumask_allocation -* is at the end of the structure, exactly for that reason. +* The mm_cpumask is located at the end of mm_struct, and is +* dynamically sized based on the maximum CPU number this system +* can have, taking hotplug into account (nr_cpu_ids). */ + mm_size =sizeof (struct mm_struct ) +cpumask_size (); + mm_cachep = kmem_cache_create_usercopy("mm_struct", - sizeof(struct mm_struct), ARCH_MIN_MMSTRUCT_ALIGN, + mm_size, ARCH_MIN_MMSTRUCT_ALIGN, SLAB_HWCACHE_ALIGN|SLAB_PANIC|SLAB_ACCOUNT, offsetof(struct mm_struct, saved_auxv), sizeof_field(struct mm_struct, saved_auxv),
mm/init-mm.c +11 -0
@@ -15,6 +15,16 @@#define INIT_MM_CONTEXT (name)#endif +/* +* For dynamically allocated mm_structs, there is a dynamically sized cpumask +* at the end of the structure, the size of which depends on the maximum CPU +* number the system can see. That way we allocate only as much memory for +* mm_cpumask() as needed for the hundreds, or thousands of processes that +* a system typically runs. +* +* Since there is only one init_mm in the entire system, keep it simple +* and size this cpu_bitmask to NR_CPUS. +*/ struct mm_struct init_mm = { .mm_rb =RB_ROOT , .pgd = swapper_pg_dir,
@@ -25,5 +35,6 @@ struct mm_struct init_mm = { .arg_lock = __SPIN_LOCK_UNLOCKED(init_mm.arg_lock), .mmlist = LIST_HEAD_INIT(init_mm.mmlist), .user_ns = &init_user_ns, + .cpu_bitmap = { [BITS_TO_LONGS(NR_CPUS)] = 0}, INIT_MM_CONTEXT(init_mm) };
Signature · 1 line
2.14.4
kbuild test robot
build botRe: [PATCH 1/7] mm: allocate mm_cpumask dynamically based on nr_cpu_ids
Thank you for the patch! Yet something to improve:
Hi Rik,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.18-rc2 next-20180629]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Rik-van-Riel/x86-tlb-mm-make-lazy-TLB-mode-even-lazier/20180629-232822
config: s390-debug_defconfig (attached as .config)
compiler: s390x-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=s390
All errors (new ones prefixed by >>):
In file included from arch/s390/include/asm/fpu/internal.h:12:0,
from arch/s390/include/asm/processor.h:47,
from arch/s390/include/asm/thread_info.h:25,
from include/linux/thread_info.h:38,
from arch/s390/include/asm/preempt.h:6,
from include/linux/preempt.h:81,
from include/linux/spinlock.h:51,
from include/linux/seqlock.h:36,
from include/linux/time.h:6,
from include/linux/stat.h:19,
from include/linux/module.h:10,
from init/main.c:16:
In function 'memset',
inlined from 'start_kernel' at include/linux/bitmap.h:208:3:
>> include/linux/string.h:327:3: error: call to '__write_overflow' declared with attribute error: detected write beyond size of object passed as 1st parameter
__write_overflow();
^~~~~~~~~~~~~~~~~~vim +/__write_overflow +327 include/linux/string.h
6974f0c4 Daniel Micay 2017-07-12 322
6974f0c4 Daniel Micay 2017-07-12 323 __FORTIFY_INLINE void *memset(void *p, int c, __kernel_size_t size)
6974f0c4 Daniel Micay 2017-07-12 324 {
6974f0c4 Daniel Micay 2017-07-12 325 size_t p_size = __builtin_object_size(p, 0);
6974f0c4 Daniel Micay 2017-07-12 326 if (__builtin_constant_p(size) && p_size < size)
6974f0c4 Daniel Micay 2017-07-12 @327 __write_overflow();
6974f0c4 Daniel Micay 2017-07-12 328 if (p_size < size)
6974f0c4 Daniel Micay 2017-07-12 329 fortify_panic(__func__);
6974f0c4 Daniel Micay 2017-07-12 330 return __builtin_memset(p, c, size);
6974f0c4 Daniel Micay 2017-07-12 331 }6974f0c4 Daniel Micay 2017-07-12 332
:::::: The code at line 327 was first introduced by commit
:::::: 6974f0c4555e285ab217cee58b6e874f776ff409 include/linux/string.h: add the option of fortified string.h functions
:::::: TO: Daniel Micay <[email protected]> :::::: CC: Linus Torvalds <[email protected]>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
PATCH v3 2/7 x86,tlb: leave lazy TLB mode at page table free time
In reply to Rik van RielAndy discovered that speculative memory accesses while in lazy TLB mode can crash a system, when a CPU tries to dereference a speculative access using memory contents that used to be valid page table memory, but have since been reused for something else and point into la-la land.
The latter problem can be prevented in two ways. The first is to always send a TLB shootdown IPI to CPUs in lazy TLB mode, while the second one is to only send the TLB shootdown at page table freeing time.
The second should result in fewer IPIs, since operationgs like mprotect and madvise are very common with some workloads, but do not involve page table freeing. Also, on munmap, batching of page table freeing covers much larger ranges of virtual memory than the batching of unmapped user pages.
--- arch/x86/include/asm/tlbflush.h | 5 +++++ arch/x86/mm/tlb.c | 27 +++++++++++++++++++++++++++ include/asm-generic/tlb.h | 10 ++++++++++ mm/memory.c | 22 ++++++++++++++-------- 4 files changed, 56 insertions(+), 8 deletions(-)
arch/x86/include/asm/tlbflush.h +5 -0
@@ -554,4 +554,9 @@ extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); native_flush_tlb_others(mask, info)#endif +extern void tlb_flush_remove_tables (struct mm_struct *mm); +extern void tlb_flush_remove_tables_local (void *arg); + +#define HAVE_TLB_FLUSH_REMOVE_TABLES +#endif /* _ASM_X86_TLBFLUSH_H */
arch/x86/mm/tlb.c +27 -0
@@ -646,6 +646,33 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,put_cpu (); } +void tlb_flush_remove_tables_local (void *arg) +{ +struct mm_struct *mm = arg; + +if (this_cpu_read (cpu_tlbstate.loaded_mm) == mm && +this_cpu_read (cpu_tlbstate.is_lazy)) { +/* +* We're in lazy mode. We need to at least flush our +* paging-structure cache to avoid speculatively reading +* garbage into our TLB. Since switching to init_mm is barely +* slower than a minimal flush, just switch to init_mm. +*/ +switch_mm_irqs_off (NULL , &init_mm,NULL ); + } +} + +void tlb_flush_remove_tables (struct mm_struct *mm) +{ +int cpu =get_cpu (); +/* +* XXX: this really only needs to be called for CPUs in lazy TLB mode. +*/ +if (cpumask_any_but (mm_cpumask (mm), cpu) < nr_cpu_ids) +smp_call_function_many (mm_cpumask (mm), tlb_flush_remove_tables_local, (void *)mm,1 ); + +put_cpu (); +}static void do_flush_tlb_all (void *info) {
include/asm-generic/tlb.h +10 -0
@@ -295,4 +295,14 @@ static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,#define tlb_migrate_finish (mm) do {} while (0) +/* +* Used to flush the TLB when page tables are removed, when lazy +* TLB mode may cause a CPU to retain intermediate translations +* pointing to about-to-be-freed page table memory. +*/ +#ifndef HAVE_TLB_FLUSH_REMOVE_TABLES +#define tlb_flush_remove_tables (mm) do {} while (0) +#define tlb_flush_remove_tables_local (mm) do {} while (0) +#endif +#endif /* _ASM_GENERIC__TLB_H */
mm/memory.c +14 -8
@@ -326,16 +326,20 @@ bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page, int page_#ifdef CONFIG_HAVE_RCU_TABLE_FREE -/* -* See the comment near struct mmu_table_batch. -*/ -static void tlb_remove_table_smp_sync (void *arg) { -/* Simply deliver the interrupt */ +struct mm_struct *mm = arg; +/* +* On most architectures this does nothing. Simply delivering the +* interrupt is enough to prevent races with software page table +* walking like that done in get_user_pages_fast. +* +* See the comment near struct mmu_table_batch. +*/ +tlb_flush_remove_tables_local (mm); } -static void tlb_remove_table_one (void *table) +static void tlb_remove_table_one (void *table,struct mmu_gather *tlb) {/* * This isn't an RCU grace period and hence the page-tables cannot be
@@ -344,7 +348,7 @@ static void tlb_remove_table_one(void *table)* It is however sufficient for software page-table walkers that rely on * IRQ disabling. See the comment near struct mmu_table_batch. */ -smp_call_function (tlb_remove_table_smp_sync,NULL ,1 ); +smp_call_function (tlb_remove_table_smp_sync, tlb->mm,1 );__tlb_remove_table (table); }
@@ -365,6 +369,8 @@ void tlb_table_flush(struct mmu_gather *tlb) {struct mmu_table_batch **batch = &tlb->batch; +tlb_flush_remove_tables (tlb->mm); +if (*batch) {call_rcu_sched (&(*batch)->rcu, tlb_remove_table_rcu); *batch =NULL ;
@@ -387,7 +393,7 @@ void tlb_remove_table(struct mmu_gather *tlb, void *table)if (*batch ==NULL ) { *batch = (struct mmu_table_batch *)__get_free_page (GFP_NOWAIT | __GFP_NOWARN);if (*batch ==NULL ) { -tlb_remove_table_one (table); +tlb_remove_table_one (table, tlb);return ; } (*batch)->nr =0 ;
Signature · 1 line
2.14.4
Dave Hansen
maintainerRe: [PATCH 2/7] x86,tlb: leave lazy TLB mode at page table free time
Quoted 4 lines · Rik van Riel
The latter problem can be prevented in two ways. The first is to always send a TLB shootdown IPI to CPUs in lazy TLB mode, while the second one is to only send the TLB shootdown at page table freeing time.
I've read this a few times, and I keep having to remind myself why we "always send a TLB shootdown IPI to CPUs in lazy TLB mode". It's not strictly CPUs in lazy TLB mode, right? It's just the one that are in lazy TLB mode _and_ using the mm from which we are freeing page tables.
If you revise these again, would it make sense to add a little blurb like:
CPUs in lazy TLB mode are using the "wrong" page tables, generally from a process's mm while running true kernel code like the idle task. This is just as problematic when freeing page tables from that mm as a real non-lazy user of the page tables would be.
Quoted 5 lines
The second should result in fewer IPIs, since operationgs like mprotect and madvise are very common with some workloads, but do not involve page table freeing. Also, on munmap, batching of page table freeing covers much larger ranges of virtual memory than the batching of unmapped user pages.
Doesn't this also result in fewer IPIs because it *removes* the processor from the mm_cpumask(mm) and won't send IPIs to it any more? As it stood before, we'd IPI a lazy CPU over and over, but this way we just do it once, switch to another mm, and never touch for this mm again (unless that CPU becomes non-lazy and switches to that mm again).
Re: [PATCH 2/7] x86,tlb: leave lazy TLB mode at page table free time
Quoted 12 lines · Dave Hansen
Quoted 4 lines · Rik van Riel
The latter problem can be prevented in two ways. The first is to always send a TLB shootdown IPI to CPUs in lazy TLB mode, while the second one is to only send the TLB shootdown at page table freeing time.
I've read this a few times, and I keep having to remind myself why we "always send a TLB shootdown IPI to CPUs in lazy TLB mode". It's not strictly CPUs in lazy TLB mode, right? It's just the one that are in lazy TLB mode _and_ using the mm from which we are freeing page tables.
Quoted 8 lines
If you revise these again, would it make sense to add a little blurb like:
CPUs in lazy TLB mode are using the "wrong" page tables, generally from a process's mm while running true kernel code like the idle task. This is just as problematic when freeing page tables from that mm as a real non-lazy user of the page tables would be.
If we get to a v4, I will do that.
Quoted 6 lines
Quoted 5 lines
The second should result in fewer IPIs, since operationgs like mprotect and madvise are very common with some workloads, but do not involve page table freeing. Also, on munmap, batching of page table freeing covers much larger ranges of virtual memory than the batching of unmapped user pages.
Quoted 7 lines
Doesn't this also result in fewer IPIs because it *removes* the processor from the
mm_cpumask(mm)and won't send IPIs to it any more? As it stood before, we'd IPI a lazy CPU over and over, but this way we
just do it once, switch to another mm, and never touch for this mm again
(unless that CPU becomes non-lazy and switches to that mm again).
With this patch series, we never remove a CPU from the mm_cpumask(mm) while in lazy TLB mode, but we also do not send TLB shootdowns too CPUs in lazy TLB mode, unless we are freeing page tables - when that happens, the CPU will remove itself from the mm_cpumask.
Signature · 1 line
All Rights Reversed.
PATCH v3 3/7 x86,mm: restructure switch_mm_irqs_off
In reply to Rik van RielMove some code that will be needed for the lazy -> !lazy state transition when a lazy TLB CPU has gotten out of date.
No functional changes, since the if (real_prev == next) branch always returns.
--- arch/x86/mm/tlb.c | 60 +++++++++++++++++++++++++++---------------------------- 1 file changed, 30 insertions(+), 30 deletions(-)
arch/x86/mm/tlb.c +30 -30
@@ -187,6 +187,8 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,u16 prev_asid =this_cpu_read (cpu_tlbstate.loaded_mm_asid);unsigned cpu =smp_processor_id ();u64 next_tlb_gen; +bool need_flush; +u16 new_asid;/* * NB: The scheduler will call us with prev == next when switching
@@ -252,8 +254,6 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,return ; }else { -u16 new_asid; -bool need_flush;u64 last_ctx_id =this_cpu_read (cpu_tlbstate.last_ctx_id);/*
@@ -297,41 +297,41 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, next_tlb_gen =atomic64_read (&next->context.tlb_gen);choose_new_asid (next, next_tlb_gen, &new_asid, &need_flush); + } -if (need_flush) { -this_cpu_write (cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); -this_cpu_write (cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); -load_new_mm_cr3 (next->pgd, new_asid, true); - -/* -* NB: This gets called via leave_mm() in the idle path -* where RCU functions differently. Tracing normally -* uses RCU, so we need to use the _rcuidle variant. -* -* (There is no good reason for this. The idle code should -* be rearranged to call this before rcu_idle_enter().) -*/ -trace_tlb_flush_rcuidle (TLB_FLUSH_ON_TASK_SWITCH ,TLB_FLUSH_ALL ); - }else { -/* The new ASID is already up to date. */ -load_new_mm_cr3 (next->pgd, new_asid, false); - -/* See above wrt _rcuidle. */ -trace_tlb_flush_rcuidle (TLB_FLUSH_ON_TASK_SWITCH ,0 ); - } +if (need_flush) { +this_cpu_write (cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); +this_cpu_write (cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); +load_new_mm_cr3 (next->pgd, new_asid, true);/* -* Record last user mm's context id, so we can avoid -* flushing branch buffer with IBPB if we switch back -* to the same user. +* NB: This gets called via leave_mm() in the idle path +* where RCU functions differently. Tracing normally +* uses RCU, so we need to use the _rcuidle variant. +* +* (There is no good reason for this. The idle code should +* be rearranged to call this before rcu_idle_enter().) */ -if (next != &init_mm) -this_cpu_write (cpu_tlbstate.last_ctx_id, next->context.ctx_id); +trace_tlb_flush_rcuidle (TLB_FLUSH_ON_TASK_SWITCH ,TLB_FLUSH_ALL ); + }else { +/* The new ASID is already up to date. */ +load_new_mm_cr3 (next->pgd, new_asid, false); -this_cpu_write (cpu_tlbstate.loaded_mm, next); -this_cpu_write (cpu_tlbstate.loaded_mm_asid, new_asid); +/* See above wrt _rcuidle. */ +trace_tlb_flush_rcuidle (TLB_FLUSH_ON_TASK_SWITCH ,0 ); } +/* +* Record last user mm's context id, so we can avoid +* flushing branch buffer with IBPB if we switch back +* to the same user. +*/ +if (next != &init_mm) +this_cpu_write (cpu_tlbstate.last_ctx_id, next->context.ctx_id); + +this_cpu_write (cpu_tlbstate.loaded_mm, next); +this_cpu_write (cpu_tlbstate.loaded_mm_asid, new_asid); +load_mm_cr4 (next);switch_ldt (real_prev, next); }
Signature · 1 line
2.14.4
Re: [PATCH 3/7] x86,mm: restructure switch_mm_irqs_off
Quoted 5 lines · Rik van Riel
Move some code that will be needed for the lazy -> !lazy state transition when a lazy TLB CPU has gotten out of date.
No functional changes, since the if (
real_prev== next) branch always returns.
The lower indentation looks nice.
PATCH v3 4/7 x86,tlb: make lazy TLB mode lazier
In reply to Rik van RielLazy TLB mode can result in an idle CPU being woken up by a TLB flush, when all it really needs to do is reload %CR3 at the next context switch, assuming no page table pages got freed.
Memory ordering is used to prevent race conditions between switch_mm_irqs_off, which checks whether .tlb_gen changed, and the TLB invalidation code, which increments .tlb_gen whenever page table entries get invalidated.
The atomic increment in inc_mm_tlb_gen is its own barrier; the context switch code adds an explicit barrier between reading tlbstate.is_lazy and next->context.tlb_gen.
Unlike the 2016 version of this patch, CPUs with cpu_tlbstate.is_lazy set are not removed from the mm_cpumask(mm), since that would prevent the TLB flush IPIs at page table free time from being sent to all the CPUs that need them.
This patch reduces total CPU use in the system by about 1-2% for a memcache workload on two socket systems, and by about 1% for a heavily multi-process netperf between two systems.
--- arch/x86/include/asm/uv/uv.h | 6 ++-- arch/x86/mm/tlb.c | 82 ++++++++++++++++++++++++++++++++++++------- arch/x86/platform/uv/tlb_uv.c | 2 +- 3 files changed, 73 insertions(+), 17 deletions(-)
arch/x86/include/asm/uv/uv.h +3 -3
@@ -17,7 +17,7 @@ extern int is_uv_hubless(void);extern void uv_cpu_init (void );extern void uv_nmi_init (void );extern void uv_system_init (void ); -extern const struct cpumask *uv_flush_tlb_others (const struct cpumask *cpumask, +extern struct cpumask *uv_flush_tlb_others (struct cpumask *cpumask,const struct flush_tlb_info *info);#else /* X86_UV */
@@ -27,8 +27,8 @@ static inline int is_uv_system(void) { return 0; }static inline int is_uv_hubless (void ) {return 0 ; }static inline void uv_cpu_init (void ) { }static inline void uv_system_init (void ) { } -static inline const struct cpumask * -uv_flush_tlb_others (const struct cpumask *cpumask, +static inline struct cpumask * +uv_flush_tlb_others (struct cpumask *cpumask,const struct flush_tlb_info *info) {return cpumask; }
arch/x86/mm/tlb.c +69 -13
127 lines not on this page · raw message
arch/x86/platform/uv/tlb_uv.c +1 -1
@@ -1102,7 +1102,7 @@ static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,* Returns pointer to cpumask if some remote flushing remains to be * done. The returned pointer is valid till preemption is re-enabled. */ -const struct cpumask *uv_flush_tlb_others (const struct cpumask *cpumask, +struct cpumask *uv_flush_tlb_others (struct cpumask *cpumask,const struct flush_tlb_info *info) {unsigned int cpu =smp_processor_id ();
Signature · 1 line
2.14.4
Dave Hansen
maintainerRe: [PATCH 4/7] x86,tlb: make lazy TLB mode lazier
Quoted 9 lines · Rik van Riel
arch/x86/mm/tlb.c +9
-0+/* +* If the CPU is not in lazy TLB mode, we are just switching +* from one thread in a process to another thread in the same +* process. No TLB flush required. +*/ +if (!was_lazy) +return ; + +/*
arch/x86/mm/tlb.c void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, · line 273
Quoted 10 lines
arch/x86/mm/tlb.c +10
-0+* Read the tlb_gen to check whether a flush is needed. +* If the TLB is up to date, just use it. +* The barrier synchronizes with the tlb_gen increment in +* the TLB shootdown code. +*/ +smp_mb (); + next_tlb_gen =atomic64_read (&next->context.tlb_gen); +if (this_cpu_read (cpu_tlbstate.ctxs[prev_asid].tlb_gen) == + next_tlb_gen) +return ;
Nit: it might be nice to have this hunk in a helper like cpu_tlbstate_needs_flush(next) to keep this nice and readable.
Re: [PATCH 4/7] x86,tlb: make lazy TLB mode lazier
Quoted 21 lines · Dave Hansen
Quoted 20 lines · Rik van Riel
(quoted diff) +2
-0+ /* + * If the CPU is not in lazy TLB mode, we are justswitching
(quoted diff) +1
-0+ * from one thread in a process to another threadin the same
arch/x86/mm/tlb.c +7
-0+* process. No TLB flush required. +*/ +if (!was_lazy) +return ; + +/* +* Read the tlb_gen to check whether a flush is needed.
(quoted diff) +2
-0+ * If the TLB is up to date, just use it. + * The barrier synchronizes with the tlb_genincrement in
arch/x86/mm/tlb.c +4
-0+* the TLB shootdown code. +*/ +smp_mb (); + next_tlb_gen = atomic64_read(&next-
Quoted 8 lines
arch/x86/mm/tlb.c void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, · line 273
Quoted 5 lines
Quoted 1 line
context.tlb_gen);
(quoted diff) +1
-0+ if(
this_cpu_read(cpu_tlbstate.ctxs[prev_asid].tlb_gen)==arch/x86/mm/tlb.c +2
-0+ next_tlb_gen) +return ;Nit: it might be nice to have this hunk in a helper like
cpu_tlbstate_needs_flush(next)to keep this nice and readable.
That helper might not end up as pretty as you would like, because when the TLB is not up to date, we use the value of next_tlb_gen in the "if (need_flush)" branch below.
I would be happy to whip up a "tlb_up_to_date(mm, &next_tlb_gen)" helper as patch 8/7, though :)
Signature · 1 line
All Rights Reversed.
PATCH v3 5/7 x86,tlb: only send page table free TLB flush to lazy TLB CPUs
In reply to Rik van RielCPUs in !is_lazy have either received TLB flush IPIs earlier on during the munmap (when the user memory was unmapped), or have context switched and reloaded during that stage of the munmap.
Page table free TLB flushes only need to be sent to CPUs in lazy TLB mode, which TLB contents might not yet be up to date yet.
--- arch/x86/mm/tlb.c | 39 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-)
arch/x86/mm/tlb.c +36 -3
@@ -718,14 +718,47 @@ void tlb_flush_remove_tables_local(void *arg) } } +static void mm_fill_lazy_tlb_cpu_mask (struct mm_struct *mm, +struct cpumask * lazy_cpus) +{ +int cpu; + +for_each_cpu (cpu,mm_cpumask (mm)) { +if (!per_cpu (cpu_tlbstate.is_lazy, cpu)) +cpumask_set_cpu (cpu, lazy_cpus); + } +} +void tlb_flush_remove_tables (struct mm_struct *mm) {int cpu =get_cpu (); +cpumask_var_t lazy_cpus; + +if (cpumask_any_but (mm_cpumask (mm), cpu) >= nr_cpu_ids) +return ; + +if (!zalloc_cpumask_var (&lazy_cpus,GFP_ATOMIC )) { +/* +* If the cpumask allocation fails, do a brute force flush +* on all the CPUs that have this mm loaded. +*/ +smp_call_function_many (mm_cpumask (mm), + tlb_flush_remove_tables_local, (void *)mm,1 ); +return ; + } +/* -* XXX: this really only needs to be called for CPUs in lazy TLB mode. +* CPUs with !is_lazy either received a TLB flush IPI while the user +* pages in this address range were unmapped, or have context switched +* and reloaded %CR3 since then. +* +* Shootdown IPIs at page table freeing time only need to be sent to +* CPUs that may have out of date TLB contents. */ -if (cpumask_any_but (mm_cpumask (mm), cpu) < nr_cpu_ids) -smp_call_function_many (mm_cpumask (mm), tlb_flush_remove_tables_local, (void *)mm,1 ); +mm_fill_lazy_tlb_cpu_mask (mm, lazy_cpus); +smp_call_function_many (lazy_cpus, + tlb_flush_remove_tables_local, (void *)mm,1 ); +free_cpumask_var (lazy_cpus);put_cpu (); }
Signature · 1 line
2.14.4
Re: [PATCH 5/7] x86,tlb: only send page table free TLB flush to lazy TLB CPUs
Quoted 16 lines · Rik van Riel
arch/x86/mm/tlb.c +8
-0@@ -718,14 +718,47 @@ void tlb_flush_remove_tables_local(void *arg) } } +static void mm_fill_lazy_tlb_cpu_mask (struct mm_struct *mm, +struct cpumask * lazy_cpus) +{ +int cpu; + +for_each_cpu (cpu,mm_cpumask (mm)) { +if (!per_cpu (cpu_tlbstate.is_lazy, cpu)) +cpumask_set_cpu (cpu, lazy_cpus);
arch/x86/mm/tlb.c void tlb_flush_remove_tables_local(void *arg) · line 738
Quoted 10 lines
arch/x86/mm/tlb.c +7
-0+ } +} +void tlb_flush_remove_tables (struct mm_struct *mm) {int cpu =get_cpu (); +cpumask_var_t lazy_cpus; + +if (cpumask_any_but (mm_cpumask (mm), cpu) >= nr_cpu_ids) +return ;
A put_cpu() went missing.
arch/x86/mm/tlb.c void tlb_flush_remove_tables_local(void *arg) · line 748
Quoted 10 lines
arch/x86/mm/tlb.c +10
-0+ +if (!zalloc_cpumask_var (&lazy_cpus,GFP_ATOMIC )) { +/* +* If the cpumask allocation fails, do a brute force flush +* on all the CPUs that have this mm loaded. +*/ +smp_call_function_many (mm_cpumask (mm), + tlb_flush_remove_tables_local, (void *)mm,1 ); +return ; + }
Ditto.
-Mike
Re: [PATCH 5/7] x86,tlb: only send page table free TLB flush to lazy TLB CPUs
(bah, I see I replied to wrong patch version, but it's still valid)
Quoted 44 lines · Mike Galbraith
Quoted 16 lines · Rik van Riel
arch/x86/mm/tlb.c +8
-0@@ -718,14 +718,47 @@ void tlb_flush_remove_tables_local(void *arg) } } +static void mm_fill_lazy_tlb_cpu_mask (struct mm_struct *mm, +struct cpumask * lazy_cpus) +{ +int cpu; + +for_each_cpu (cpu,mm_cpumask (mm)) { +if (!per_cpu (cpu_tlbstate.is_lazy, cpu)) +cpumask_set_cpu (cpu, lazy_cpus);arch/x86/mm/tlb.c void tlb_flush_remove_tables_local(void *arg) · line 738
Quoted 10 lines
arch/x86/mm/tlb.c +7
-0+ } +} +void tlb_flush_remove_tables (struct mm_struct *mm) {int cpu =get_cpu (); +cpumask_var_t lazy_cpus; + +if (cpumask_any_but (mm_cpumask (mm), cpu) >= nr_cpu_ids) +return ;A
put_cpu()went missing.arch/x86/mm/tlb.c void tlb_flush_remove_tables_local(void *arg) · line 748
Quoted 10 lines
arch/x86/mm/tlb.c +10
-0+ +if (!zalloc_cpumask_var (&lazy_cpus,GFP_ATOMIC )) { +/* +* If the cpumask allocation fails, do a brute force flush +* on all the CPUs that have this mm loaded. +*/ +smp_call_function_many (mm_cpumask (mm), + tlb_flush_remove_tables_local, (void *)mm,1 ); +return ; + }Ditto.
-Mike
Re: [PATCH 5/7] x86,tlb: only send page table free TLB flush to lazy TLB CPUs
In reply to Mike GalbraithQuoted 21 lines · Mike Galbraith
Quoted 20 lines · Rik van Riel
arch/x86/mm/tlb.c +11
-0@@ -718,14 +718,47 @@ void tlb_flush_remove_tables_local(void *arg) } } +static void mm_fill_lazy_tlb_cpu_mask (struct mm_struct *mm, +struct cpumask * lazy_cpus) +{ +int cpu; + +for_each_cpu (cpu,mm_cpumask (mm)) { +if (!per_cpu (cpu_tlbstate.is_lazy, cpu)) +cpumask_set_cpu (cpu, lazy_cpus); + } +} +void tlb_flush_remove_tables (struct mm_struct *mm)
Quoted 8 lines
arch/x86/mm/tlb.c void tlb_flush_remove_tables_local(void *arg) · line 738
Quoted 6 lines
arch/x86/mm/tlb.c +4
-0{int cpu =get_cpu (); +cpumask_var_t lazy_cpus; + +if (cpumask_any_but (mm_cpumask (mm), cpu) >= nr_cpu_ids) +return ;A
put_cpu()went missing.
Doh!
Thank you for spotting that, I will fix
that in the next version!
Signature · 1 line
All Rights Reversed.
PATCH v3 6/7 x86,mm: always use lazy TLB mode
In reply to Rik van RielNow that CPUs in lazy TLB mode no longer receive TLB shootdown IPIs, except at page table freeing time, and idle CPUs will no longer get shootdown IPIs for things like mprotect and madvise, we can always use lazy TLB mode.
--- arch/x86/include/asm/tlbflush.h | 16 ---------------- arch/x86/mm/tlb.c | 15 +-------------- 2 files changed, 1 insertion(+), 30 deletions(-)
arch/x86/include/asm/tlbflush.h +0 -16
@@ -148,22 +148,6 @@ static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid)#define __flush_tlb_one_user (addr) __native_flush_tlb_one_user(addr)#endif -static inline bool tlb_defer_switch_to_init_mm (void ) -{ -/* -* If we have PCID, then switching to init_mm is reasonably -* fast. If we don't have PCID, then switching to init_mm is -* quite slow, so we try to defer it in the hopes that we can -* avoid it entirely. The latter approach runs the risk of -* receiving otherwise unnecessary IPIs. -* -* This choice is just a heuristic. The tlb code can handle this -* function returning true or false regardless of whether we have -* PCID. -*/ -return !static_cpu_has (X86_FEATURE_PCID ); -} -struct tlb_context {u64 ctx_id;u64 tlb_gen;
arch/x86/mm/tlb.c +1 -14
@@ -379,20 +379,7 @@ void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)if (this_cpu_read (cpu_tlbstate.loaded_mm) == &init_mm)return ; -if (tlb_defer_switch_to_init_mm ()) { -/* -* There's a significant optimization that may be possible -* here. We have accurate enough TLB flush tracking that we -* don't need to maintain coherence of TLB per se when we're -* lazy. We do, however, need to maintain coherence of -* paging-structure caches. We could, in principle, leave our -* old mm loaded and only switch to init_mm when -* tlb_remove_page() happens. -*/ -this_cpu_write (cpu_tlbstate.is_lazy, true); - }else { -switch_mm (NULL , &init_mm,NULL ); - } +this_cpu_write (cpu_tlbstate.is_lazy, true); }/*
Signature · 1 line
2.14.4
PATCH v3 7/7 x86,switch_mm: skip atomic operations for init_mm
In reply to Rik van RielSong noticed switch_mm_irqs_off taking a lot of CPU time in recent kernels,using 1.8% of a 48 CPU system during a netperf to localhost run. Digging into the profile, we noticed that cpumask_clear_cpu and cpumask_set_cpu together take about half of the CPU time taken by switch_mm_irqs_off.
However, the CPUs running netperf end up switching back and forth between netperf and the idle task, which does not require changes to the mm_cpumask. Furthermore, the init_mm cpumask ends up being the most heavily contended one in the system.
Simply skipping changes to mm_cpumask(&init_mm) reduces overhead.
--- arch/x86/mm/tlb.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-)
arch/x86/mm/tlb.c +7 -4
@@ -311,14 +311,17 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, }/* Stop remote flushes for the previous mm */ -VM_WARN_ON_ONCE (!cpumask_test_cpu (cpu,mm_cpumask (real_prev)) && - real_prev != &init_mm); -cpumask_clear_cpu (cpu,mm_cpumask (real_prev)); +if (real_prev != &init_mm) { +VM_WARN_ON_ONCE (!cpumask_test_cpu (cpu, +mm_cpumask (real_prev))); +cpumask_clear_cpu (cpu,mm_cpumask (real_prev)); + }/* * Start remote flushes and then read tlb_gen. */ -cpumask_set_cpu (cpu,mm_cpumask (next)); +if (next != &init_mm) +cpumask_set_cpu (cpu,mm_cpumask (next)); next_tlb_gen =atomic64_read (&next->context.tlb_gen);choose_new_asid (next, next_tlb_gen, &new_asid, &need_flush);
Signature · 1 line
2.14.4
Series looks good to me, and the performance numbers speak for themselves. For the whole thing: