cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
v6 cover cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
[v6]
* Renamed match table 'qcom_cpufreq_hw_match'.
* Renamed 'qcom_read_lut' to 'qcom_cpufreq_hw_read_lut'.
* Updated the logic to check for related CPUs at the beginning of the 'qcom_cpu_resources_init'.
* Use devm_ioremap_resource instead of devm_ioremap.
* Update the use of of_node_put to handle error conditions.
* Use policy->cached_resolved_idx in fast switch callback.
* Keep precalculated offsets 'reg_bases'.
* XO clock is taken from Device tree.
* Update documentation binding for clocks/clock-names.
* Minor comments in Kconfig.arm.
* Comments to move dev_info to dev_dbg.
[v5]
* Remove mapping different register regions of perf/lut/enable, instead map the entire HW region.
* Add reg_offset/cpufreq_qcom_std_offsets to be supplied as device data.
* Check of src == 0 during lut read.
* Add of_node_put(cpu_np) in qcom_get_related_cpus
* Update the qcom_cpu_resources_init for register offset data, and cleanup the related cpus to keep a single copy of CPUfreq.
* Replace FW with HW, update Kconfig, rename filename qcom-cpufreq-hw.c
* Update the documentation binding to reflect the changes of mapping the
* entire HW region.
[v4]
* Fixed console messages as per comments.
* Return error from qcom_resources_init()
in the cases where failed to get frequency domain.
* Rename cpu_dev to cpu_np in qcom_resources_init, qcom_get_related_cpus(). Also use temp variable freq_np in qcom_get_related_cpus().
* Update qcom_cpufreq_fw_get() to use the policy data to incoporate the hotplug use case.
* Update code to use of fast_switching.
* Check for !c->max_cores instead of cpumask_empty in qcom_get_related_cpus().
* Update the logic of assigning 'c' to qcom_freq_domain_map[cpu].
[v3]
* Remove index check from 'qcom_cpufreq_fw_target_index'.
* Update the Documentation binding to add the platform specific properties in the CPU nodes, node name "qcom,freq-domain".
* Update return value to '0' from -ENODEV from 'qcom_cpufreq_fw_get'.
* Update the logic for boost frequency to use local variables instead of cpufreq driver data in 'qcom_read_lut'.
* Update the logic in 'qcom_get_related_cpus' to find the related cpus.
* Update the reg-names to remove "_base" and also update the binding with the description of these registers.
* Update the logic in 'qcom_resources_init' to address the new device tree notation of handling the frequency domain phandles.
[v2]
* Fixed the alignment issues in "qcom_cpufreq_fw_target_index" for dev_err and also for "qcom_cpu_resources_init".
* Removed ret = 0 from qcom_get_related_cpus and added to check for cpu_mask_empty to return -ENOENT.
* Fixes qcom_cpu_resources_init function
* Remove initialization of 'index'
* Check for valid 'c'
* Removed initialization of 'prev_cc' from 'qcom_read_lut'.
Taniya Das (2):
dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 172 ++++++++++ drivers/cpufreq/Kconfig.arm | 11 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/qcom-cpufreq-hw.c | 348 +++++++++++++++++++++ 4 files changed, 532 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt create mode 100644 drivers/cpufreq/qcom-cpufreq-hw.c
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v6 1/2 dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's SoCs. This is required for managing the cpu frequency transitions which are controlled by the hardware engine.
--- .../bindings/cpufreq/cpufreq-qcom-hw.txt | 172 +++++++++++++++++++++ 1 file changed, 172 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt
Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt new file +172 -0
@@ -0,0 +1,172 @@ +Qualcomm Technologies, Inc. CPUFREQ Bindings + +CPUFREQ HW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI) +SoCs to manage frequency in hardware. It is capable of controlling frequency +for multiple clusters. + +Properties: +- compatible + Usage: required + Value type: <string> + Definition: must be "qcom,cpufreq-hw". + +- clocks + Usage: required + Value type: <phandle> From common clock binding. + Definition: clock handle for XO clock. + +- clock-names + Usage: required + Value type: <string> From common clock binding. + Definition: must be "xo". + +* Property qcom,freq-domain +Devices supporting freq-domain must set their "qcom,freq-domain" property with +phandle to a freq_domain_table in their DT node. + +* Frequency Domain Table Node + +This describes the frequency domain belonging to a device. +This node can have following properties: + +- reg + Usage: required + Value type: <prop-encoded-array> + Definition: Addresses and sizes for the memory of the HW bases. + +Example: + +Example 1: Dual-cluster, Quad-core per cluster. CPUs within a cluster switch +DCVS state together. + +/ { + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + qcom,freq-domain = <&freq_domain_table0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&L2_100>; + qcom,freq-domain = <&freq_domain_table0>; + L2_100: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&L2_200>; + qcom,freq-domain = <&freq_domain_table0>; + L2_200: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&L2_300>; + qcom,freq-domain = <&freq_domain_table0>; + L2_300: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x400>; + enable-method = "psci"; + next-level-cache = <&L2_400>; + qcom,freq-domain = <&freq_domain_table1>; + L2_400: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x500>; + enable-method = "psci"; + next-level-cache = <&L2_500>; + qcom,freq-domain = <&freq_domain_table1>; + L2_500: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x600>; + enable-method = "psci"; + next-level-cache = <&L2_600>; + qcom,freq-domain = <&freq_domain_table1>; + L2_600: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x700>; + enable-method = "psci"; + next-level-cache = <&L2_700>; + qcom,freq-domain = <&freq_domain_table1>; + L2_700: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + }; + + qcom,cpufreq-hw { + compatible = "qcom,cpufreq-hw"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + freq_domain_table0: freq_table0 { + reg = <0 0x17d43000 0 0x1400>; + }; + + freq_domain_table1: freq_table1 { + reg = <0 0x17d45800 0 0x1400>; + }; + }; +};
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v6 2/2 cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
In reply to Taniya DasThe CPUfreq HW present in some QCOM chipsets offloads the steps necessary for changing the frequency of CPUs. The driver implements the cpufreq driver interface for this hardware engine.
--- drivers/cpufreq/Kconfig.arm | 11 ++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/qcom-cpufreq-hw.c | 348 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 360 insertions(+) create mode 100644 drivers/cpufreq/qcom-cpufreq-hw.c
drivers/cpufreq/Kconfig.arm +11 -0
@@ -312,3 +312,14 @@ config ARM_PXA2xx_CPUFREQ This add the CPUFreq driver support for Intel PXA2xx SOCs. If in doubt, say N. + +config ARM_QCOM_CPUFREQ_HW + bool "QCOM CPUFreq HW driver" + depends on ARCH_QCOM + help + Support for the CPUFreq HW driver. + Some QCOM chipsets have a HW engine to offload the steps + necessary for changing the frequency of the CPUs. Firmware loaded + in this engine exposes a programming interface to the OS. + The driver implements the cpufreq interface for this HW engine. + Say Y if you want to support CPUFreq HW.
drivers/cpufreq/Makefile +1 -0
@@ -86,6 +86,7 @@ obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o obj-$(CONFIG_ARM_TI_CPUFREQ) += ti-cpufreq.o obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o +obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW) += qcom-cpufreq-hw.o ##################################################################################
drivers/cpufreq/qcom-cpufreq-hw.c new file +348 -0
348 lines not on this page · raw message
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Viresh Kumar
maintainerQuoted 56 lines · Taniya Das
drivers/cpufreq/qcom-cpufreq-hw.c new file +56
-0+static int qcom_cpu_resources_init (struct platform_device *pdev, +struct device_node *np,unsigned int cpu, +unsigned long xo_rate) +{ +struct cpufreq_qcom *c; +struct resource res; +struct device *dev = &pdev->dev; +const u16 *offsets; +cpumask_t cpus_related; +int ret, i, cpu_r; +void __iomem *base; + +cpumask_clear (&cpus_related); + + ret =qcom_get_related_cpus (np, &cpus_related); +if (ret) { +dev_err (dev,"%s failed to get related CPUs\n" , np->name); +return ret; + } + +/* Related CPUs */ + cpu_r =cpumask_first (&cpus_related); +if (cpu != cpu_r) { + qcom_freq_domain_map[cpu] = qcom_freq_domain_map[cpu_r]; +return 0 ; + } + + c =devm_kzalloc (dev,sizeof (*c),GFP_KERNEL ); +if (!c) +return -ENOMEM ; + + offsets =of_device_get_match_data (&pdev->dev); +if (!offsets) +return -EINVAL ; + +if (of_address_to_resource (np,0 , &res)) +return -ENOMEM ; + + base =devm_ioremap_resource (dev, &res); +if (!base) +return -ENOMEM ; + +for (i =REG_ENABLE ; i <REG_ARRAY_SIZE ; i++) + c->reg_bases[i] = base + offsets[i]; + +/* HW should be in enabled state to proceed */ +if (!(readl_relaxed (c->reg_bases[REG_ENABLE ]) &0x1 )) { +dev_err (dev,"%s cpufreq hardware not enabled\n" , np->name); +return -ENODEV ; + } + +cpumask_copy (&c->related_cpus, &cpus_related); + + c->max_cores =cpumask_weight (&c->related_cpus); +if (!c->max_cores) +return -ENOENT ;
drivers/cpufreq/qcom-cpufreq-hw.c line 266
Quoted 10 lines
drivers/cpufreq/qcom-cpufreq-hw.c new file +10
-0+ + c->xo_rate = xo_rate; + + ret =qcom_cpufreq_hw_read_lut (pdev, c); +if (ret) { +dev_err (dev,"%s failed to read LUT\n" , np->name); +return ret; + } + + qcom_freq_domain_map[cpu] = c;
Set this for all related CPUs here and then the check at the top of this routine will be simply:
if (qcom_freq_domain_map[cpu])
return 0;
Quoted 4 lines
drivers/cpufreq/qcom-cpufreq-hw.c new file +4
-0+ +return 0 ; +} +
Signature · 1 line
viresh
Hello Viresh,
Thanks for your review comments.
Quoted 71 lines · Viresh Kumar
Quoted 56 lines · Taniya Das
drivers/cpufreq/qcom-cpufreq-hw.c new file +56
-0+static int qcom_cpu_resources_init (struct platform_device *pdev, +struct device_node *np,unsigned int cpu, +unsigned long xo_rate) +{ +struct cpufreq_qcom *c; +struct resource res; +struct device *dev = &pdev->dev; +const u16 *offsets; +cpumask_t cpus_related; +int ret, i, cpu_r; +void __iomem *base; + +cpumask_clear (&cpus_related); + + ret =qcom_get_related_cpus (np, &cpus_related); +if (ret) { +dev_err (dev,"%s failed to get related CPUs\n" , np->name); +return ret; + } + +/* Related CPUs */ + cpu_r =cpumask_first (&cpus_related); +if (cpu != cpu_r) { + qcom_freq_domain_map[cpu] = qcom_freq_domain_map[cpu_r]; +return 0 ; + } + + c =devm_kzalloc (dev,sizeof (*c),GFP_KERNEL ); +if (!c) +return -ENOMEM ; + + offsets =of_device_get_match_data (&pdev->dev); +if (!offsets) +return -EINVAL ; + +if (of_address_to_resource (np,0 , &res)) +return -ENOMEM ; + + base =devm_ioremap_resource (dev, &res); +if (!base) +return -ENOMEM ; + +for (i =REG_ENABLE ; i <REG_ARRAY_SIZE ; i++) + c->reg_bases[i] = base + offsets[i]; + +/* HW should be in enabled state to proceed */ +if (!(readl_relaxed (c->reg_bases[REG_ENABLE ]) &0x1 )) { +dev_err (dev,"%s cpufreq hardware not enabled\n" , np->name); +return -ENODEV ; + } + +cpumask_copy (&c->related_cpus, &cpus_related); + + c->max_cores =cpumask_weight (&c->related_cpus); +if (!c->max_cores) +return -ENOENT ;drivers/cpufreq/qcom-cpufreq-hw.c line 266
Quoted 10 lines
drivers/cpufreq/qcom-cpufreq-hw.c new file +10
-0+ + c->xo_rate = xo_rate; + + ret =qcom_cpufreq_hw_read_lut (pdev, c); +if (ret) { +dev_err (dev,"%s failed to read LUT\n" , np->name); +return ret; + } + + qcom_freq_domain_map[cpu] = c;Set this for all related CPUs here and then the check at the top of this routine will be simply:
Quoted 3 lines
if (qcom_freq_domain_map[cpu])
return 0;
Please check the latest series, I have updated the code.
Quoted 4 lines
Quoted 4 lines
drivers/cpufreq/qcom-cpufreq-hw.c new file +4
-0+ +return 0 ; +} +
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --