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FAILED: patch "[PATCH] can: xilinx_can: fix incorrect clear of non-processed" failed to apply to 3.18-stable tree

PATCH [email protected] 1 participant 1 message Jul 27, 2018

Subsystems (4)
Stable branch Arm/Zynq architecture CAN network drivers Xilinx CAN driver
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The patch below does not apply to the 3.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

Quoted 1 line

From 2f4f0f338cf453bfcdbcf089e177c16f35f023c8 Mon Sep 17 00:00:00 2001

From: Anssi Hannula <[email protected]>
Date: Mon, 26 Feb 2018 14:39:59 +0200
Subject: [PATCH] can: xilinx_can: fix incorrect clear of non-processed
interrupts

xcan_interrupt() clears ERROR|RXOFLV|BSOFF|ARBLST interrupts if any of them is asserted. This does not take into account that some of them could have been asserted between interrupt status read and interrupt clear, therefore clearing them without handling them.

Fix the code to only clear those interrupts that it knows are asserted and therefore going to be processed in xcan_err_interrupt().

Fixes b1201e44f50b ("can: xilinx CAN controller support")
Signed-off-by Anssi Hannula <[email protected]>
Cc Michal Simek <[email protected]>
Cc <[email protected]>
Signed-off-by Marc Kleine-Budde <[email protected]>
drivers/net/can/xilinx_can.c +5 -5
index ea9f9d1a5ba7..cb80a9aa7281 100644
@@ -938,6 +938,7 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
 	struct net_device *ndev = (struct net_device *)dev_id;
 	struct xcan_priv *priv = netdev_priv(ndev);
 	u32 isr, ier;
+	u32 isr_errors;
 
 	/* Get the interrupt status from Xilinx CAN */
 	isr = priv->read_reg(priv, XCAN_ISR_OFFSET);

@@ -956,11 +957,10 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
 		xcan_tx_interrupt(ndev, isr);
 
 	/* Check for the type of error interrupt and Processing it */
-	if (isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
-			XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK)) {
-		priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_ERROR_MASK |
-				XCAN_IXR_RXOFLW_MASK | XCAN_IXR_BSOFF_MASK |
-				XCAN_IXR_ARBLST_MASK));
+	isr_errors = isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
+			    XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK);
+	if (isr_errors) {
+		priv->write_reg(priv, XCAN_ICR_OFFSET, isr_errors);
 		xcan_err_interrupt(ndev, isr);
 	}