FAILED: patch "[PATCH] MIPS: VDSO: Match data page cache colouring when D$ aliases" failed to apply to 4.4-stable tree
Subsystems (2)
[email protected]
maintainerThe patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
Quoted 1 line
From
0f02cfbc3d9e413d450d8d0fd660077c23f67effMon Sep 17 00:00:00 2001
From: Paul Burton <[email protected]>
Date: Thu, 30 Aug 2018 11:01:21 -0700
Subject: [PATCH] MIPS: VDSO: Match data page cache colouring when D$ aliases
When a system suffers from dcache aliasing a user program may observe stale VDSO data from an aliased cache line. Notably this can break the expectation that clock_gettime(CLOCK_MONOTONIC, ...) is, as its name suggests, monotonic.
In order to ensure that users observe updates to the VDSO data page as intended, align the user mappings of the VDSO data page such that their cache colouring matches that of the virtual address range which the kernel will use to update the data page - typically its unmapped address within kseg0.
This ensures that we don't introduce aliasing cache lines for the VDSO data page, and therefore that userland will observe updates without requiring cache invalidation.
Patchwork: https://patchwork.linux-mips.org/patch/20344/
arch/mips/kernel/vdso.c +20 -0
@@ -13,6 +13,7 @@#include <linux/err.h> #include <linux/init.h> #include <linux/ioport.h> +#include <linux/kernel.h> #include <linux/mm.h> #include <linux/sched.h> #include <linux/slab.h>
@@ -20,6 +21,7 @@#include <asm/abi.h> #include <asm/mips-cps.h> +#include <asm/page.h> #include <asm/vdso.h> /* Kernel-provided data used by the VDSO. */
@@ -128,12 +130,30 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) vvar_size = gic_size +PAGE_SIZE ; size = vvar_size + image->size; +/* +* Find a region that's large enough for us to perform the +* colour-matching alignment below. +*/ +if (cpu_has_dc_aliases) + size += shm_align_mask +1 ; + base =get_unmapped_area (NULL ,0 , size,0 ,0 );if (IS_ERR_VALUE (base)) { ret = base; goto out; } +/* +* If we suffer from dcache aliasing, ensure that the VDSO data page +* mapping is coloured the same as the kernel's mapping of that memory. +* This ensures that when the kernel updates the VDSO data userland +* will observe it without requiring cache invalidations. +*/ +if (cpu_has_dc_aliases) { + base =__ALIGN_MASK (base, shm_align_mask); + base += ((unsigned long )&vdso_data - gic_size) & shm_align_mask; + } + data_addr = base + gic_size; vdso_addr = data_addr +PAGE_SIZE ;
Hi,
Quoted 5 lines · On Sun, Sep 16, 2018 at 02:11:33PM +0200, [email protected] wrote:
The patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
Please find attached patch 00578cd864d45 ("MIPS: VDSO: Drop gic_get_usm_range() usage")
and apply to {4.4,4.9}-stable tree for solving this conflict.
Thanks!
SZ Lin (林上智)
Quoted 91 lines
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From
0f02cfbc3d9e413d450d8d0fd660077c23f67effMon Sep 17 00:00:00 2001
From: Paul Burton <[email protected]>
Date: Thu, 30 Aug 2018 11:01:21 -0700
Subject: [PATCH] MIPS: VDSO: Match data page cache colouring when D$ aliasesWhen a system suffers from dcache aliasing a user program may observe stale VDSO data from an aliased cache line. Notably this can break the expectation that
clock_gettime(CLOCK_MONOTONIC, ...)is, as its name suggests, monotonic.In order to ensure that users observe updates to the VDSO data page as intended, align the user mappings of the VDSO data page such that their cache colouring matches that of the virtual address range which the kernel will use to update the data page - typically its unmapped address within kseg0.
This ensures that we don't introduce aliasing cache lines for the VDSO data page, and therefore that userland will observe updates without requiring cache invalidation.
Signed-off-by Paul Burton <[email protected]>Reported-by Hauke Mehrtens <[email protected]>Reported-by Rene Nielsen <[email protected]>Reported-by Alexandre Belloni <[email protected]>Fixes ebb5e78cc634 ("MIPS: Initial implementation of a VDSO")Patchwork: https://patchwork.linux-mips.org/patch/20344/
Tested-by Alexandre Belloni <[email protected]>Tested-by Hauke Mehrtens <[email protected]>Cc James Hogan <[email protected]>Cc [email protected] # v4.4+arch/mips/kernel/vdso.c +20
-0@@ -13,6 +13,7 @@#include <linux/err.h> #include <linux/init.h> #include <linux/ioport.h> +#include <linux/kernel.h> #include <linux/mm.h> #include <linux/sched.h> #include <linux/slab.h> @@ -20,6 +21,7 @@#include <asm/abi.h> #include <asm/mips-cps.h> +#include <asm/page.h> #include <asm/vdso.h> /* Kernel-provided data used by the VDSO. */ @@ -128,12 +130,30 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) vvar_size = gic_size +PAGE_SIZE ; size = vvar_size + image->size; +/* +* Find a region that's large enough for us to perform the +* colour-matching alignment below. +*/ +if (cpu_has_dc_aliases) + size += shm_align_mask +1 ; + base =get_unmapped_area (NULL ,0 , size,0 ,0 );if (IS_ERR_VALUE (base)) { ret = base; goto out; } +/* +* If we suffer from dcache aliasing, ensure that the VDSO data page +* mapping is coloured the same as the kernel's mapping of that memory. +* This ensures that when the kernel updates the VDSO data userland +* will observe it without requiring cache invalidations. +*/ +if (cpu_has_dc_aliases) { + base =__ALIGN_MASK (base, shm_align_mask); + base += ((unsigned long )&vdso_data - gic_size) & shm_align_mask; + } + data_addr = base + gic_size; vdso_addr = data_addr +PAGE_SIZE ;
Signature · 5 lines
SZ Lin (林上智) <[email protected]>, http://people.debian.org/~szlin Debian Developer, debian.org.tw Administrator 4096R/ 178F 8338 B314 01E3 04FC 44BA A959 B38A 9561 F3F9
Quoted 1 line
From
890151c23e16a48ad0ba05ff60633234c1934c8bMon Sep 17 00:00:00 2001
From: Paul Burton <[email protected]>
Date: Sat, 12 Aug 2017 21:36:30 -0700
Subject: [PATCH] MIPS: VDSO: Drop gic_get_usm_range() usage
commit 00578cd864d45ae4b8fa3f684f8d6f783dd8d15d upstream
We don't really need gic_get_usm_range() to abstract discovery of the address of the GIC user-visible section now that we have access to its base address globally.
Switch to calculating it ourselves, which will allow us to stop requiring the irqchip driver to care about a counter exposed to userland for use via the VDSO.
Patchwork: https://patchwork.linux-mips.org/patch/17040/
--- arch/mips/kernel/vdso.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-)
arch/mips/kernel/vdso.c +5 -10
@@ -13,13 +13,13 @@#include <linux/err.h> #include <linux/init.h> #include <linux/ioport.h> -#include <linux/irqchip/mips-gic.h> #include <linux/mm.h> #include <linux/sched.h> #include <linux/slab.h> #include <linux/timekeeper_internal.h> #include <asm/abi.h> +#include <asm/mips-cps.h> #include <asm/vdso.h> /* Kernel-provided data used by the VDSO. */
@@ -99,9 +99,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) {struct mips_vdso_image *image = current->thread.abi->vdso;struct mm_struct *mm = current->mm; -unsigned long gic_size, vvar_size, size, base, data_addr, vdso_addr; +unsigned long gic_size, vvar_size, size, base, data_addr, vdso_addr, gic_pfn;struct vm_area_struct *vma; -struct resource gic_res;int ret;down_write (&mm->mmap_sem);
@@ -114,7 +113,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)* only map a page even though the total area is 64K, as we only need * the counter registers at the start. */ - gic_size = gic_present ?PAGE_SIZE :0 ; + gic_size =mips_gic_present () ?PAGE_SIZE :0 ; vvar_size = gic_size +PAGE_SIZE ; size = vvar_size + image->size;
@@ -137,13 +136,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)/* Map GIC user page. */ if (gic_size) { - ret =gic_get_usm_range (&gic_res); -if (ret) - goto out; + gic_pfn =virt_to_phys (mips_gic_base +MIPS_GIC_USER_OFS ) >>PAGE_SHIFT ; - ret =io_remap_pfn_range (vma, base, - gic_res.start >>PAGE_SHIFT , - gic_size, + ret =io_remap_pfn_range (vma, base, gic_pfn, gic_size,pgprot_noncached (PAGE_READONLY ));if (ret) goto out;
Signature · 1 line
2.19.0
Greg KH
maintainerQuoted 92 lines · SZ Lin (林上智)
Hi,
Quoted 5 lines · On Sun, Sep 16, 2018 at 02:11:33PM +0200, [email protected] wrote:
The patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.Please find attached patch
00578cd864d45("MIPS: VDSO: Dropgic_get_usm_range()usage")
and apply to {4.4,4.9}-stable tree for solving this conflict.Thanks!
SZ Lin (林上智)
Quoted 76 lines
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From
0f02cfbc3d9e413d450d8d0fd660077c23f67effMon Sep 17 00:00:00 2001
From: Paul Burton <[email protected]>
Date: Thu, 30 Aug 2018 11:01:21 -0700
Subject: [PATCH] MIPS: VDSO: Match data page cache colouring when D$ aliasesWhen a system suffers from dcache aliasing a user program may observe stale VDSO data from an aliased cache line. Notably this can break the expectation that
clock_gettime(CLOCK_MONOTONIC, ...)is, as its name suggests, monotonic.In order to ensure that users observe updates to the VDSO data page as intended, align the user mappings of the VDSO data page such that their cache colouring matches that of the virtual address range which the kernel will use to update the data page - typically its unmapped address within kseg0.
This ensures that we don't introduce aliasing cache lines for the VDSO data page, and therefore that userland will observe updates without requiring cache invalidation.
Signed-off-by Paul Burton <[email protected]>Reported-by Hauke Mehrtens <[email protected]>Reported-by Rene Nielsen <[email protected]>Reported-by Alexandre Belloni <[email protected]>Fixes ebb5e78cc634 ("MIPS: Initial implementation of a VDSO")Patchwork: https://patchwork.linux-mips.org/patch/20344/
Tested-by Alexandre Belloni <[email protected]>Tested-by Hauke Mehrtens <[email protected]>Cc James Hogan <[email protected]>Cc [email protected] # v4.4+arch/mips/kernel/vdso.c +9
-0@@ -13,6 +13,7 @@#include <linux/err.h> #include <linux/init.h> #include <linux/ioport.h> +#include <linux/kernel.h> #include <linux/mm.h> #include <linux/sched.h> #include <linux/slab.h> @@ -20,6 +21,7 @@#include <asm/abi.h> #include <asm/mips-cps.h> +#include <asm/page.h> #include <asm/vdso.h> /* Kernel-provided data used by the VDSO. */ @@ -128,12 +130,30 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) vvar_size = gic_size +PAGE_SIZE ; size = vvar_size + image->size; +/* +* Find a region that's large enough for us to perform the +* colour-matching alignment below. +*/ +if (cpu_has_dc_aliases) + size += shm_align_mask +1 ; + base =get_unmapped_area (NULL ,0 , size,0 ,0 );if (IS_ERR_VALUE (base)) { ret = base; goto out; }
Quoted 46 lines
Quoted 15 lines
arch/mips/kernel/vdso.c +11
-0+/* +* If we suffer from dcache aliasing, ensure that the VDSO data page +* mapping is coloured the same as the kernel's mapping of that memory. +* This ensures that when the kernel updates the VDSO data userland +* will observe it without requiring cache invalidations. +*/ +if (cpu_has_dc_aliases) { + base =__ALIGN_MASK (base, shm_align_mask); + base += ((unsigned long )&vdso_data - gic_size) & shm_align_mask; + } + data_addr = base + gic_size; vdso_addr = data_addr +PAGE_SIZE ;Signature · 5 lines
SZ Lin (林上智) <[email protected]>, http://people.debian.org/~szlin Debian Developer, debian.org.tw Administrator 4096R/ 178F 8338 B314 01E3 04FC 44BA A959 B38A 9561 F3F9Quoted 1 line
From
890151c23e16a48ad0ba05ff60633234c1934c8bMon Sep 17 00:00:00 2001From: Paul Burton <[email protected]>
Date: Sat, 12 Aug 2017 21:36:30 -0700
Subject: [PATCH] MIPS: VDSO: Dropgic_get_usm_range()usagecommit
00578cd864d45ae4b8fa3f684f8d6f783dd8d15dupstreamWe don't really need
gic_get_usm_range()to abstract discovery of the address of the GIC user-visible section now that we have access to its base address globally.Switch to calculating it ourselves, which will allow us to stop requiring the irqchip driver to care about a counter exposed to userland for use via the VDSO.
Signed-off-by Paul Burton <[email protected]>Cc Jason Cooper <[email protected]>Cc Marc Zyngier <[email protected]>Cc Thomas Gleixner <[email protected]>Patchwork: https://patchwork.linux-mips.org/patch/17040/
Signed-off-by Ralf Baechle <[email protected]>Signed-off-by SZ Lin (林上智) <[email protected]>
I do not understand. What "bug" is this fixing that this needs to be backported for?
thanks,
greg k-h
Greg KH
maintainerQuoted 11 lines · SZ Lin (林上智)
Hi,
Quoted 5 lines · On Sun, Sep 16, 2018 at 02:11:33PM +0200, [email protected] wrote:
The patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.Please find attached patch
00578cd864d45("MIPS: VDSO: Dropgic_get_usm_range()usage")
and apply to {4.4,4.9}-stable tree for solving this conflict.
Now applied, thanks.
greg k-h