arm64: dts: sdm845: Add videocc node
PATCH 1/1 arm64: dts: sdm845: Add videocc node
This adds the video clock controller node to sdm845 based on the examples in the bindings.
--- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/sdm845.dtsi +8 -0
@@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,dispcc-sdm845.h> #include <dt-bindings/clock/qcom,gcc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,videocc-sdm845.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/phy/phy-qcom-qusb2.h> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
@@ -1256,6 +1257,13 @@ #power-domain-cells = <1>; }; + videocc: clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0xab00000 0x10000>; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + tsens0: thermal-sensor@c263000 { compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; reg = <0xc263000 0x1ff>, /* TM */
--
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Stephen Boyd
maintainerQuoting Taniya Das (2018-11-05 02:35:17)
Quoted 5 lines
This adds the video clock controller node to sdm845 based on the examples in the bindings.
Signed-off-by Taniya Das <[email protected]>---
Did you mean to send "To:" Andy? Clk tree doesn't take these sorts of dts patches.
Thanks Stephen for adding Andy.
Quoted 10 lines · Stephen Boyd
Quoting Taniya Das (2018-11-05 02:35:17)
Quoted 5 lines
This adds the video clock controller node to sdm845 based on the examples in the bindings.
Signed-off-by Taniya Das <[email protected]>---
Did you mean to send "To:" Andy? Clk tree doesn't take these sorts of dts patches.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Hi,
Quoted 22 lines · Taniya Das
This adds the video clock controller node to sdm845 based on the examples in the bindings.
Signed-off-by Taniya Das <[email protected]>--- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)arch/arm64/boot/dts/qcom/sdm845.dtsi +1
-0@@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,dispcc-sdm845.h> #include <dt-bindings/clock/qcom,gcc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,videocc-sdm845.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/phy/phy-qcom-qusb2.h> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
arch/arm64/boot/dts/qcom/sdm845.dtsi line 1264
Quoted 8 lines
arch/arm64/boot/dts/qcom/sdm845.dtsi +5
-0@@ -1256,6 +1257,13 @@ #power-domain-cells = <1>; }; + videocc: clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0xab00000 0x10000>; + #clock-cells = <1>; + #power-domain-cells = <1>;
Any reason not to include "#reset-cells = <1>;" here? The bindings list it as optional but I see no reason why we should leave it off. The file "include/dt-bindings/clock/qcom,videocc-sdm845.h" seems to include some #defines for resets. Even though the driver doesn't seem like it supports it yet, it still should be fine to list it here.
arch/arm64/boot/dts/qcom/sdm845.dtsi line 1267
Quoted 3 lines
arch/arm64/boot/dts/qcom/sdm845.dtsi +2
-0+ }; + tsens0: thermal-sensor@c263000 {
Please sort your new node by unit address. Specifically "ab00000" comes before "af00000", thus I would expect you to have your node right before the dispcc.
-Doug
Stephen Boyd
maintainerQuoting Doug Anderson (2018-11-26 16:35:50)
Quoted 28 lines
Hi,
Quoted 25 lines · Taniya Das
This adds the video clock controller node to sdm845 based on the examples in the bindings.
Signed-off-by Taniya Das <[email protected]>--- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)arch/arm64/boot/dts/qcom/sdm845.dtsi +1
-0@@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,dispcc-sdm845.h> #include <dt-bindings/clock/qcom,gcc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,videocc-sdm845.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/phy/phy-qcom-qusb2.h> #include <dt-bindings/reset/qcom,sdm845-aoss.h>@@ -1256,6 +1257,13 @@ #power-domain-cells = <1>; };
Quoted 11 lines
arch/arm64/boot/dts/qcom/sdm845.dtsi line 1264
Quoted 5 lines
arch/arm64/boot/dts/qcom/sdm845.dtsi +5
-0+ videocc: clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0xab00000 0x10000>; + #clock-cells = <1>; + #power-domain-cells = <1>;Any reason not to include "#reset-cells = <1>;" here? The bindings list it as optional but I see no reason why we should leave it off. The file "
include/dt-bindings/clock/qcom,videocc-sdm845.h" seems to include some #defines for resets. Even though the driver doesn't seem like it supports it yet, it still should be fine to list it here.
We should update the binding to make it a required property. It doesn't make any sense why that property would be optional given that the hardware either has support for resets or it doesn't.
Hi,
Quoted 13 lines · Stephen Boyd
Quoted 7 lines
arch/arm64/boot/dts/qcom/sdm845.dtsi line 1264
Quoted 6 lines
arch/arm64/boot/dts/qcom/sdm845.dtsi +5
-0+ videocc: clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0xab00000 0x10000>; + #clock-cells = <1>; + #power-domain-cells = <1>;Quoted 5 lines
Any reason not to include "#reset-cells = <1>;" here? The bindings list it as optional but I see no reason why we should leave it off. The file "
include/dt-bindings/clock/qcom,videocc-sdm845.h" seems to include some #defines for resets. Even though the driver doesn't seem like it supports it yet, it still should be fine to list it here.
Quoted 3 lines
We should update the binding to make it a required property. It doesn't make any sense why that property would be optional given that the hardware either has support for resets or it doesn't.
Patch sent for the bindings change.