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drm/msm/a6xx: Build a6xx_gpu_state under the right conditionals

PATCH In review Sharat Masetty 3 participants 4 messages Nov 6, 2018 2 messages not in the archive

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DRM drivers Arm Qualcomm mailing list DRM driver for Qualcomm display hardware DRM driver for Qualcomm Adreno GPUs
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Sharat Masetty

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#0 lore raw

PATCH 1/2 drm/msm/a6xx: Build a6xx_gpu_state under the right conditionals

Build a6xx_gpu_state.c only if either of CONFIG_DEBUG_FS, CONFIG_DEV_COREDUMP is defined.

Signed-off-by Sharat Masetty <[email protected]>
---
 drivers/gpu/drm/msm/Makefile          | 5 ++++-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++--
 2 files changed, 6 insertions(+), 3 deletions(-)
drivers/gpu/drm/msm/Makefile +4 -1
index bfb0f08..404e3ae 100644
@@ -14,7 +14,6 @@ msm-y := \
 	adreno/a6xx_gpu.o \
 	adreno/a6xx_gmu.o \
 	adreno/a6xx_hfi.o \
-	adreno/a6xx_gpu_state.o \
 	hdmi/hdmi.o \
 	hdmi/hdmi_audio.o \
 	hdmi/hdmi_bridge.o \

@@ -97,6 +96,10 @@ msm-y := \
 msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
 			  disp/dpu1/dpu_dbg.o
 
+ifneq (,$(filter y,$(CONFIG_DEBUG_FS) $(CONFIG_DEV_COREDUMP)))
+msm-y += adreno/a6xx_gpu_state.o
+endif
+
 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
 msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
 msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
drivers/gpu/drm/msm/adreno/a6xx_gpu.c +2 -2
index 2c52b7c..9d1b8c9 100644
@@ -754,12 +754,12 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu, u64 *prev_cycles)
 		.destroy = a6xx_destroy,
 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)
 		.show = a6xx_show,
+		.gpu_state_get = a6xx_gpu_state_get,
+		.gpu_state_put = a6xx_gpu_state_put,
 #endif
 		.gpu_busy = a6xx_gpu_busy,
 		.gpu_get_freq = a6xx_gmu_get_freq,
 		.gpu_set_freq = a6xx_gmu_set_freq,
-		.gpu_state_get = a6xx_gpu_state_get,
-		.gpu_state_put = a6xx_gpu_state_put,
 	},
 	.get_timestamp = a6xx_get_timestamp,
 };
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#2 lore raw

PATCH 2/2 drm/msm/a6xx: Fix a typo in a6xx gpu crash state

This patch simply fixes a typo for the name of an indexed register. CP_MEMPOOOL -> CP_MEMPOOL.

Signed-off-by Sharat Masetty <[email protected]>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h +1 -1
index 68cccfa..bbbec8d 100644
@@ -370,7 +370,7 @@ struct a6xx_registers {
 };
 
 static const struct a6xx_indexed_registers a6xx_cp_mempool_indexed = {
-	"CP_MEMPOOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR,
+	"CP_MEMPOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR,
 		REG_A6XX_CP_MEM_POOL_DBG_DATA, 0x2060,
 };
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#4 lore raw

Re: [PATCH 2/2] drm/msm/a6xx: Fix a typo in a6xx gpu crash state

Quoted 4 lines · Sharat Masetty

This patch simply fixes a typo for the name of an indexed register. CP_MEMPOOOL -> CP_MEMPOOL.

Signed-off-by Sharat Masetty <[email protected]>

Reviewed by: Jordan Crouse <[email protected]>

Quoted 20 lines
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h +1 -1
index 68cccfa..bbbec8d 100644
@@ -370,7 +370,7 @@ struct a6xx_registers {
 };
 
 static const struct a6xx_indexed_registers a6xx_cp_mempool_indexed = {
-	"CP_MEMPOOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR,
+	"CP_MEMPOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR,
 		REG_A6XX_CP_MEM_POOL_DBG_DATA, 0x2060,
 };
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Reviewed-by
#5 lore raw
In reply to a message not in the archive
Quoted 2 lines · Sharat Masetty

Build a6xx_gpu_state.c only if either of CONFIG_DEBUG_FS, CONFIG_DEV_COREDUMP is defined.

Can you do the same for the other targets too? With that,

Reviewed-by Jordan Crouse <[email protected]>
Quoted 51 lines
Signed-off-by Sharat Masetty <[email protected]>
---
 drivers/gpu/drm/msm/Makefile          | 5 ++++-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++--
 2 files changed, 6 insertions(+), 3 deletions(-)
drivers/gpu/drm/msm/Makefile +4 -1
index bfb0f08..404e3ae 100644
@@ -14,7 +14,6 @@ msm-y := \
 	adreno/a6xx_gpu.o \
 	adreno/a6xx_gmu.o \
 	adreno/a6xx_hfi.o \
-	adreno/a6xx_gpu_state.o \
 	hdmi/hdmi.o \
 	hdmi/hdmi_audio.o \
 	hdmi/hdmi_bridge.o \

@@ -97,6 +96,10 @@ msm-y := \
 msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
 			  disp/dpu1/dpu_dbg.o
 
+ifneq (,$(filter y,$(CONFIG_DEBUG_FS) $(CONFIG_DEV_COREDUMP)))
+msm-y += adreno/a6xx_gpu_state.o
+endif
+
 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
 msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
 msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
drivers/gpu/drm/msm/adreno/a6xx_gpu.c +2 -2
index 2c52b7c..9d1b8c9 100644
@@ -754,12 +754,12 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu, u64 *prev_cycles)
 		.destroy = a6xx_destroy,
 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)
 		.show = a6xx_show,
+		.gpu_state_get = a6xx_gpu_state_get,
+		.gpu_state_put = a6xx_gpu_state_put,
 #endif
 		.gpu_busy = a6xx_gpu_busy,
 		.gpu_get_freq = a6xx_gmu_get_freq,
 		.gpu_set_freq = a6xx_gmu_set_freq,
-		.gpu_state_get = a6xx_gpu_state_get,
-		.gpu_state_put = a6xx_gpu_state_put,
 	},
 	.get_timestamp = a6xx_get_timestamp,
 };
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Signature · 6 lines
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
Freedreno mailing list
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