Stratix10 FPGA reconfiguration support

PATCH Superseded chee.hong.ang at intel.com 4 participants 8 messages Nov 19, 2018

Subsystems (4)

Arm (32-bit) Arm sub-architectures FPGA manager framework Arm/socfpga architecture

lore

Share & tools

lore

chee.hong.ang at intel.com

author

2018-11-19 09:43 UTC #0 lore raw

v4 cover Stratix10 FPGA reconfiguration support

From: "Ang, Chee Hong" <[email protected]>

Summary of v4 changes:
- Patch 1/4, 2/4 and 4/4 are unchanged
- Patch 3/4:
- implement socfpga_fpga_add() as global weak function.
- add arch/arm/mach-socfpga/fpga_device.c to override socfpga_fpga_add() for Cyclone/Stratix platforms

v3 patchsets:
https://lists.denx.de/pipermail/u-boot/2018-October/343561.html

Ang, Chee Hong (4):
arm: socfpga: stratix10: Add macros for mailbox's arguments
arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration

 arch/arm/mach-socfpga/Makefile                   |   4 +
 arch/arm/mach-socfpga/fpga_device.c              |  59 +++++
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h |   6 +
 arch/arm/mach-socfpga/include/mach/misc.h        |   4 -
 arch/arm/mach-socfpga/misc.c                     |  31 +--
 arch/arm/mach-socfpga/misc_s10.c                 |   2 +
 configs/socfpga_stratix10_defconfig              |   1 +
 drivers/fpga/Kconfig                             |  11 +
 drivers/fpga/Makefile                            |   1 +
 drivers/fpga/altera.c                            |   6 +
 drivers/fpga/stratix10.c                         | 288 +++++++++++++++++++++++
 include/altera.h                                 |   8 +
 12 files changed, 387 insertions(+), 34 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/fpga_device.c
 create mode 100644 drivers/fpga/stratix10.c

Signature · 1 line

2.7.4

chee.hong.ang at intel.com

author

2018-11-19 09:43 UTC #1 lore raw

PATCH v4 1/4 arm: socfpga: stratix10: Add macros for mailbox's arguments

From: "Ang, Chee Hong" <[email protected]>

Add macros for specifying number of arguments in mailbox command.

Signed-off-by Ang, Chee Hong <[email protected]>

---
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 6 ++++++
 1 file changed, 6 insertions(+)

arch/arm/mach-socfpga/include/mach/mailbox_s10.h +6 -0

index 660df35..ae728a5 100644
@@ -107,6 +107,12 @@ enum ALT_SDM_MBOX_RESP_CODE {
 #define RECONFIG_STATUS_PIN_STATUS			2
 #define RECONFIG_STATUS_SOFTFUNC_STATUS			3
 
+/* Macros for specifying number of arguments in mailbox command */
+#define MBOX_NUM_ARGS(n, b)				(((n) & 0xFF) << (b))
+#define MBOX_DIRECT_COUNT(n)				MBOX_NUM_ARGS((n), 0)
+#define MBOX_ARG_DESC_COUNT(n)				MBOX_NUM_ARGS((n), 8)
+#define MBOX_RESP_DESC_COUNT(n)				MBOX_NUM_ARGS((n), 16)
+
 #define MBOX_CFGSTAT_STATE_IDLE				0x00000000
 #define MBOX_CFGSTAT_STATE_CONFIG			0x10000000
 #define MBOX_CFGSTAT_STATE_FAILACK			0x08000000

Signature · 1 line

2.7.4

chee.hong.ang at intel.com

author

2018-11-19 09:43 UTC #2 lore raw

PATCH v4 2/4 arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver

In reply to chee.hong.ang at intel.com

From: "Ang, Chee Hong" <[email protected]>

Enable FPGA reconfiguration support for Stratix 10 SoC.

Signed-off-by Ang, Chee Hong <[email protected]>

---
 drivers/fpga/Kconfig     |  11 ++
 drivers/fpga/Makefile    |   1 +
 drivers/fpga/stratix10.c | 288 +++++++++++++++++++++++++++++++++++++++++++++++
 include/altera.h         |   4 +
 4 files changed, 304 insertions(+)
 create mode 100644 drivers/fpga/stratix10.c

drivers/fpga/Kconfig +11 -0

index 50e9019..8f59193 100644
@@ -31,6 +31,17 @@ config FPGA_CYCLON2
 	  Enable FPGA driver for loading bitstream in BIT and BIN format
 	  on Altera Cyclone II device.
 
+config FPGA_STRATIX10
+	bool "Enable Altera FPGA driver for Stratix 10"
+	depends on TARGET_SOCFPGA_STRATIX10
+	select FPGA_ALTERA
+	help
+	  Say Y here to enable the Altera Stratix 10 FPGA specific driver
+
+	  This provides common functionality for Altera Stratix 10 devices.
+	  Enable FPGA driver for writing bitstream into Altera Stratix10
+	  device.
+
 config FPGA_XILINX
 	bool "Enable Xilinx FPGA drivers"
 	select FPGA

drivers/fpga/Makefile +1 -0

index 97d7d5d..5a778c1 100644
@@ -17,6 +17,7 @@ obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
 obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
 obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
 obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
+obj-$(CONFIG_FPGA_STRATIX10) += stratix10.o
 obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o

drivers/fpga/stratix10.c new file +288 -0

288 lines not on this page · raw message

include/altera.h +4 -0

index ead5d3d..233b467 100644
@@ -116,4 +116,8 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
 int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
 #endif
 
+#ifdef CONFIG_FPGA_STRATIX10
+int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
+#endif
+
 #endif /* _ALTERA_H_ */

Signature · 1 line

2.7.4

chee.hong.ang at intel.com

author

2018-11-19 09:43 UTC #3 lore raw

PATCH v4 3/4 arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table

In reply to chee.hong.ang at intel.com

From: "Ang, Chee Hong" <[email protected]>

Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC.

Signed-off-by Ang, Chee Hong <[email protected]>

---
 arch/arm/mach-socfpga/Makefile            |  4 +++
 arch/arm/mach-socfpga/fpga_device.c       | 59 +++++++++++++++++++++++++++++++
 arch/arm/mach-socfpga/include/mach/misc.h |  4 ---
 arch/arm/mach-socfpga/misc.c              | 31 +---------------
 arch/arm/mach-socfpga/misc_s10.c          |  2 ++
 drivers/fpga/altera.c                     |  6 ++++
 include/altera.h                          |  4 +++
 7 files changed, 76 insertions(+), 34 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/fpga_device.c

arch/arm/mach-socfpga/Makefile +4 -0

index e667204..2ff1b3f 100644
@@ -10,6 +10,10 @@ obj-y	+= clock_manager.o
 obj-y	+= misc.o
 obj-y	+= reset_manager.o
 
+ifdef CONFIG_FPGA
+obj-y	+= fpga_device.o
+endif
+
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
 obj-y	+= clock_manager_gen5.o
 obj-y	+= misc_gen5.o

arch/arm/mach-socfpga/fpga_device.c new file +59 -0

59 lines not on this page · raw message

arch/arm/mach-socfpga/include/mach/misc.h +0 -4

index 4fc9570..6fa9495 100644
@@ -15,11 +15,7 @@ struct bsel {
 
 extern struct bsel bsel_str[];
 
-#ifdef CONFIG_FPGA
 void socfpga_fpga_add(void);
-#else
-static inline void socfpga_fpga_add(void) {}
-#endif
 
 #ifdef CONFIG_TARGET_SOCFPGA_GEN5
 void socfpga_sdram_remap_zero(void);

arch/arm/mach-socfpga/misc.c +1 ~~-30~~

index a4f6d5c..55f846a 100644
@@ -87,36 +87,7 @@ int overwrite_console(void)
 }
 #endif
 
-#ifdef CONFIG_FPGA
-/*
- * FPGA programming support for SoC FPGA Cyclone V
- */
-static Altera_desc altera_fpga[] = {
-	{
-		/* Family */
-		Altera_SoCFPGA,
-		/* Interface type */
-		fast_passive_parallel,
-		/* No limitation as additional data will be ignored */
-		-1,
-		/* No device function table */
-		NULL,
-		/* Base interface address specified in driver */
-		NULL,
-		/* No cookie implementation */
-		0
-	},
-};
-
-/* add device descriptor to FPGA device table */
-void socfpga_fpga_add(void)
-{
-	int i;
-	fpga_init();
-	for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
-		fpga_add(fpga_altera, &altera_fpga[i]);
-}
-#endif
+__weak void socfpga_fpga_add(void) {}
 
 int arch_cpu_init(void)
 {

arch/arm/mach-socfpga/misc_s10.c +2 -0

index e599362..e611d2c 100644
@@ -125,6 +125,8 @@ int arch_misc_init(void)
 
 int arch_early_init_r(void)
 {
+	socfpga_fpga_add();
+
 	return 0;
 }

drivers/fpga/altera.c +6 -0

index 9605554..7c8f518 100644
@@ -39,6 +39,9 @@ static const struct altera_fpga {
 #if defined(CONFIG_FPGA_STRATIX_V)
 	{ Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
 #endif
+#if defined(CONFIG_FPGA_STRATIX10)
+	{ Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
+#endif
 #if defined(CONFIG_FPGA_SOCFPGA)
 	{ Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
 #endif

@@ -154,6 +157,9 @@ int altera_info(Altera_desc *desc)
 	case fast_passive_parallel_security:
 		printf("Fast Passive Parallel with Security (FPPS)\n");
 		break;
+	case secure_device_manager_mailbox:
+		puts("Secure Device Manager (SDM) Mailbox\n");
+		break;
 		/* Add new interface types here */
 	default:
 		printf("Unsupported interface type, %d\n", desc->iface);

include/altera.h +4 -0

index 233b467..22d55cf 100644
@@ -39,6 +39,8 @@ enum altera_iface {
 	fast_passive_parallel,
 	/* fast passive parallel with security (FPPS) */
 	fast_passive_parallel_security,
+	/* secure device manager (SDM) mailbox */
+	secure_device_manager_mailbox,
 	/* insert all new types before this */
 	max_altera_iface_type,
 };

@@ -54,6 +56,8 @@ enum altera_family {
 	Altera_StratixII,
 	/* StratixV Family */
 	Altera_StratixV,
+	/* Stratix10 Family */
+	Intel_FPGA_Stratix10,
 	/* SoCFPGA Family */
 	Altera_SoCFPGA,

Signature · 1 line

2.7.4

Simon Goldschmidt

2018-11-19 09:57 UTC #4 lore raw

PATCH v4 3/4 arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table

Quoted 143 lines · On Mon, Nov 19, 2018 at 10:46 AM <[email protected]> wrote:

From: "Ang, Chee Hong" <[email protected]>

Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC.

Signed-off-by Ang, Chee Hong <[email protected]>

---
 arch/arm/mach-socfpga/Makefile            |  4 +++
 arch/arm/mach-socfpga/fpga_device.c       | 59 +++++++++++++++++++++++++++++++
 arch/arm/mach-socfpga/include/mach/misc.h |  4 ---
 arch/arm/mach-socfpga/misc.c              | 31 +---------------
 arch/arm/mach-socfpga/misc_s10.c          |  2 ++
 drivers/fpga/altera.c                     |  6 ++++
 include/altera.h                          |  4 +++
 7 files changed, 76 insertions(+), 34 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/fpga_device.c

arch/arm/mach-socfpga/Makefile +4 -0

index e667204..2ff1b3f 100644
@@ -10,6 +10,10 @@ obj-y        += clock_manager.o
 obj-y  += misc.o
 obj-y  += reset_manager.o
 
+ifdef CONFIG_FPGA
+obj-y  += fpga_device.o
+endif
+
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
 obj-y  += clock_manager_gen5.o
 obj-y  += misc_gen5.o

arch/arm/mach-socfpga/fpga_device.c new file +59 -0

new file mode 100644
index 0000000..97b27eb
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <altera.h>
+
+#ifdef CONFIG_FPGA_STRATIX10
+/*
+ * FPGA programming support for SoC FPGA Stratix 10
+ */
+static Altera_desc altera_fpga[] = {
+       {
+               /* Family */
+               Intel_FPGA_Stratix10,
+               /* Interface type */
+               secure_device_manager_mailbox,
+               /* No limitation as additional data will be ignored */
+               -1,
+               /* No device function table */
+               NULL,
+               /* Base interface address specified in driver */
+               NULL,
+               /* No cookie implementation */
+               0
+       },
+};
+#else
+/*
+ * FPGA programming support for SoC FPGA Cyclone V
+ */
+static Altera_desc altera_fpga[] = {
+       {
+               /* Family */
+               Altera_SoCFPGA,
+               /* Interface type */
+               fast_passive_parallel,
+               /* No limitation as additional data will be ignored */
+               -1,
+               /* No device function table */
+               NULL,
+               /* Base interface address specified in driver */
+               NULL,
+               /* No cookie implementation */
+               0
+       },
+};
+#endif
+
+/* add device descriptor to FPGA device table */
+void socfpga_fpga_add(void)
+{
+       int i;
+
+       fpga_init();
+       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
+               fpga_add(fpga_altera, &altera_fpga[i]);
+}

arch/arm/mach-socfpga/include/mach/misc.h +0 -4

index 4fc9570..6fa9495 100644
@@ -15,11 +15,7 @@ struct bsel {
 
 extern struct bsel bsel_str[];
 
-#ifdef CONFIG_FPGA
 void socfpga_fpga_add(void);
-#else
-static inline void socfpga_fpga_add(void) {}
-#endif
 
 #ifdef CONFIG_TARGET_SOCFPGA_GEN5
 void socfpga_sdram_remap_zero(void);

arch/arm/mach-socfpga/misc.c +0 ~~-21~~

index a4f6d5c..55f846a 100644
@@ -87,36 +87,7 @@ int overwrite_console(void)
 }
 #endif
 
-#ifdef CONFIG_FPGA
-/*
- * FPGA programming support for SoC FPGA Cyclone V
- */
-static Altera_desc altera_fpga[] = {
-       {
-               /* Family */
-               Altera_SoCFPGA,
-               /* Interface type */
-               fast_passive_parallel,
-               /* No limitation as additional data will be ignored */
-               -1,
-               /* No device function table */
-               NULL,
-               /* Base interface address specified in driver */
-               NULL,
-               /* No cookie implementation */
-               0
-       },
-};
-

arch/arm/mach-socfpga/misc.c int overwrite_console(void) · line 90

Quoted 10 lines

arch/arm/mach-socfpga/misc.c +1 -9

-/* add device descriptor to FPGA device table */
-void socfpga_fpga_add(void)
-{
-       int i;
-       fpga_init();
-       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
-               fpga_add(fpga_altera, &altera_fpga[i]);
-}
-#endif
+__weak void socfpga_fpga_add(void) {}

I'm not sure I completely followed the discussion of previous versions of this series, but is this really the coding style U-Boot wants? I would have thought weak functions are used for unknown extension points (multiple architectures or boards), but this is a config option in a defined set of files. In my opinion, using weak here is not the right thing to do.

I'd rather add a header file fpga_device.h that declares this function depending on CONFIG_FPGA.

Simon

Quoted 69 lines

arch/arm/mach-socfpga/misc.c +0 -0

 int arch_cpu_init(void)
 {

arch/arm/mach-socfpga/misc_s10.c +2 -0

index e599362..e611d2c 100644
@@ -125,6 +125,8 @@ int arch_misc_init(void)
 
 int arch_early_init_r(void)
 {
+       socfpga_fpga_add();
+
        return 0;
 }

drivers/fpga/altera.c +6 -0

index 9605554..7c8f518 100644
@@ -39,6 +39,9 @@ static const struct altera_fpga {
 #if defined(CONFIG_FPGA_STRATIX_V)
        { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
 #endif
+#if defined(CONFIG_FPGA_STRATIX10)
+       { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
+#endif
 #if defined(CONFIG_FPGA_SOCFPGA)
        { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
 #endif

@@ -154,6 +157,9 @@ int altera_info(Altera_desc *desc)
        case fast_passive_parallel_security:
                printf("Fast Passive Parallel with Security (FPPS)\n");
                break;
+       case secure_device_manager_mailbox:
+               puts("Secure Device Manager (SDM) Mailbox\n");
+               break;
                /* Add new interface types here */
        default:
                printf("Unsupported interface type, %d\n", desc->iface);

include/altera.h +4 -1

index 233b467..22d55cf 100644
@@ -39,6 +39,8 @@ enum altera_iface {
        fast_passive_parallel,
        /* fast passive parallel with security (FPPS) */
        fast_passive_parallel_security,
+       /* secure device manager (SDM) mailbox */
+       secure_device_manager_mailbox,
        /* insert all new types before this */
        max_altera_iface_type,
 };

@@ -54,6 +56,8 @@ enum altera_family {
        Altera_StratixII,
        /* StratixV Family */
        Altera_StratixV,
+       /* Stratix10 Family */
+       Intel_FPGA_Stratix10,
        /* SoCFPGA Family */
        Altera_SoCFPGA,
 
--

2.7.4

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
https://lists.denx.de/listinfo/u-boot

Marek Vasut

2018-11-19 13:12 UTC #5 lore raw

PATCH v4 3/4 arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table

Quoted 162 lines · Simon Goldschmidt

Quoted 143 lines · On Mon, Nov 19, 2018 at 10:46 AM <[email protected]> wrote:

From: "Ang, Chee Hong" <[email protected]>

Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC.

Signed-off-by Ang, Chee Hong <[email protected]>

---
 arch/arm/mach-socfpga/Makefile            |  4 +++
 arch/arm/mach-socfpga/fpga_device.c       | 59 +++++++++++++++++++++++++++++++
 arch/arm/mach-socfpga/include/mach/misc.h |  4 ---
 arch/arm/mach-socfpga/misc.c              | 31 +---------------
 arch/arm/mach-socfpga/misc_s10.c          |  2 ++
 drivers/fpga/altera.c                     |  6 ++++
 include/altera.h                          |  4 +++
 7 files changed, 76 insertions(+), 34 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/fpga_device.c

arch/arm/mach-socfpga/Makefile +4 -0

index e667204..2ff1b3f 100644
@@ -10,6 +10,10 @@ obj-y        += clock_manager.o
 obj-y  += misc.o
 obj-y  += reset_manager.o
 
+ifdef CONFIG_FPGA
+obj-y  += fpga_device.o
+endif
+
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
 obj-y  += clock_manager_gen5.o
 obj-y  += misc_gen5.o

arch/arm/mach-socfpga/fpga_device.c new file +59 -0

new file mode 100644
index 0000000..97b27eb
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <altera.h>
+
+#ifdef CONFIG_FPGA_STRATIX10
+/*
+ * FPGA programming support for SoC FPGA Stratix 10
+ */
+static Altera_desc altera_fpga[] = {
+       {
+               /* Family */
+               Intel_FPGA_Stratix10,
+               /* Interface type */
+               secure_device_manager_mailbox,
+               /* No limitation as additional data will be ignored */
+               -1,
+               /* No device function table */
+               NULL,
+               /* Base interface address specified in driver */
+               NULL,
+               /* No cookie implementation */
+               0
+       },
+};
+#else
+/*
+ * FPGA programming support for SoC FPGA Cyclone V
+ */
+static Altera_desc altera_fpga[] = {
+       {
+               /* Family */
+               Altera_SoCFPGA,
+               /* Interface type */
+               fast_passive_parallel,
+               /* No limitation as additional data will be ignored */
+               -1,
+               /* No device function table */
+               NULL,
+               /* Base interface address specified in driver */
+               NULL,
+               /* No cookie implementation */
+               0
+       },
+};
+#endif
+
+/* add device descriptor to FPGA device table */
+void socfpga_fpga_add(void)
+{
+       int i;
+
+       fpga_init();
+       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
+               fpga_add(fpga_altera, &altera_fpga[i]);
+}

arch/arm/mach-socfpga/include/mach/misc.h +0 -4

index 4fc9570..6fa9495 100644
@@ -15,11 +15,7 @@ struct bsel {
 
 extern struct bsel bsel_str[];
 
-#ifdef CONFIG_FPGA
 void socfpga_fpga_add(void);
-#else
-static inline void socfpga_fpga_add(void) {}
-#endif
 
 #ifdef CONFIG_TARGET_SOCFPGA_GEN5
 void socfpga_sdram_remap_zero(void);

arch/arm/mach-socfpga/misc.c +0 ~~-21~~

index a4f6d5c..55f846a 100644
@@ -87,36 +87,7 @@ int overwrite_console(void)
 }
 #endif
 
-#ifdef CONFIG_FPGA
-/*
- * FPGA programming support for SoC FPGA Cyclone V
- */
-static Altera_desc altera_fpga[] = {
-       {
-               /* Family */
-               Altera_SoCFPGA,
-               /* Interface type */
-               fast_passive_parallel,
-               /* No limitation as additional data will be ignored */
-               -1,
-               /* No device function table */
-               NULL,
-               /* Base interface address specified in driver */
-               NULL,
-               /* No cookie implementation */
-               0
-       },
-};
-

arch/arm/mach-socfpga/misc.c int overwrite_console(void) · line 90

Quoted 10 lines

arch/arm/mach-socfpga/misc.c +1 -9

-/* add device descriptor to FPGA device table */
-void socfpga_fpga_add(void)
-{
-       int i;
-       fpga_init();
-       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
-               fpga_add(fpga_altera, &altera_fpga[i]);
-}
-#endif
+__weak void socfpga_fpga_add(void) {}

Quoted 2 lines

I'd rather add a header file fpga_device.h that declares this function depending on CONFIG_FPGA.

My understanding is that the goal was to deduplicate the function for Gen5 somehow, but you're right, this looks odd.

This function should always be declared for SoCFPGA, except with different tables for different FPGAs.

Signature · 2 lines

Best regards,
Marek Vasut

Ang

2018-11-19 16:46 UTC #6 lore raw

PATCH v4 3/4 arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table

Quoted 176 lines · Marek Vasut

Quoted 175 lines · Simon Goldschmidt
Quoted 153 lines · On Mon, Nov 19, 2018 at 10:46 AM <[email protected]> wrote:
From: "Ang, Chee Hong" <[email protected]>
Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.
Signed-off-by Ang, Chee Hong <[email protected]>
---
arch/arm/mach-socfpga/Makefile | 4 +++ arch/arm/mach-socfpga/fpga_device.c | 59
+++++++++++++++++++++++++++++++
arch/arm/mach-socfpga/include/mach/misc.h | 4 --- arch/arm/mach-socfpga/misc.c | 31 +--------------- arch/arm/mach-socfpga/misc_s10.c | 2 ++ drivers/fpga/altera.c | 6 ++++ include/altera.h | 4 +++
 7 files changed, 76 insertions(+), 34 deletions(-)
create mode 100644 arch/arm/mach-socfpga/fpga_device.c
arch/arm/mach- renamed from arch/arm/mach-socfpga/Makefile +0 -0
socfpga/Makefile
index e667204..2ff1b3f 100644
arch/arm/mach-socfpga/Makefile +0 -0
@@ -10,6 +10,10 @@ obj-y        += clock_manager.o
obj-y += misc.o
obj-y += reset_manager.o
arch/arm/mach-socfpga/Makefile +4 -0
+ifdef CONFIG_FPGA
+obj-y  += fpga_device.o
+endif
+
ifdef CONFIG_TARGET_SOCFPGA_GEN5
obj-y += clock_manager_gen5.o
obj-y += misc_gen5.o
arch/arm/mach- renamed from arch/arm/mach-socfpga/fpga_device.c +0 -0
socfpga/fpga_device.c
new file mode 100644
index 0000000..97b27eb
arch/arm/mach-socfpga/fpga_device.c new file +19 -0
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <altera.h>
+
+#ifdef CONFIG_FPGA_STRATIX10
+/*
+ * FPGA programming support for SoC FPGA Stratix 10
+ */
+static Altera_desc altera_fpga[] = {
+       {
+               /* Family */
+               Intel_FPGA_Stratix10,
+               /* Interface type */
+               secure_device_manager_mailbox,
+               /* No limitation as additional data will be
ignored */
+               -1,
+               /* No device function table */
+               NULL,
+               /* Base interface address specified in driver */ +               NULL,
+               /* No cookie implementation */
+               0
+       },
arch/arm/mach-socfpga/fpga_device.c new file +12 -0
+};
+#else
+/*
+ * FPGA programming support for SoC FPGA Cyclone V
+ */
+static Altera_desc altera_fpga[] = {
+       {
+               /* Family */
+               Altera_SoCFPGA,
+               /* Interface type */
+               fast_passive_parallel,
+               /* No limitation as additional data will be
ignored */
+               -1,
+               /* No device function table */
+               NULL,
+               /* Base interface address specified in driver */ +               NULL,
+               /* No cookie implementation */
+               0
+       },
arch/arm/mach-socfpga/fpga_device.c new file +12 -0
+};
+#endif
+
+/* add device descriptor to FPGA device table */
+void socfpga_fpga_add(void)
+{
+       int i;
+
+       fpga_init();
+       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
+               fpga_add(fpga_altera, &altera_fpga[i]);
+}
arch/arm/mach-socfpga/include/mach/misc.h +0 -4
index 4fc9570..6fa9495 100644
@@ -15,11 +15,7 @@ struct bsel {
 
  extern struct bsel bsel_str[];
 
-#ifdef CONFIG_FPGA
  void socfpga_fpga_add(void);
-#else
-static inline void socfpga_fpga_add(void) {}
-#endif
 
  #ifdef CONFIG_TARGET_SOCFPGA_GEN5
  void socfpga_sdram_remap_zero(void);
arch/arm/mach- renamed from arch/arm/mach-socfpga/misc.c +0 -0
socfpga/misc.c
index a4f6d5c..55f846a 100644
arch/arm/mach-socfpga/misc.c +0 ~~-11~~
@@ -87,36 +87,7 @@ int overwrite_console(void)
  }
  #endif
 
-#ifdef CONFIG_FPGA
-/*
- * FPGA programming support for SoC FPGA Cyclone V
- */
-static Altera_desc altera_fpga[] = {
-       {
-               /* Family */
-               Altera_SoCFPGA,
-               /* Interface type */
-               fast_passive_parallel,
-               /* No limitation as additional data will be
ignored */
-               -1,
-               /* No device function table */
-               NULL,
-               /* Base interface address specified in driver */ -               NULL,
-               /* No cookie implementation */
-               0
-       },
arch/arm/mach-socfpga/misc.c +0 -2
-};
-
arch/arm/mach-socfpga/misc.c int overwrite_console(void) · line 90
Quoted 10 lines
arch/arm/mach-socfpga/misc.c +1 -9
-/* add device descriptor to FPGA device table */
-void socfpga_fpga_add(void)
-{
-       int i;
-       fpga_init();
-       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
-               fpga_add(fpga_altera, &altera_fpga[i]);
-}
-#endif
+__weak void socfpga_fpga_add(void) {}
I'm not sure I completely followed the discussion of previous versions
of this series, but is this really the coding style U-Boot wants? I would have thought weak functions are used for unknown extension points (multiple architectures or boards), but this is a config option
in a defined set of files. In my opinion, using weak here is not the
right thing to do.

Quoted 8 lines

Quoted 3 lines
I'd rather add a header file fpga_device.h that declares this function
depending on CONFIG_FPGA.
My understanding is that the goal was to deduplicate the function for Gen5 somehow, but you're right, this looks odd.
This function should always be declared for SoCFPGA, except with different tables for different FPGAs.

This functions is general to all platforms except it is adding different table for different platform. But this function is depending on whether CONFIG_FPGA is defined or not. So if I declare this function as empty function if CONFIG_FPGA is not defined then it would be something similar to what I already addressed in previous v3 patchsets. In v3 patchsets the tables and socfpga_fpga_add() function were already declared in arch/arm/mach-socfpga/misc.c.
Can you guys take a look at v3 patchsets ?
https://lists.denx.de/pipermail/u-boot/2018-October/343561.html

Thanks.

Quoted 1 line

chee.hong.ang at intel.com

author

2018-11-19 09:43 UTC #7 lore raw

PATCH v4 4/4 arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration

In reply to chee.hong.ang at intel.com

From: "Ang, Chee Hong" <[email protected]>

Enable Stratix10 FPGA reconfiguration support in defconfig.

Signed-off-by Ang, Chee Hong <[email protected]>

---
 configs/socfpga_stratix10_defconfig | 1 +
 1 file changed, 1 insertion(+)

configs/socfpga_stratix10_defconfig +1 -0

index 5f3d733..155c406 100644
@@ -10,6 +10,7 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_BOOTDELAY=5
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_HUSH_PARSER=y
+CONFIG_FPGA_STRATIX10=y
 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
 CONFIG_CMD_MEMTEST=y
 # CONFIG_CMD_FLASH is not set

Signature · 1 line

2.7.4