Test R-Car Gen3 IMR-LX4 device

Test R-Car Gen3 IMR-LX4 device

[PATCH 01/09] Prototype code for basic IMR-LX4 test
[PATCH 02/09] arm64: dts: renesas: r8a7795: One IMR-LX4 device for R-Car H3 [PATCH 03/09] arm64: dts: renesas: r8a7796: One IMR-LX4 device for R-Car M3-W [PATCH 04/09] arm64: dts: renesas: r8a77965: One IMR-LX4 device for R-Car M3-N [PATCH 05/09] arm64: dts: renesas: r8a77970: One IMR-LX4 device for R-Car V3M [PATCH 06/09] arm64: dts: renesas: r8a77980: One IMR-LX4 device for R-Car V3H [PATCH 07/09] arm64: dts: renesas: r8a77995: One IMR-LX4 device for R-Car D3 [PATCH 08/09] arm64: dts: renesas: r8a77990: One IMR-LX4 device for R-Car E3 [PATCH 09/09] Random build workarounds for renesas-drivers

These patches temporarily introduce a IMR-LX4 driver that uses Runtime PM to control clocks and power when performing a basic reset of the device.

The user should check console printouts and verify that register settings are changed after the reset has been performed during probe().

Not intended for upstream merge. Successfully tested on H3 ES2 ULCB.

Created as an example of how to test power domains for a certain device. I hope to use this approach to test IPMMU power domain support in the future.

---

Developed on top of renesas-drivers-2018-12-18-v4.20-rc7

 arch/arm64/boot/dts/renesas/r8a7795.dtsi        |   30 ---------
 arch/arm64/boot/dts/renesas/r8a7796.dtsi        |   10 ---
 arch/arm64/boot/dts/renesas/r8a77965.dtsi       |   11 +++
 arch/arm64/boot/dts/renesas/r8a77970.dtsi       |   10 +++
 arch/arm64/boot/dts/renesas/r8a77980.dtsi       |   10 +++
 arch/arm64/boot/dts/renesas/r8a77990.dtsi       |   10 +++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi       |   10 +++
 arch/arm64/include/asm/smp.h                    |    2 
 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c |    2 
 drivers/soc/renesas/Makefile                    |    2 
 drivers/soc/renesas/renesas-test-imr-lx4.c      |   71 +++++++++++++++++++++++
 drivers/tty/serial/sh-sci.c                     |    2 
 12 files changed, 126 insertions(+), 44 deletions(-)

From: Magnus Damm <[email protected]>

Introduce some basic test code for the IMR-LX4 device included in R-Car Gen3 SoCs. At this point the code only controls clocks and power domains using Runtime PM and resets the device. Obviously a proper driver would be much more useful. This code is however useful to test clocks and power domains and may in the future be extended for IPMMU and further power management testing. Not for upstream merge.

---

 drivers/soc/renesas/Makefile               |    2 
 drivers/soc/renesas/renesas-test-imr-lx4.c |   71 ++++++++++++++++++++++++++++
 2 files changed, 72 insertions(+), 1 deletion(-)

@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 # Generic, must be first because of soc_device_register()
-obj-$(CONFIG_SOC_RENESAS)	+= renesas-soc.o
+obj-$(CONFIG_SOC_RENESAS)	+= renesas-soc.o renesas-test-imr-lx4.o
 
 # SoC
 obj-$(CONFIG_SYSC_R8A7743)	+= r8a7743-sysc.o

From: Magnus Damm <[email protected]>

We will only test a single IMR-LX4 device, so get rid of the other channels in the r8a7795 dtsi file. Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a7795.dtsi |   30 ------------------------------
 1 file changed, 30 deletions(-)

@@ -2617,36 +2617,6 @@
 			resets = <&cpg 823>;
 		};
 
-		imr-lx4@fe870000 {
-			compatible = "renesas,r8a7795-imr-lx4",
-				     "renesas,imr-lx4";
-			reg = <0 0xfe870000 0 0x2000>;
-			interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 822>;
-			power-domains = <&sysc R8A7795_PD_A3VC>;
-			resets = <&cpg 822>;
-		};
-
-		imr-lx4@fe880000 {
-			compatible = "renesas,r8a7795-imr-lx4",
-				     "renesas,imr-lx4";
-			reg = <0 0xfe880000 0 0x2000>;
-			interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 821>;
-			power-domains = <&sysc R8A7795_PD_A3VC>;
-			resets = <&cpg 821>;
-		};
-
-		imr-lx4@fe890000 {
-			compatible = "renesas,r8a7795-imr-lx4",
-				     "renesas,imr-lx4";
-			reg = <0 0xfe890000 0 0x2000>;
-			interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 820>;
-			power-domains = <&sysc R8A7795_PD_A3VC>;
-			resets = <&cpg 820>;
-		};
-
 		fdp1@fe940000 {
 			compatible = "renesas,fdp1";
 			reg = <0 0xfe940000 0 0x2400>;

From: Magnus Damm <[email protected]>

We will only test a single IMR-LX4 device, so get rid of the other channels in the r8a7796 dtsi file. Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a7796.dtsi |   10 ----------
 1 file changed, 10 deletions(-)

@@ -2480,16 +2480,6 @@
 			resets = <&cpg 823>;
 		};
 
-		imr-lx4@fe870000 {
-			compatible = "renesas,r8a7796-imr-lx4",
-				     "renesas,imr-lx4";
-			reg = <0 0xfe870000 0 0x2000>;
-			interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 822>;
-			power-domains = <&sysc R8A7796_PD_A3VC>;
-			resets = <&cpg 822>;
-		};
-
 		fdp1@fe940000 {
 			compatible = "renesas,fdp1";
 			reg = <0 0xfe940000 0 0x2400>;

From: Magnus Damm <[email protected]>

Introduce a single IMR-LX4 device to the r8a77965 dtsi file.

Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a77965.dtsi |   11 +++++++++++
 1 file changed, 11 insertions(+)

@@ -1929,6 +1929,17 @@
 			status = "disabled";
 		};
 
+
+		imr-lx4@fe860000 {
+			compatible = "renesas,r8a77965-imr-lx4",
+				     "renesas,imr-lx4";
+			reg = <0 0xfe860000 0 0x2000>;
+			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 823>;
+			power-domains = <&sysc R8A77965_PD_A3VC>;
+			resets = <&cpg 823>;
+		};
+
 		fdp1@fe940000 {
 			compatible = "renesas,fdp1";
 			reg = <0 0xfe940000 0 0x2400>;

From: Magnus Damm <[email protected]>

Introduce a single IMR-LX4 device to the r8a77970 dtsi file.

Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a77970.dtsi |   10 ++++++++++
 1 file changed, 10 insertions(+)

@@ -1055,6 +1055,16 @@
 			resets = <&cpg 408>;
 		};
 
+		imr-lx4@fe860000 {
+			compatible = "renesas,r8a77970-imr-lx4",
+				     "renesas,imr-lx4";
+			reg = <0 0xfe860000 0 0x2000>;
+			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 823>;
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+			resets = <&cpg 823>;
+		};
+
 		vspd0: vsp@fea20000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfea20000 0 0x5000>;

From: Magnus Damm <[email protected]>

Introduce a single IMR-LX4 device to the r8a77980 dtsi file.

Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a77980.dtsi |   10 ++++++++++
 1 file changed, 10 insertions(+)

@@ -1374,6 +1374,16 @@
 			status = "disabled";
 		};
 
+		imr-lx4@fe860000 {
+			compatible = "renesas,r8a77980-imr-lx4",
+				     "renesas,imr-lx4";
+			reg = <0 0xfe860000 0 0x2000>;
+			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 823>;
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+			resets = <&cpg 823>;
+		};
+
 		vspd0: vsp@fea20000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfea20000 0 0x5000>;

From: Magnus Damm <[email protected]>

Introduce a single IMR-LX4 device to the r8a77990 dtsi file.

Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a77990.dtsi |   10 ++++++++++
 1 file changed, 10 insertions(+)

@@ -1526,6 +1526,16 @@
 			resets = <&cpg 408>;
 		};
 
+		imr-lx4@fe860000 {
+			compatible = "renesas,r8a77990-imr-lx4",
+				     "renesas,imr-lx4";
+			reg = <0 0xfe860000 0 0x2000>;
+			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 823>;
+			power-domains = <&sysc R8A77990_PD_A3VC>;
+			resets = <&cpg 823>;
+		};
+
 		vspb0: vsp@fe960000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfe960000 0 0x8000>;

From: Magnus Damm <[email protected]>

Introduce a single IMR-LX4 device to the r8a77995 dtsi file.

Not for upstream merge.

---

 arch/arm64/boot/dts/renesas/r8a77995.dtsi |   10 ++++++++++
 1 file changed, 10 insertions(+)

@@ -936,6 +936,16 @@
 			resets = <&cpg 408>;
 		};
 
+		imr-lx4@fe860000 {
+			compatible = "renesas,r8a77995-imr-lx4",
+				     "renesas,imr-lx4";
+			reg = <0 0xfe860000 0 0x2000>;
+			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 823>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 823>;
+		};
+
 		vspbs: vsp@fe960000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfe960000 0 0x8000>;

From: Magnus Damm <[email protected]>

The latest renesas-drivers release does not build for me with the arm64 defconfig. Probably related to my old toolchain.

Take the easy way out and work around the build issues locally.

Not for upstream merge.

---

Applies on top of renesas-drivers-2018-12-18-v4.20-rc7

 arch/arm64/include/asm/smp.h                    |    2 +-
 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c |    2 +-
 drivers/tty/serial/sh-sci.c                     |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

@@ -30,7 +30,7 @@
 #define CPU_PANIC_KERNEL		(3)
 
 #define CPU_STUCK_REASON_52_BIT_VA	(1U << CPU_STUCK_REASON_SHIFT)
-#define CPU_STUCK_REASON_NO_GRAN	(2U << CPU_STUCK_REASON_SHIFT)
+#define CPU_STUCK_REASON_NO_GRAN	(2 << CPU_STUCK_REASON_SHIFT)
 
 #ifndef __ASSEMBLY__
 

@@ -560,7 +560,7 @@ dw_mipi_dsi_get_lane_mbps(void *priv_dat
 
 static const struct dw_mipi_dsi_phy_ops dw_mipi_dsi_rockchip_phy_ops = {
 	.init = dw_mipi_dsi_phy_init,
-	.get_lane_mbps = dw_mipi_dsi_get_lane_mbps,
+	//.get_lane_mbps = dw_mipi_dsi_get_lane_mbps,
 };
 
 static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi,

@@ -1347,7 +1347,7 @@ static int sci_submit_rx(struct sci_port
 {
 	struct dma_chan *chan = s->chan_rx;
 	struct uart_port *port = &s->port;
-	unsigned long flags;
+	unsigned long flags = 0;
 	int i;
 
 	for (i = 0; i < 2; i++) {