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ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

PATCH New Heiko Stübner 3 participants 10 messages Mar 26, 2014 – May 26, 2014

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Heiko Stübner

author maintainer
#0 lore raw

PATCH 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

---
 Documentation/devicetree/bindings/arm/cpus.txt | 1 +
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 5 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/arm/cpus.txt +1 -0
index 333f4ae..2501d5d 100644
@@ -185,6 +185,7 @@ nodes to be present and contain the properties described below.
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "rockchip,rk3066-smp"
 
 	- cpu-release-addr
 		Usage: required for systems that have an "enable-method"
arch/arm/boot/dts/rk3066a.dtsi +1 -0
index 4d4dfbb..90b354d 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/boot/dts/rk3188.dtsi +1 -0
index bb36596..7ad5103 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/mach-rockchip/core.h +0 -2
index e2e7c9d..39bca96 100644
@@ -18,5 +18,3 @@ extern char rockchip_secondary_trampoline_end;
 
 extern unsigned long rockchip_boot_fn;
 extern void rockchip_secondary_startup(void);
-
-extern struct smp_operations rockchip_smp_ops;
arch/arm/mach-rockchip/platsmp.c +2 -1
index dbfa5a2..a18b7f2 100644
@@ -178,7 +178,8 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
 		pmu_set_power_domain(0 + i, false);
 }
 
-struct smp_operations rockchip_smp_ops __initdata = {
+static struct smp_operations rockchip_smp_ops __initdata = {
 	.smp_prepare_cpus	= rockchip_smp_prepare_cpus,
 	.smp_boot_secondary	= rockchip_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);
arch/arm/mach-rockchip/rockchip.c +0 -1
index d211d6f..4499b0a 100644
@@ -39,7 +39,6 @@ static const char * const rockchip_board_dt_compat[] = {
 };
 
 DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
-	.smp		= smp_ops(rockchip_smp_ops),
 	.init_machine	= rockchip_dt_init,
 	.dt_compat	= rockchip_board_dt_compat,
 MACHINE_END
Signature · 1 line
1.9.0
#1 lore raw

PATCH 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Quoted 19 lines · Heiko St?bner

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

---
 Documentation/devicetree/bindings/arm/cpus.txt | 1 +
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 5 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/arm/cpus.txt +0 -0
index 333f4ae..2501d5d 100644

Documentation/devicetree/bindings/arm/cpus.txt nodes to be present and contain the properties described below. · line 188

Quoted 4 lines
Documentation/devicetree/bindings/arm/cpus.txt +1 -0
@@ -185,6 +185,7 @@ nodes to be present and contain the properties described below.
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "rockchip,rk3066-smp"

We should document what what these actually mean, so as to be a hardware description and not a Linux internals description.

Mark.

Quoted 73 lines
Documentation/devicetree/bindings/arm/cpus.txt +0 -0
 	- cpu-release-addr
 		Usage: required for systems that have an "enable-method"
arch/arm/boot/dts/rk3066a.dtsi +1 -0
index 4d4dfbb..90b354d 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/boot/dts/rk3188.dtsi +1 -0
index bb36596..7ad5103 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/mach-rockchip/core.h +0 -2
index e2e7c9d..39bca96 100644
@@ -18,5 +18,3 @@ extern char rockchip_secondary_trampoline_end;
 
 extern unsigned long rockchip_boot_fn;
 extern void rockchip_secondary_startup(void);
-
-extern struct smp_operations rockchip_smp_ops;
arch/arm/mach-rockchip/platsmp.c +2 -1
index dbfa5a2..a18b7f2 100644
@@ -178,7 +178,8 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
 		pmu_set_power_domain(0 + i, false);
 }
 
-struct smp_operations rockchip_smp_ops __initdata = {
+static struct smp_operations rockchip_smp_ops __initdata = {
 	.smp_prepare_cpus	= rockchip_smp_prepare_cpus,
 	.smp_boot_secondary	= rockchip_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);
arch/arm/mach-rockchip/rockchip.c +0 -1
index d211d6f..4499b0a 100644
@@ -39,7 +39,6 @@ static const char * const rockchip_board_dt_compat[] = {
 };
 
 DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
-	.smp		= smp_ops(rockchip_smp_ops),
 	.init_machine	= rockchip_dt_init,
 	.dt_compat	= rockchip_board_dt_compat,
 MACHINE_END
Signature · 7 lines
1.9.0


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author maintainer
#2 lore raw

PATCH 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Am Mittwoch, 26. M?rz 2014, 11:00:24 schrieb Mark Rutland:

Quoted 27 lines · Heiko St?bner
Quoted 26 lines

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

---

 Documentation/devicetree/bindings/arm/cpus.txt | 1 +
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 5 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/Documentation/devicetree/bindings/arm/cpus.txt index 333f4ae..2501d5d 100644

Documentation/devicetree/bindings/arm/cpus.txt +0 -0
@@ -185,6 +185,7 @@ nodes to be present and contain the properties

described below.>

Documentation/devicetree/bindings/arm/cpus.txt +0 -0
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
Quoted 4 lines

Documentation/devicetree/bindings/arm/cpus.txt nodes to be present and contain the properties described below. · line 188

Quoted 1 line
Documentation/devicetree/bindings/arm/cpus.txt +1 -0
+			    "rockchip,rk3066-smp"

We should document what what these actually mean, so as to be a hardware description and not a Linux internals description.

is something like
"rockchip,rk3066-smp" - cpu-core handling used by SoCs
from Rockchip starting with rk3066

enough, or should it contain more data?

Thanks
Heiko

author maintainer
#3 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

---
changes since v1:
- add a short description to the enable-method binding

 Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 6 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/arm/cpus.txt +2 -0
index 333f4ae..f52a9ac 100644
@@ -185,6 +185,8 @@ nodes to be present and contain the properties described below.
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "rockchip,rk3066-smp" - cpu-core handling of Socs
+					from Rockchip starting with rk3066
 
 	- cpu-release-addr
 		Usage: required for systems that have an "enable-method"
arch/arm/boot/dts/rk3066a.dtsi +1 -0
index 4d4dfbb..90b354d 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/boot/dts/rk3188.dtsi +1 -0
index bb36596..7ad5103 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/mach-rockchip/core.h +0 -2
index e2e7c9d..39bca96 100644
@@ -18,5 +18,3 @@ extern char rockchip_secondary_trampoline_end;
 
 extern unsigned long rockchip_boot_fn;
 extern void rockchip_secondary_startup(void);
-
-extern struct smp_operations rockchip_smp_ops;
arch/arm/mach-rockchip/platsmp.c +2 -1
index dbfa5a2..a18b7f2 100644
@@ -178,7 +178,8 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
 		pmu_set_power_domain(0 + i, false);
 }
 
-struct smp_operations rockchip_smp_ops __initdata = {
+static struct smp_operations rockchip_smp_ops __initdata = {
 	.smp_prepare_cpus	= rockchip_smp_prepare_cpus,
 	.smp_boot_secondary	= rockchip_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);
arch/arm/mach-rockchip/rockchip.c +0 -1
index d211d6f..4499b0a 100644
@@ -39,7 +39,6 @@ static const char * const rockchip_board_dt_compat[] = {
 };
 
 DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
-	.smp		= smp_ops(rockchip_smp_ops),
 	.init_machine	= rockchip_dt_init,
 	.dt_compat	= rockchip_board_dt_compat,
 MACHINE_END
Signature · 1 line
1.9.0
author maintainer
#4 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Am Donnerstag, 27. M?rz 2014, 01:06:32 schrieb Heiko St?bner:

Quoted 5 lines

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

more responses to this? [or maybe even an ack :-) ? ]

Thanks
Heiko

Quoted 86 lines

---
changes since v1:
- add a short description to the enable-method binding

 Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 6 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/Documentation/devicetree/bindings/arm/cpus.txt index 333f4ae..f52a9ac 100644

Documentation/devicetree/bindings/arm/cpus.txt +0 -0
@@ -185,6 +185,8 @@ nodes to be present and contain the properties described

below. "qcom,gcc-msm8660"

Documentation/devicetree/bindings/arm/cpus.txt +2 -0
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "rockchip,rk3066-smp" - cpu-core handling of Socs
+					from Rockchip starting with rk3066
 
 	- cpu-release-addr
 		Usage: required for systems that have an "enable-method"
arch/arm/boot/dts/rk3066a.dtsi +1 -0
index 4d4dfbb..90b354d 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/boot/dts/rk3188.dtsi +1 -0
index bb36596..7ad5103 100644
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
 
 		cpu at 0 {
 			device_type = "cpu";
arch/arm/mach-rockchip/core.h +0 -2
index e2e7c9d..39bca96 100644
@@ -18,5 +18,3 @@ extern char rockchip_secondary_trampoline_end;
 
 extern unsigned long rockchip_boot_fn;
 extern void rockchip_secondary_startup(void);
-
-extern struct smp_operations rockchip_smp_ops;
(quoted diff) +0 -0

b/arch/arm/mach-rockchip/platsmp.c index dbfa5a2..a18b7f2 100644

arch/arm/mach-rockchip/platsmp.c +2 -1
@@ -178,7 +178,8 @@ static void __init rockchip_smp_prepare_cpus(unsigned
 int max_cpus) pmu_set_power_domain(0 + i, false);
 }
 
-struct smp_operations rockchip_smp_ops __initdata = {
+static struct smp_operations rockchip_smp_ops __initdata = {
 	.smp_prepare_cpus	= rockchip_smp_prepare_cpus,
 	.smp_boot_secondary	= rockchip_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp",

&rockchip_smp_ops); diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c index d211d6f..4499b0a 100644

arch/arm/mach-rockchip/rockchip.c +0 -1
@@ -39,7 +39,6 @@ static const char * const rockchip_board_dt_compat[] = {
 };
 
 DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
-	.smp		= smp_ops(rockchip_smp_ops),
 	.init_machine	= rockchip_dt_init,
 	.dt_compat	= rockchip_board_dt_compat,
 MACHINE_END
#5 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Quoted 8 lines · Heiko St?bner

Am Donnerstag, 27. M?rz 2014, 01:06:32 schrieb Heiko St?bner:

Quoted 5 lines

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

more responses to this? [or maybe even an ack :-) ? ]

Looks reasonable to me:

author maintainer
#6 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Hi Olof,

Am Freitag, 16. Mai 2014, 15:54:22 schrieb Olof Johansson:

Quoted 6 lines · Heiko St?bner
Quoted 5 lines

Am Donnerstag, 27. M?rz 2014, 01:06:32 schrieb Heiko St?bner:

Quoted 4 lines

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

Quoted 7 lines
Quoted 3 lines
Quoted 1 line

more responses to this? [or maybe even an ack :-) ? ]

Looks reasonable to me:

or you could simply apply it to arm-soc directly :-)

Because apart from the pull request I sent two days ago, this patch looks like the last one for 3.16 ... everything else needs to marture a bit longer.

Otherwise I'll send a pull-request for this one patch in the next days.

Heiko

#7 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

In reply to Heiko Stübner
Quoted 5 lines · Heiko St?bner

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

Applied, however:

Quoted 17 lines

---
changes since v1:
- add a short description to the enable-method binding

 Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 6 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/arm/cpus.txt +0 -0
index 333f4ae..f52a9ac 100644

Documentation/devicetree/bindings/arm/cpus.txt nodes to be present and contain the properties described below. · line 189

Quoted 5 lines
Documentation/devicetree/bindings/arm/cpus.txt +2 -0
@@ -185,6 +185,8 @@ nodes to be present and contain the properties described below.
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "rockchip,rk3066-smp" - cpu-core handling of Socs
+					from Rockchip starting with rk3066

Nobody else has a comment here, so I removed this one.

I noticed that the list is unsorted, in particular the new marvell entries were appended instead of inserted at the right location, which caused a merge conflict. Sigh. I'll do a separate commit on top to sort the list, since we seem to have the new out-of-order additions in our tree.

-Olof

author maintainer
#8 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Am Montag, 26. Mai 2014, 11:13:15 schrieb Olof Johansson:

Quoted 37 lines · Heiko St?bner
Quoted 5 lines

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

Applied, however:

Quoted 20 lines

---

changes since v1:
- add a short description to the enable-method binding

 Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 6 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/Documentation/devicetree/bindings/arm/cpus.txt index 333f4ae..f52a9ac 100644

Documentation/devicetree/bindings/arm/cpus.txt +0 -0
@@ -185,6 +185,8 @@ nodes to be present and contain the properties

described below.>

Documentation/devicetree/bindings/arm/cpus.txt nodes to be present and contain the properties described below. · line 189

Quoted 6 lines
Documentation/devicetree/bindings/arm/cpus.txt +2 -0
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
 
+			    "rockchip,rk3066-smp" - cpu-core handling of Socs
+					from Rockchip starting with rk3066

Nobody else has a comment here, so I removed this one.

Quoted 4 lines

I noticed that the list is unsorted, in particular the new marvell entries were appended instead of inserted at the right location, which caused a merge conflict. Sigh. I'll do a separate commit on top to sort the list, since we seem to have the new out-of-order additions in our tree.

I added the comment after Mark Rutland noted:

"We should document what what these actually mean, so as to be a hardware description and not a Linux internals description."

But I'm fine with it either way :-)

Heiko

#9 lore raw

PATCH v2 1/1 ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

Quoted 43 lines · Heiko St?bner

Am Montag, 26. Mai 2014, 11:13:15 schrieb Olof Johansson:

Quoted 37 lines · Heiko St?bner
Quoted 5 lines

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore to reference the relevant smp_ops in the board file, but instead it can simply be set by the enable-method property of the cpu nodes.

Applied, however:

Quoted 24 lines

---

changes since v1:
- add a short description to the enable-method binding

 Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
 arch/arm/boot/dts/rk3066a.dtsi                 | 1 +
 arch/arm/boot/dts/rk3188.dtsi                  | 1 +
 arch/arm/mach-rockchip/core.h                  | 2 --
 arch/arm/mach-rockchip/platsmp.c               | 3 ++-
 arch/arm/mach-rockchip/rockchip.c              | 1 -
 6 files changed, 6 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/Documentation/devicetree/bindings/arm/cpus.txt index 333f4ae..f52a9ac 100644

Documentation/devicetree/bindings/arm/cpus.txt +0 -0
@@ -185,6 +185,8 @@ nodes to be present and contain the properties

described below.>

                        "qcom,gcc-msm8660"
                        "qcom,kpss-acc-v1"
                        "qcom,kpss-acc-v2"

Documentation/devicetree/bindings/arm/cpus.txt nodes to be present and contain the properties described below. · line 189

Quoted 2 lines
Documentation/devicetree/bindings/arm/cpus.txt +2 -0
+                       "rockchip,rk3066-smp" - cpu-core handling of Socs
+                                   from Rockchip starting with rk3066

Nobody else has a comment here, so I removed this one.

Quoted 4 lines

I noticed that the list is unsorted, in particular the new marvell entries were appended instead of inserted at the right location, which caused a merge conflict. Sigh. I'll do a separate commit on top to sort the list, since we seem to have the new out-of-order additions in our tree.

Quoted 6 lines

I added the comment after Mark Rutland noted:

"We should document what what these actually mean, so as to be a hardware description and not a Linux internals description."

But I'm fine with it either way :-)

Ah! Well, I suggest a pass through to document all of them then :) However, the compatible strings should be documented elsewhere in the tree so they should just be possible to reference.

-Olof