Add a new IGT test to validate DC3CO state.

From: Anshuman Gupta <[email protected]>

Add DC3CO IGT validation prerequisites stuff
so we can enable DC3CO IGT test.

v2: Removed psr2_idle_wait_entry and get_psr2_status function.

Signed-off-by Anshuman Gupta <[email protected]>

Signed-off-by Jeevan B <[email protected]>

---
  tests/i915/i915_pm_dc.c | 34 +++++++++++++++++++++++++++++-----
  1 file changed, 29 insertions(+), 5 deletions(-)

tests/i915/i915_pm_dc.c +0 -0

index ce3319b..19d8a78 100644

tests/i915/i915_pm_dc.c +22 -3

+{
+	char buf[512];
+
+	igt_debugfs_simple_read(data->debugfs_fd, "i915_edp_psr_status",
+				buf, sizeof(buf));
+
+	if (data->op_psr_mode == PSR_MODE_2)
+		return strstr(buf, "PSR mode: PSR2 enabled");
+
+	return false;
+}
+
  static void cleanup_dc_psr(data_t *data)
  {
  	igt_plane_t *primary;

@@ -141,12 +156,18 @@ static uint32_t read_dc_counter(uint32_t drm_fd, int dc_flag)
  		str = strstr(buf, "DC3 -> DC5 count");
  	else if (dc_flag & CHECK_DC6)
  		str = strstr(buf, "DC5 -> DC6 count");
+	else if (dc_flag & CHECK_DC3CO)
+		str = strstr(buf, "DC3CO count");
 
-	/* Check DC5/DC6 counter is available for the platform.
+	/* Check DC counter is available for the platform.
  	 * Skip the test if counter is not available.
  	 */
-	igt_skip_on_f(!str, "DC%d counter is not available\n",
-		      dc_flag & CHECK_DC5 ? 5 : 6);
+	if (dc_flag & CHECK_DC3CO)
+		igt_skip_on_f(!str, "DC3CO counter is not available\n");
+	else
+		igt_skip_on_f(!str, "DC%d counter is not available\n",
+			      dc_flag & CHECK_DC5 ? 5 : 6);
+
  	return get_dc_counter(str);
  }
 

@@ -158,9 +179,12 @@ static bool dc_state_wait_entry(int drm_fd, int dc_flag, int prev_dc_count)
 
  static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count)
  {
+	char tmp[64];

Add a subtest for DC3CO video playback case to generate selective frame update and validate that system stays in DC3CO state during execution.

v2: Changed PSR2 idle check to sleep check and addressed cosmetic changes.

v3: Renamed a function and restructured code according to Anshuman’s comments.

v4: Cosmetic changes.

Signed-off-by Jeevan B <[email protected]>

---
 lib/igt_psr.c           |  11 ++++
 lib/igt_psr.h           |   1 +
 tests/i915/i915_pm_dc.c | 149 +++++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 160 insertions(+), 1 deletion(-)

lib/igt_psr.c +11 -0

index b92ea73..7806ce9 100644
@@ -36,6 +36,17 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode)
 	return strstr(buf, state);
 }
 
+bool psr2_active_sleep_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+	const char *state = "SLEEP";
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, state);
+}
+
 static inline const char *psr_active_state_get(enum psr_mode mode)
 {
 	return mode == PSR_MODE_1 ? "SRDENT" : "DEEP_SLEEP";

lib/igt_psr.h +1 -0

index ca38573..a0627dc 100644
@@ -35,6 +35,7 @@ enum psr_mode {
 	PSR_MODE_2
 };
 
+bool psr2_active_sleep_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode);

tests/i915/i915_pm_dc.c +45 -1

index 19d8a78..c02c02e 100644
@@ -38,13 +38,20 @@
 #define CHECK_DC6	2
 #define CHECK_DC3CO     4
 
+/*Number of Frames Video Playback*/
+#define VIDEO_FRAMES 100
+
+typedef struct {
+	double r, g, b;
+} color_t;
+
 typedef struct {
 	int drm_fd;
 	int msr_fd;
 	int debugfs_fd;
 	uint32_t devid;
 	igt_display_t display;
-	struct igt_fb fb_white;
+	struct igt_fb fb_white, fb_rgb, fb_rgr;
 	enum psr_mode op_psr_mode;
 	drmModeModeInfo *mode;
 	igt_output_t *output;

@@ -114,6 +121,43 @@ static void cleanup_dc_psr(data_t *data)
 	igt_remove_fb(data->drm_fd, &data->fb_white);
 }
 
+static void cleanup_dc3co(data_t *data)
+{
+	igt_plane_t *primary;
+
+	primary = igt_output_get_plane_type(data->output,
+					    DRM_PLANE_TYPE_PRIMARY);
+	igt_plane_set_fb(primary, NULL);
+
+	/* Clear Frame Buffers */
+	igt_display_commit(&data->display);
+	igt_remove_fb(data->drm_fd, &data->fb_rgb);
+	igt_remove_fb(data->drm_fd, &data->fb_rgr);
+}
+
+static void paint_rectangles(data_t *data,
+			     drmModeModeInfo *mode,
+			     color_t *colors,
+			     igt_fb_t *fb)
+{
+	cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, fb);
+	int i, l = mode->hdisplay / 3;
+	int rows_remaining = mode->hdisplay % 3;
+
+	/* Paint 3 solid rectangles. */
+	for (i = 0 ; i < 3; i++) {
+		igt_paint_color(cr, i * l, 0, l, mode->vdisplay,
+				colors[i].r, colors[i].g, colors[i].b);
+	}
+
+	if (rows_remaining > 0)
+		igt_paint_color(cr, i * l, 0, rows_remaining, mode->vdisplay,
+				colors[i - 1].r, colors[i - 1].g,
+				colors[i - 1].b);
+
+	igt_put_cairo_ctx(data->drm_fd, fb, cr);
+}
+
 static void setup_primary(data_t *data)
 {
 	igt_plane_t *primary;

@@ -131,6 +175,25 @@ static void setup_primary(data_t *data)
 	igt_display_commit(&data->display);
 }

tests/i915/i915_pm_dc.c +19 -0

+	fb_id = igt_create_fb(data->drm_fd,
+			      data->mode->hdisplay,
+			      data->mode->vdisplay,
+			      DRM_FORMAT_XRGB8888,
+			      LOCAL_DRM_FORMAT_MOD_NONE,
+			      fb);
+	igt_assert(fb_id);
+	paint_rectangles(data, data->mode, fb_color, fb);
+}
+
 static uint32_t get_dc_counter(char *dc_data)
 {
 	char *e;

@@ -171,6 +234,11 @@ static uint32_t read_dc_counter(uint32_t drm_fd, int dc_flag)
 	return get_dc_counter(str);
 }
 
+static bool psr2_wait_sleep_entry(int debugfs_fd)
+{
+	return igt_wait(psr2_active_sleep_check(debugfs_fd), 50, 10);
+}
+
 static bool dc_state_wait_entry(int drm_fd, int dc_flag, int prev_dc_count)
 {
 	return igt_wait(read_dc_counter(drm_fd, dc_flag) >

@@ -187,6 +255,78 @@ static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count)
 		     "%s state is not achieved\n", tmp);
 }
 
+static void setup_vpb(data_t *data)
+{
+	color_t red_green_blue[] = {
+		{ 1.0, 0.0, 0.0 },

tests/i915/i915_pm_dc.c +5 -0

+	create_color_fb(data, &data->fb_rgb, red_green_blue);
+	create_color_fb(data, &data->fb_rgr, red_green_red);
+}
+
+static void run_videoplayback(data_t *data, int dc_flag)

tests/i915/i915_pm_dc.c +4 -0

+	delay = ((1000 * 1000) / data->mode->vrefresh);
+
+	for (i = 0; i < VIDEO_FRAMES; i++) {
+		if (i % 2 == 0) {

tests/i915/i915_pm_dc.c +13 -0

+	check_dc_counter(data->drm_fd, dc_flag, dc3co_prev_cnt);
+}
+
+static void setup_dc3co(data_t *data)
+{
+	igt_require(IS_TIGERLAKE(data->devid));
+	data->op_psr_mode = PSR_MODE_2;
+	psr_enable(data->debugfs_fd, data->op_psr_mode);
+	igt_require_f(edp_psr2_enabled(data),
+		      "PSR2 is not enabled\n");
+}
+
+static void test_dc3co_vpb_simulation(data_t *data, int dc_flag)

Signature · 1 line

2.7.4

Add a subtest for DC3CO video playback case to generate selective frame update and validate that system stays in DC3CO state during execution.

v2: Changed PSR2 idle check to sleep check and addressed cosmetic changes.

v3: Renamed a function and restructured code according to Anshuman’s comments.

v4: Cosmetic changes.

Signed-off-by Jeevan B <[email protected]>

Quoted 13 lines · Jeevan B

Add a subtest for DC3CO video playback case to generate selective frame update and validate that system stays in DC3CO state during execution.

v2: Changed PSR2 idle check to sleep check and addressed cosmetic changes.

v3: Renamed a function and restructured code according to Anshuman’s comments.

v4: Cosmetic changes.

Signed-off-by Jeevan B <[email protected]>

<SNIP>

tests/i915/i915_pm_dc.c static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count) · line 309

Quoted 3 lines

tests/i915/i915_pm_dc.c +3 -0

+static void setup_dc3co(data_t *data)
+{
+	igt_require(IS_TIGERLAKE(data->devid));

Is there a reason to make a check specific to TIGERLAKE here?

I think that better solution would be to add igt_require_dc_counter(CHECK_DC3CO) that would look for "DC3CO count" presence in i915_dmc_info.

This way you have feature check instead of encoding what is supported by which platforms in the tests - kernel should not advertise counters for things it does not support.

tests/i915/i915_pm_dc.c static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count) · line 288

Quoted 12 lines

tests/i915/i915_pm_dc.c +12 -0

+static void run_videoplayback(data_t *data, int dc_flag)
+{
+	igt_plane_t *primary;
+	uint32_t dc3co_prev_cnt;
+	int i, delay;
+
+	primary = igt_output_get_plane_type(data->output,
+					    DRM_PLANE_TYPE_PRIMARY);
+
+	igt_plane_set_fb(primary, NULL);
+
+	dc3co_prev_cnt = read_dc_counter(data->drm_fd, dc_flag);

I don't quite get why this is parametrized with dc_flag, when the name clearly says that we are testing for DC3CO. Just use CHECK_DC3CO directly.

tests/i915/i915_pm_dc.c static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count) · line 317

Quoted 2 lines

tests/i915/i915_pm_dc.c +2 -0

+static void test_dc3co_vpb_simulation(data_t *data, int dc_flag)
+{

Same here with dc_flag, you pass it few levels down to functions that are not generic and won't work with anything else than CHECK_DC3CO.

tests/i915/i915_pm_dc.c int main(int argc, char *argv[]) · line 434

Quoted 11 lines

static void test_dc_state_psr(data_t *data, int dc_flag) {

tests/i915/i915_pm_dc.c +4 -0

 	uint32_t dc_counter_before_psr;

@@ -288,6 +428,13 @@ int main(int argc, char *argv[])
 			     "Can't open /dev/cpu/0/msr.\n");
 	}
 
+	igt_describe("This test simulate videoplay back "
+		     "in order to validate DC3CO state "
+		     "while PSR2 is active and in SLEEP state");
+	igt_subtest("dc3co-vpb-simulation") {

This does not quite help me to understand what and why we are checking here.

As far as I understand we want to make sure that we reach DC3CO state between frames of videoplayback-like workload (when we have some idle frames but not enough of them to reach deeper C-state).

So, if my understanding is correct (and please correct me if I am wrong) something like this would work better:

"Make sure that we reach DC3CO power-saving state state with PSR2 panel when we have videoplayback-like display workload."

I would also like to see a normal C comment that explains DC3CO a bit, especially how it differs from DC5 and DC6 and expecations/interactions with idle frames.

Signature · 2 lines

Cheers,
Arek

Quoted 21 lines · Arkadiusz Hiler

Quoted 13 lines · Jeevan B

Add a subtest for DC3CO video playback case to generate selective frame update and validate that system stays in DC3CO state during execution.

v2: Changed PSR2 idle check to sleep check and addressed cosmetic changes.

v3: Renamed a function and restructured code according to Anshuman’s comments.

v4: Cosmetic changes.

Signed-off-by Jeevan B <[email protected]>

<SNIP>

tests/i915/i915_pm_dc.c static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count) · line 309

Quoted 3 lines

tests/i915/i915_pm_dc.c +3 -0

+static void setup_dc3co(data_t *data)
+{
+	igt_require(IS_TIGERLAKE(data->devid));

Is there a reason to make a check specific to TIGERLAKE here?

Quoted 3 lines

I think that better solution would be to add igt_require_dc_counter(CHECK_DC3CO) that would look for "DC3CO count" presence in i915_dmc_info.

We are checking DC3CO count in read_dc_counter(), it will check DC state count if counter not available then the test will skip.

In run_videoplayback we are using read_dc_counter() to check DC3CO count.

Here we added TGL check as we didn't want to check for any other platform. As DC3CO is only supported on TGL.
If you want us to remove TGL check, we will remove it.

Quoted 21 lines

This way you have feature check instead of encoding what is supported by which platforms in the tests - kernel should not advertise counters for things it does not support.

tests/i915/i915_pm_dc.c static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count) · line 288

Quoted 12 lines

tests/i915/i915_pm_dc.c +12 -0

+static void run_videoplayback(data_t *data, int dc_flag)
+{
+	igt_plane_t *primary;
+	uint32_t dc3co_prev_cnt;
+	int i, delay;
+
+	primary = igt_output_get_plane_type(data->output,
+					    DRM_PLANE_TYPE_PRIMARY);
+
+	igt_plane_set_fb(primary, NULL);
+
+	dc3co_prev_cnt = read_dc_counter(data->drm_fd, dc_flag);

I don't quite get why this is parametrized with dc_flag, when the name clearly says that we are testing for DC3CO. Just use CHECK_DC3CO directly.

Quoted 6 lines

tests/i915/i915_pm_dc.c static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count) · line 317

Quoted 2 lines

tests/i915/i915_pm_dc.c +2 -0

+static void test_dc3co_vpb_simulation(data_t *data, int dc_flag)
+{

Same here with dc_flag, you pass it few levels down to functions that are not generic and won't work with anything else than CHECK_DC3CO.

we need this flag because read_dc_counter() and check_dc_counter() are used for each DC states. (DC5:DC6:DC3CO)

Quoted 19 lines

tests/i915/i915_pm_dc.c int main(int argc, char *argv[]) · line 434

Quoted 11 lines

static void test_dc_state_psr(data_t *data, int dc_flag) {

tests/i915/i915_pm_dc.c +4 -0

 	uint32_t dc_counter_before_psr;

@@ -288,6 +428,13 @@ int main(int argc, char *argv[])
 			     "Can't open /dev/cpu/0/msr.\n");
 	}
 
+	igt_describe("This test simulate videoplay back "
+		     "in order to validate DC3CO state "
+		     "while PSR2 is active and in SLEEP state");
+	igt_subtest("dc3co-vpb-simulation") {

This does not quite help me to understand what and why we are checking here.

As far as I understand we want to make sure that we reach DC3CO state between frames of videoplayback-like workload (when we have some idle frames but not enough of them to reach deeper C-state).

Quoted 3 lines

So, if my understanding is correct (and please correct me if I am wrong) something like this would work better:

Yes, your understanding is correct. I will do the necessary change accordingly. Shall i change the test name to dc3co-vpb what is your opinion?

Quoted 7 lines

"Make sure that we reach DC3CO power-saving state state with PSR2 panel when we have videoplayback-like display workload."

I would also like to see a normal C comment that explains DC3CO a bit, especially how it differs from DC5 and DC6 and expecations/interactions with idle frames.

Sure, I will add it.

Add a subtest for DC3CO video playback case to generate selective frame update and validate that system stays in DC3CO state during execution.

v2: Changed PSR2 idle check to sleep check and addressed cosmetic changes.

v3: Renamed a function and restructured code according to Anshuman’s comments.

v4: Cosmetic changes.

Signed-off-by Jeevan B <[email protected]>

---
 lib/igt_psr.c           |  11 ++++
 lib/igt_psr.h           |   1 +
 tests/i915/i915_pm_dc.c | 149 +++++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 160 insertions(+), 1 deletion(-)

lib/igt_psr.c +11 -0

index b92ea73..7806ce9 100644
@@ -36,6 +36,17 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode)
 	return strstr(buf, state);
 }
 
+bool psr2_active_sleep_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+	const char *state = "SLEEP";
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, state);
+}
+
 static inline const char *psr_active_state_get(enum psr_mode mode)
 {
 	return mode == PSR_MODE_1 ? "SRDENT" : "DEEP_SLEEP";

lib/igt_psr.h +1 -0

index ca38573..a0627dc 100644
@@ -35,6 +35,7 @@ enum psr_mode {
 	PSR_MODE_2
 };
 
+bool psr2_active_sleep_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode);

tests/i915/i915_pm_dc.c +94 -1

index 19d8a78..c02c02e 100644
@@ -38,13 +38,20 @@
 #define CHECK_DC6	2
 #define CHECK_DC3CO     4
 
+/*Number of Frames Video Playback*/
+#define VIDEO_FRAMES 100
+
+typedef struct {
+	double r, g, b;
+} color_t;
+
 typedef struct {
 	int drm_fd;
 	int msr_fd;
 	int debugfs_fd;
 	uint32_t devid;
 	igt_display_t display;
-	struct igt_fb fb_white;
+	struct igt_fb fb_white, fb_rgb, fb_rgr;
 	enum psr_mode op_psr_mode;
 	drmModeModeInfo *mode;
 	igt_output_t *output;

@@ -114,6 +121,43 @@ static void cleanup_dc_psr(data_t *data)
 	igt_remove_fb(data->drm_fd, &data->fb_white);
 }
 
+static void cleanup_dc3co(data_t *data)
+{
+	igt_plane_t *primary;
+
+	primary = igt_output_get_plane_type(data->output,
+					    DRM_PLANE_TYPE_PRIMARY);
+	igt_plane_set_fb(primary, NULL);
+
+	/* Clear Frame Buffers */
+	igt_display_commit(&data->display);
+	igt_remove_fb(data->drm_fd, &data->fb_rgb);
+	igt_remove_fb(data->drm_fd, &data->fb_rgr);
+}
+
+static void paint_rectangles(data_t *data,
+			     drmModeModeInfo *mode,
+			     color_t *colors,
+			     igt_fb_t *fb)
+{
+	cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, fb);
+	int i, l = mode->hdisplay / 3;
+	int rows_remaining = mode->hdisplay % 3;
+
+	/* Paint 3 solid rectangles. */
+	for (i = 0 ; i < 3; i++) {
+		igt_paint_color(cr, i * l, 0, l, mode->vdisplay,
+				colors[i].r, colors[i].g, colors[i].b);
+	}
+
+	if (rows_remaining > 0)
+		igt_paint_color(cr, i * l, 0, rows_remaining, mode->vdisplay,
+				colors[i - 1].r, colors[i - 1].g,
+				colors[i - 1].b);
+
+	igt_put_cairo_ctx(data->drm_fd, fb, cr);
+}
+
 static void setup_primary(data_t *data)
 {
 	igt_plane_t *primary;

@@ -131,6 +175,25 @@ static void setup_primary(data_t *data)
 	igt_display_commit(&data->display);
 }
 
+static void create_color_fb(data_t *data, igt_fb_t *fb, color_t *fb_color)
+{
+	igt_plane_t *primary;
+	int fb_id;
+
+	primary = igt_output_get_plane_type(data->output,
+					    DRM_PLANE_TYPE_PRIMARY);
+
+	igt_plane_set_fb(primary, NULL);
+	fb_id = igt_create_fb(data->drm_fd,
+			      data->mode->hdisplay,
+			      data->mode->vdisplay,
+			      DRM_FORMAT_XRGB8888,
+			      LOCAL_DRM_FORMAT_MOD_NONE,
+			      fb);
+	igt_assert(fb_id);
+	paint_rectangles(data, data->mode, fb_color, fb);
+}
+
 static uint32_t get_dc_counter(char *dc_data)
 {
 	char *e;

@@ -171,6 +234,11 @@ static uint32_t read_dc_counter(uint32_t drm_fd, int dc_flag)
 	return get_dc_counter(str);
 }
 
+static bool psr2_wait_sleep_entry(int debugfs_fd)
+{
+	return igt_wait(psr2_active_sleep_check(debugfs_fd), 50, 10);
+}
+
 static bool dc_state_wait_entry(int drm_fd, int dc_flag, int prev_dc_count)
 {
 	return igt_wait(read_dc_counter(drm_fd, dc_flag) >

@@ -187,6 +255,78 @@ static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count)
 		     "%s state is not achieved\n", tmp);
 }
 
+static void setup_vpb(data_t *data)
+{
+	color_t red_green_blue[] = {
+		{ 1.0, 0.0, 0.0 },
+		{ 0.0, 1.0, 0.0 },
+		{ 0.0, 0.0, 1.0 },
+	};
+	color_t red_green_red[] = {
+		{ 1.0, 0.0, 0.0 },
+		{ 0.0, 1.0, 0.0 },
+		{ 1.0, 0.0, 0.0 },
+	};
+
+	setup_output(data);
+
+	create_color_fb(data, &data->fb_rgb, red_green_blue);
+	create_color_fb(data, &data->fb_rgr, red_green_red);
+}
+
+static void run_videoplayback(data_t *data, int dc_flag)
+{
+	igt_plane_t *primary;
+	uint32_t dc3co_prev_cnt;
+	int i, delay;
+

tests/i915/i915_pm_dc.c +24 -0

+		if (i % 2 == 0) {
+			igt_plane_set_fb(primary, &data->fb_rgb);
+			igt_display_commit(&data->display);
+		} else {
+			igt_plane_set_fb(primary, &data->fb_rgr);
+			igt_display_commit(&data->display);
+		}
+
+		usleep(delay);
+		igt_assert(psr2_wait_sleep_entry(data->debugfs_fd));
+	}
+	check_dc_counter(data->drm_fd, dc_flag, dc3co_prev_cnt);
+}
+
+static void setup_dc3co(data_t *data)
+{
+	igt_require(IS_TIGERLAKE(data->devid));
+	data->op_psr_mode = PSR_MODE_2;
+	psr_enable(data->debugfs_fd, data->op_psr_mode);
+	igt_require_f(edp_psr2_enabled(data),
+		      "PSR2 is not enabled\n");
+}
+
+static void test_dc3co_vpb_simulation(data_t *data, int dc_flag)

tests/i915/i915_pm_dc.c +10 -0

+	cleanup_dc3co(data);
+}
+
 static void test_dc_state_psr(data_t *data, int dc_flag)
 {
 	uint32_t dc_counter_before_psr;

@@ -288,6 +428,13 @@ int main(int argc, char *argv[])
 			     "Can't open /dev/cpu/0/msr.\n");
 	}
 
+	igt_describe("This test simulate videoplay back "
+		     "in order to validate DC3CO state "
+		     "while PSR2 is active and in SLEEP state");
+	igt_subtest("dc3co-vpb-simulation") {
+		test_dc3co_vpb_simulation(&data, CHECK_DC3CO);
+	}
+
 	igt_describe("This test validates display engine entry to DC5 state "
 		     "while PSR is active");
 	igt_subtest("dc5-psr") {

Signature · 6 lines

2.7.4

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