MIPS: Loongson: Rename LOONGSON1 to LOONGSON32
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PATCH 2/3 MIPS: Loongson: Rename LOONGSON1 to LOONGSON32
Old Loongson-2E/2F has been removed, new Loongson-2/3 use LOONGSON64, So rename LOONGSON1 to LOONGSON32 will make the naming style unified.
--- arch/mips/Kconfig | 6 +++--- arch/mips/include/asm/cpu-type.h | 2 +- arch/mips/include/asm/cpu.h | 2 +- arch/mips/include/asm/irqflags.h | 2 +- arch/mips/include/asm/module.h | 4 ++-- arch/mips/kernel/cpu-probe.c | 2 +- arch/mips/kernel/idle.c | 2 +- arch/mips/kernel/perf_event_mipsxx.c | 2 +- arch/mips/kernel/traps.c | 2 +- arch/mips/loongson32/Kconfig | 2 +- arch/mips/loongson32/Platform | 4 ++-- arch/mips/oprofile/common.c | 2 +- arch/mips/oprofile/op_model_mipsxx.c | 2 +- 13 files changed, 17 insertions(+), 17 deletions(-)
arch/mips/Kconfig +3 -3
@@ -1480,7 +1480,7 @@ config CPU_LOONGSON3_WORKAROUNDS config CPU_LOONGSON1B bool "Loongson 1B" depends on SYS_HAS_CPU_LOONGSON1B - select CPU_LOONGSON1 + select CPU_LOONGSON32 select LEDS_GPIO_REGISTER help The Loongson 1B is a 32-bit SoC, which implements the MIPS32
@@ -1490,7 +1490,7 @@ config CPU_LOONGSON1B config CPU_LOONGSON1C bool "Loongson 1C" depends on SYS_HAS_CPU_LOONGSON1C - select CPU_LOONGSON1 + select CPU_LOONGSON32 select LEDS_GPIO_REGISTER help The Loongson 1C is a 32-bit SoC, which implements the MIPS32
@@ -1853,7 +1853,7 @@ config SYS_SUPPORTS_ZBOOT_UART_PROM bool select SYS_SUPPORTS_ZBOOT -config CPU_LOONGSON1 +config CPU_LOONGSON32 bool select CPU_MIPS32 select CPU_MIPSR2
arch/mips/include/asm/cpu-type.h +1 -1
@@ -21,7 +21,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)#if defined(CONFIG_SYS_HAS_CPU_LOONGSON1B ) || \ defined(CONFIG_SYS_HAS_CPU_LOONGSON1C ) -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :#endif #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R1
arch/mips/include/asm/cpu.h +1 -1
@@ -312,7 +312,7 @@ enum cpu_type_enum {*/ CPU_4KC ,CPU_4KEC ,CPU_4KSC ,CPU_24K ,CPU_34K ,CPU_1004K ,CPU_74K ,CPU_ALCHEMY ,CPU_PR4450 ,CPU_BMIPS32 ,CPU_BMIPS3300 ,CPU_BMIPS4350 , -CPU_BMIPS4380 ,CPU_BMIPS5000 ,CPU_XBURST ,CPU_LOONGSON1 ,CPU_M14KC , +CPU_BMIPS4380 ,CPU_BMIPS5000 ,CPU_XBURST ,CPU_LOONGSON32 ,CPU_M14KC ,CPU_M14KEC ,CPU_INTERAPTIV ,CPU_P5600 ,CPU_PROAPTIV ,CPU_1074K , CPU_M5150, CPU_I6400, CPU_P6600, CPU_M6250,
arch/mips/include/asm/irqflags.h +1 -1
@@ -41,7 +41,7 @@ static inline unsigned long arch_local_irq_save(void)" .set push \n" " .set reorder \n" " .set noat \n" -#if defined(CONFIG_CPU_LOONGSON64 ) || defined (CONFIG_CPU_LOONGSON1 ) +#if defined(CONFIG_CPU_LOONGSON64 ) || defined (CONFIG_CPU_LOONGSON32 )" mfc0 %[flags], $12 \n" " di \n" #else
arch/mips/include/asm/module.h +2 -2
@@ -119,8 +119,8 @@ search_module_dbetables(unsigned long addr)#define MODULE_PROC_FAMILY "RM7000 "#elif definedCONFIG_CPU_SB1 #define MODULE_PROC_FAMILY "SB1 " -#elif definedCONFIG_CPU_LOONGSON1 -#define MODULE_PROC_FAMILY "LOONGSON1 " +#elif definedCONFIG_CPU_LOONGSON32 +#define MODULE_PROC_FAMILY "LOONGSON32 "#elif definedCONFIG_CPU_LOONGSON64 #define MODULE_PROC_FAMILY "LOONGSON64 "#elif definedCONFIG_CPU_CAVIUM_OCTEON
arch/mips/kernel/cpu-probe.c +1 -1
@@ -1557,7 +1557,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)case PRID_IMP_LOONGSON_32 :/* Loongson-1 */ decode_configs (c); - c->cputype =CPU_LOONGSON1 ; + c->cputype =CPU_LOONGSON32 ;switch (c->processor_id &PRID_REV_MASK ) {case PRID_REV_LOONGSON1B :
arch/mips/kernel/idle.c +1 -1
@@ -173,7 +173,7 @@ void __init check_wait(void)case CPU_CAVIUM_OCTEON2 :case CPU_CAVIUM_OCTEON3 :case CPU_XBURST : -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :case CPU_XLR :case CPU_XLP : cpu_wait = r4k_wait;
arch/mips/kernel/perf_event_mipsxx.c +1 -1
@@ -1764,7 +1764,7 @@ init_hw_perf_events(void) mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu.cache_event_map = &mipsxxcore_cache_map;break ; -case CPU_LOONGSON1 : +case CPU_LOONGSON32 : mipspmu.name ="mips/loongson1" ; mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu.cache_event_map = &mipsxxcore_cache_map;
arch/mips/kernel/traps.c +1 -1
@@ -1761,7 +1761,7 @@ static inline void parity_protection_init(void)case CPU_5KC :case CPU_5KE : -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :write_c0_ecc (0x80000000 );back_to_back_c0_hazard ();/* Set the PE bit (bit 31) in the c0_errctl register. */
arch/mips/loongson32/Kconfig +1 -1
@@ -38,7 +38,7 @@ endchoice menuconfig CEVT_CSRC_LS1X bool "Use PWM Timer for clockevent/clocksource" select MIPS_EXTERNAL_TIMER - depends on CPU_LOONGSON1 + depends on CPU_LOONGSON32 help This option changes the default clockevent/clocksource to PWM Timer, and is required by Loongson1 CPUFreq support.
arch/mips/loongson32/Platform +2 -2
@@ -1,4 +1,4 @@ -cflags-$(CONFIG_CPU_LOONGSON1) += -march=mips32r2 -Wa,--trap +cflags-$(CONFIG_CPU_LOONGSON32) += -march=mips32r2 -Wa,--trap platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32 -load-$(CONFIG_CPU_LOONGSON1) += 0xffffffff80200000 +load-$(CONFIG_CPU_LOONGSON32) += 0xffffffff80200000
arch/mips/oprofile/common.c +1 -1
@@ -92,7 +92,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)case CPU_P5600 :case CPU_I6400 :case CPU_M5150 : -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :case CPU_SB1 :case CPU_SB1A :case CPU_R10000 :
arch/mips/oprofile/op_model_mipsxx.c +1 -1
@@ -420,7 +420,7 @@ static int __init mipsxx_init(void) op_model_mipsxx_ops.cpu_type ="mips/sb1" ;break ; -case CPU_LOONGSON1 : +case CPU_LOONGSON32 : op_model_mipsxx_ops.cpu_type ="mips/loongson1" ;break ;
Signature · 1 line
2.7.0
Hi, all,
I have some trouble to send the first patch of this series, my first patch is "MIPS: Loongson: Remove Loongson-2E/2F support" and it is as big as 200KB+. I have tried many times but it doesn't appear in maillist (my personal e-mail can receive it).
Anyone has some methods? below is the summary of the first patch:
MAINTAINERS | 9 -
arch/mips/Kbuild.platforms | 1 - arch/mips/Kconfig | 80 +---- arch/mips/configs/fuloong2e_defconfig | 236 -------------- arch/mips/configs/lemote2f_defconfig | 351 --------------------- arch/mips/include/asm/bootinfo.h | 15 - arch/mips/include/asm/cpu-type.h | 4 - arch/mips/include/asm/cpu.h | 2 +- arch/mips/include/asm/hazards.h | 4 +- .../asm/mach-loongson2ef/cpu-feature-overrides.h | 44 --- .../include/asm/mach-loongson2ef/cs5536/cs5536.h | 306 ------------------ .../asm/mach-loongson2ef/cs5536/cs5536_mfgpt.h | 36 --- .../asm/mach-loongson2ef/cs5536/cs5536_pci.h | 153 --------- .../asm/mach-loongson2ef/cs5536/cs5536_vsm.h | 32 -- arch/mips/include/asm/mach-loongson2ef/loongson.h | 328 ------------------- arch/mips/include/asm/mach-loongson2ef/machine.h | 23 -- .../include/asm/mach-loongson2ef/mc146818rtc.h | 36 --- arch/mips/include/asm/mach-loongson2ef/mem.h | 37 --- arch/mips/include/asm/mach-loongson2ef/pci.h | 46 --- arch/mips/include/asm/mach-loongson2ef/spaces.h | 10 - .../asm/mach-loongson64/cpu-feature-overrides.h | 3 +- arch/mips/include/asm/module.h | 2 - arch/mips/include/asm/r4kcache.h | 23 +- arch/mips/kernel/cpu-probe.c | 14 - arch/mips/loongson2ef/Kconfig | 93 ------ arch/mips/loongson2ef/Makefile | 18 -- arch/mips/loongson2ef/Platform | 32 -- arch/mips/loongson2ef/common/Makefile | 27 -- arch/mips/loongson2ef/common/bonito-irq.c | 49 --- arch/mips/loongson2ef/common/cmdline.c | 44 --- arch/mips/loongson2ef/common/cs5536/Makefile | 12 - arch/mips/loongson2ef/common/cs5536/cs5536_acc.c | 136 -------- arch/mips/loongson2ef/common/cs5536/cs5536_ehci.c | 156 --------- arch/mips/loongson2ef/common/cs5536/cs5536_ide.c | 188 ----------- arch/mips/loongson2ef/common/cs5536/cs5536_isa.c | 326 ------------------- arch/mips/loongson2ef/common/cs5536/cs5536_mfgpt.c | 207 ------------ arch/mips/loongson2ef/common/cs5536/cs5536_ohci.c | 145 --------- arch/mips/loongson2ef/common/cs5536/cs5536_pci.c | 84 ----- arch/mips/loongson2ef/common/early_printk.c | 38 --- arch/mips/loongson2ef/common/env.c | 71 ----- arch/mips/loongson2ef/common/init.c | 51 --- arch/mips/loongson2ef/common/irq.c | 63 ---- arch/mips/loongson2ef/common/machtype.c | 62 ---- arch/mips/loongson2ef/common/mem.c | 120 ------- arch/mips/loongson2ef/common/pci.c | 89 ------ arch/mips/loongson2ef/common/platform.c | 27 -- arch/mips/loongson2ef/common/pm.c | 158 ---------- arch/mips/loongson2ef/common/reset.c | 73 ----- arch/mips/loongson2ef/common/rtc.c | 39 --- arch/mips/loongson2ef/common/serial.c | 86 ----- arch/mips/loongson2ef/common/setup.c | 30 -- arch/mips/loongson2ef/common/time.c | 28 -- arch/mips/loongson2ef/common/uart_base.c | 41 --- arch/mips/loongson2ef/fuloong-2e/Makefile | 6 - arch/mips/loongson2ef/fuloong-2e/dma.c | 12 - arch/mips/loongson2ef/fuloong-2e/irq.c | 65 ---- arch/mips/loongson2ef/fuloong-2e/reset.c | 19 -- arch/mips/loongson2ef/lemote-2f/Makefile | 12 - arch/mips/loongson2ef/lemote-2f/clock.c | 143 --------- arch/mips/loongson2ef/lemote-2f/dma.c | 14 - arch/mips/loongson2ef/lemote-2f/ec_kb3310b.c | 125 -------- arch/mips/loongson2ef/lemote-2f/ec_kb3310b.h | 184 ----------- arch/mips/loongson2ef/lemote-2f/irq.c | 126 -------- arch/mips/loongson2ef/lemote-2f/machtype.c | 41 --- arch/mips/loongson2ef/lemote-2f/pm.c | 145 --------- arch/mips/loongson2ef/lemote-2f/reset.c | 155 --------- arch/mips/mm/c-r4k.c | 69 +--- arch/mips/mm/tlb-r4k.c | 3 - arch/mips/mm/tlbex.c | 154 +++++---- arch/mips/oprofile/Makefile | 1 - arch/mips/oprofile/common.c | 4 - arch/mips/oprofile/op_model_loongson2.c | 161 ---------- arch/mips/pci/Makefile | 2 - arch/mips/pci/fixup-fuloong2e.c | 221 ------------- arch/mips/pci/fixup-lemote2f.c | 156 --------- arch/mips/pci/ops-loongson2.c | 213 ------------- drivers/cpufreq/Kconfig | 13 - drivers/cpufreq/Makefile | 1 - drivers/cpufreq/loongson2_cpufreq.c | 197 ------------ drivers/gpio/Kconfig | 4 +- 80 files changed, 88 insertions(+), 6446 deletions(-) delete mode 100644 arch/mips/configs/fuloong2e_defconfig delete mode 100644 arch/mips/configs/lemote2f_defconfig delete mode 100644 arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_mfgpt.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_vsm.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/loongson.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/machine.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/mc146818rtc.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/mem.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/pci.h delete mode 100644 arch/mips/include/asm/mach-loongson2ef/spaces.h delete mode 100644 arch/mips/loongson2ef/Kconfig delete mode 100644 arch/mips/loongson2ef/Makefile delete mode 100644 arch/mips/loongson2ef/Platform delete mode 100644 arch/mips/loongson2ef/common/Makefile delete mode 100644 arch/mips/loongson2ef/common/bonito-irq.c delete mode 100644 arch/mips/loongson2ef/common/cmdline.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/Makefile delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_acc.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_ehci.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_ide.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_isa.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_mfgpt.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_ohci.c delete mode 100644 arch/mips/loongson2ef/common/cs5536/cs5536_pci.c delete mode 100644 arch/mips/loongson2ef/common/early_printk.c delete mode 100644 arch/mips/loongson2ef/common/env.c delete mode 100644 arch/mips/loongson2ef/common/init.c delete mode 100644 arch/mips/loongson2ef/common/irq.c delete mode 100644 arch/mips/loongson2ef/common/machtype.c delete mode 100644 arch/mips/loongson2ef/common/mem.c delete mode 100644 arch/mips/loongson2ef/common/pci.c delete mode 100644 arch/mips/loongson2ef/common/platform.c delete mode 100644 arch/mips/loongson2ef/common/pm.c delete mode 100644 arch/mips/loongson2ef/common/reset.c delete mode 100644 arch/mips/loongson2ef/common/rtc.c delete mode 100644 arch/mips/loongson2ef/common/serial.c delete mode 100644 arch/mips/loongson2ef/common/setup.c delete mode 100644 arch/mips/loongson2ef/common/time.c delete mode 100644 arch/mips/loongson2ef/common/uart_base.c delete mode 100644 arch/mips/loongson2ef/fuloong-2e/Makefile delete mode 100644 arch/mips/loongson2ef/fuloong-2e/dma.c delete mode 100644 arch/mips/loongson2ef/fuloong-2e/irq.c delete mode 100644 arch/mips/loongson2ef/fuloong-2e/reset.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/Makefile delete mode 100644 arch/mips/loongson2ef/lemote-2f/clock.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/dma.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/ec_kb3310b.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/ec_kb3310b.h delete mode 100644 arch/mips/loongson2ef/lemote-2f/irq.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/machtype.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/pm.c delete mode 100644 arch/mips/loongson2ef/lemote-2f/reset.c delete mode 100644 arch/mips/oprofile/op_model_loongson2.c delete mode 100644 arch/mips/pci/fixup-fuloong2e.c delete mode 100644 arch/mips/pci/fixup-lemote2f.c delete mode 100644 arch/mips/pci/ops-loongson2.c delete mode 100644 drivers/cpufreq/loongson2_cpufreq.c
Quoted 211 lines · Huacai Chen
Old Loongson-2E/2F has been removed, new Loongson-2/3 use LOONGSON64, So rename LOONGSON1 to LOONGSON32 will make the naming style unified.
Signed-off-by Huacai Chen <[email protected]>--- arch/mips/Kconfig | 6 +++--- arch/mips/include/asm/cpu-type.h | 2 +- arch/mips/include/asm/cpu.h | 2 +- arch/mips/include/asm/irqflags.h | 2 +- arch/mips/include/asm/module.h | 4 ++-- arch/mips/kernel/cpu-probe.c | 2 +- arch/mips/kernel/idle.c | 2 +- arch/mips/kernel/perf_event_mipsxx.c | 2 +- arch/mips/kernel/traps.c | 2 +- arch/mips/loongson32/Kconfig | 2 +- arch/mips/loongson32/Platform | 4 ++-- arch/mips/oprofile/common.c | 2 +- arch/mips/oprofile/op_model_mipsxx.c | 2 +- 13 files changed, 17 insertions(+), 17 deletions(-)arch/mips/Kconfig +3
-3@@ -1480,7 +1480,7 @@ config CPU_LOONGSON3_WORKAROUNDS config CPU_LOONGSON1B bool "Loongson 1B" depends on SYS_HAS_CPU_LOONGSON1B - select CPU_LOONGSON1 + select CPU_LOONGSON32 select LEDS_GPIO_REGISTER help The Loongson 1B is a 32-bit SoC, which implements the MIPS32@@ -1490,7 +1490,7 @@ config CPU_LOONGSON1B config CPU_LOONGSON1C bool "Loongson 1C" depends on SYS_HAS_CPU_LOONGSON1C - select CPU_LOONGSON1 + select CPU_LOONGSON32 select LEDS_GPIO_REGISTER help The Loongson 1C is a 32-bit SoC, which implements the MIPS32@@ -1853,7 +1853,7 @@ config SYS_SUPPORTS_ZBOOT_UART_PROM bool select SYS_SUPPORTS_ZBOOT -config CPU_LOONGSON1 +config CPU_LOONGSON32 bool select CPU_MIPS32 select CPU_MIPSR2arch/mips/include/asm/cpu-type.h +1
-1@@ -21,7 +21,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)#if defined(CONFIG_SYS_HAS_CPU_LOONGSON1B ) || \ defined(CONFIG_SYS_HAS_CPU_LOONGSON1C ) -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :#endif #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R1 arch/mips/include/asm/cpu.h +1
-1@@ -312,7 +312,7 @@ enum cpu_type_enum {*/ CPU_4KC ,CPU_4KEC ,CPU_4KSC ,CPU_24K ,CPU_34K ,CPU_1004K ,CPU_74K ,CPU_ALCHEMY ,CPU_PR4450 ,CPU_BMIPS32 ,CPU_BMIPS3300 ,CPU_BMIPS4350 , -CPU_BMIPS4380 ,CPU_BMIPS5000 ,CPU_XBURST ,CPU_LOONGSON1 ,CPU_M14KC , +CPU_BMIPS4380 ,CPU_BMIPS5000 ,CPU_XBURST ,CPU_LOONGSON32 ,CPU_M14KC ,CPU_M14KEC ,CPU_INTERAPTIV ,CPU_P5600 ,CPU_PROAPTIV ,CPU_1074K , CPU_M5150, CPU_I6400, CPU_P6600, CPU_M6250,arch/mips/include/asm/irqflags.h +1
-1@@ -41,7 +41,7 @@ static inline unsigned long arch_local_irq_save(void)" .set push \n" " .set reorder \n" " .set noat \n" -#if defined(CONFIG_CPU_LOONGSON64 ) || defined (CONFIG_CPU_LOONGSON1 ) +#if defined(CONFIG_CPU_LOONGSON64 ) || defined (CONFIG_CPU_LOONGSON32 )" mfc0 %[flags], $12 \n" " di \n" #elsearch/mips/include/asm/module.h +2
-2@@ -119,8 +119,8 @@ search_module_dbetables(unsigned long addr)#define MODULE_PROC_FAMILY "RM7000 "#elif definedCONFIG_CPU_SB1 #define MODULE_PROC_FAMILY "SB1 " -#elif definedCONFIG_CPU_LOONGSON1 -#define MODULE_PROC_FAMILY "LOONGSON1 " +#elif definedCONFIG_CPU_LOONGSON32 +#define MODULE_PROC_FAMILY "LOONGSON32 "#elif definedCONFIG_CPU_LOONGSON64 #define MODULE_PROC_FAMILY "LOONGSON64 "#elif definedCONFIG_CPU_CAVIUM_OCTEON arch/mips/kernel/cpu-probe.c +1
-1@@ -1557,7 +1557,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)case PRID_IMP_LOONGSON_32 :/* Loongson-1 */ decode_configs (c); - c->cputype =CPU_LOONGSON1 ; + c->cputype =CPU_LOONGSON32 ;switch (c->processor_id &PRID_REV_MASK ) {case PRID_REV_LOONGSON1B :arch/mips/kernel/idle.c +1
-1@@ -173,7 +173,7 @@ void __init check_wait(void)case CPU_CAVIUM_OCTEON2 :case CPU_CAVIUM_OCTEON3 :case CPU_XBURST : -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :case CPU_XLR :case CPU_XLP : cpu_wait = r4k_wait;arch/mips/kernel/perf_event_mipsxx.c +1
-1@@ -1764,7 +1764,7 @@ init_hw_perf_events(void) mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu.cache_event_map = &mipsxxcore_cache_map;break ; -case CPU_LOONGSON1 : +case CPU_LOONGSON32 : mipspmu.name ="mips/loongson1" ; mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu.cache_event_map = &mipsxxcore_cache_map;arch/mips/kernel/traps.c +1
-1@@ -1761,7 +1761,7 @@ static inline void parity_protection_init(void)case CPU_5KC :case CPU_5KE : -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :write_c0_ecc (0x80000000 );back_to_back_c0_hazard ();/* Set the PE bit (bit 31) in the c0_errctl register. */ arch/mips/loongson32/Kconfig +1
-1@@ -38,7 +38,7 @@ endchoice menuconfig CEVT_CSRC_LS1X bool "Use PWM Timer for clockevent/clocksource" select MIPS_EXTERNAL_TIMER - depends on CPU_LOONGSON1 + depends on CPU_LOONGSON32 help This option changes the default clockevent/clocksource to PWM Timer, and is required by Loongson1 CPUFreq support.arch/mips/loongson32/Platform +2
-2@@ -1,4 +1,4 @@ -cflags-$(CONFIG_CPU_LOONGSON1) += -march=mips32r2 -Wa,--trap +cflags-$(CONFIG_CPU_LOONGSON32) += -march=mips32r2 -Wa,--trap platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32 -load-$(CONFIG_CPU_LOONGSON1) += 0xffffffff80200000 +load-$(CONFIG_CPU_LOONGSON32) += 0xffffffff80200000arch/mips/oprofile/common.c +1
-1@@ -92,7 +92,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)case CPU_P5600 :case CPU_I6400 :case CPU_M5150 : -case CPU_LOONGSON1 : +case CPU_LOONGSON32 :case CPU_SB1 :case CPU_SB1A :case CPU_R10000 :arch/mips/oprofile/op_model_mipsxx.c +1
-2@@ -420,7 +420,7 @@ static int __init mipsxx_init(void) op_model_mipsxx_ops.cpu_type ="mips/sb1" ;break ; -case CPU_LOONGSON1 : +case CPU_LOONGSON32 : op_model_mipsxx_ops.cpu_type ="mips/loongson1" ;break ; --2.7.0
PATCH 3/3 MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage
In reply to a message not in the archiveThere are mixed LOONGSON3/LOONGSON64 usages in recently changes, let's establish some rules:
1, In Kconfig symbols, we only use CPU_LOONGSON64, MACH_LOONGSON64 and SYS_HAS_CPU_LOONGSON64, all other derived symbols use "LOONGSON3" since they all not widely-used symbols and sometimes not suitable for all 64-bit Loongson processors. E.g., we use symbols LOONGSON3_ENHANCEMENT, CPU_LOONGSON3_WORKAROUNDS, etc.
2, Hide GSx64/GSx64E in Kconfig title since it is not useful for general users. However, in the full description we use a more detailed manner. E.g., GS264/GS464/GS464E/GS464V.
All Kconfig titles and descriptions of Loongson processors and machines have also been updated in this patch for consistency.
--- arch/mips/Kconfig | 39 +++++++++++++++++++++++---------------- arch/mips/include/asm/hazards.h | 4 ++-- arch/mips/loongson64/Kconfig | 2 +- 3 files changed, 26 insertions(+), 19 deletions(-)
arch/mips/Kconfig +23 -16
@@ -444,7 +444,7 @@ config LASAT select SYS_SUPPORTS_LITTLE_ENDIAN config MACH_LOONGSON32 - bool "Loongson-1 family of machines" + bool "Loongson 32-bit family of machines" select SYS_SUPPORTS_ZBOOT help This enables support for the Loongson-1 family of machines.
@@ -454,7 +454,7 @@ config MACH_LOONGSON32 Sciences (CAS). config MACH_LOONGSON64 - bool "Loongson-2/3 GSx64 family of machines" + bool "Loongson 64-bit family of machines" select ARCH_SPARSEMEM_ENABLE select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_MIGHT_HAVE_PC_SERIO
@@ -483,8 +483,12 @@ config MACH_LOONGSON64 select ZONE_DMA32 select NUMA help - This enables the support of Loongson-2/3 family of processors with - GSx64 microarchitecture. + This enables the support of Loongson-2/3 family of machines. + + Loongson-2 and Loongson-3 are 64-bit general-purpose processors with + GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E + and Loongson-2F which have been removed), developed by the Institute + of Computing Technology (ICT), Chinese Academy of Sciences (CAS). config MACH_PISTACHIO bool "IMG Pistachio SoC based boards"
@@ -1425,7 +1429,7 @@ choice default CPU_R4X00 config CPU_LOONGSON64 - bool "Loongson GSx64 CPU" + bool "Loongson 64-bit CPU" depends on SYS_HAS_CPU_LOONGSON64 select ARCH_HAS_PHYS_TO_DMA select CPU_SUPPORTS_64BIT_KERNEL
@@ -1441,17 +1445,20 @@ config CPU_LOONGSON64 select GPIOLIB select SWIOTLB help - The Loongson GSx64 series of processor cores implements the - MIPS64R2 instruction set with many extensions. + The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor + cores implements the MIPS64R2 instruction set with many extensions, + including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, + 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old + Loongson-2E and Loongson-2F have been removed now. -config LOONGSON64_ENHANCEMENT - bool "New Loongson GSx64E CPU Enhancements" +config LOONGSON3_ENHANCEMENT + bool "New Loongson-3 CPU Enhancements" default n select CPU_MIPSR2 select CPU_HAS_PREFETCH depends on CPU_LOONGSON64 help - New Loongson GSx64E cores (since Loongson-3A R2, as opposed to Loongson-3A + New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
@@ -1460,17 +1467,17 @@ config LOONGSON64_ENHANCEMENT This option enable those enhancements which are not probed at run time. If you want a generic kernel to run on all Loongson 3 machines, please say 'N' here. If you want a high-performance kernel to run on - new Loongson 3 machines only, please say 'Y' here. + new Loongson-3 machines only, please say 'Y' here. config CPU_LOONGSON3_WORKAROUNDS - bool "Old Loongson 3 LLSC Workarounds" + bool "Old Loongson-3 LLSC Workarounds" default y if SMP depends on CPU_LOONGSON64 help - Loongson 3 processors have the llsc issues which require workarounds. + Loongson-3 processors have the llsc issues which require workarounds. Without workarounds the system may hang unexpectedly. - Newer Loongson 3 will fix these issues and no workarounds are needed. + Newer Loongson-3 will fix these issues and no workarounds are needed. The workarounds have no significant side effect on them but may decrease the performance of the system so this option should be disabled unless the kernel is intended to be run on old systems.
@@ -1478,7 +1485,7 @@ config CPU_LOONGSON3_WORKAROUNDS If unsure, please say Y. config CPU_LOONGSON1B - bool "Loongson 1B" + bool "Loongson 1B CPU" depends on SYS_HAS_CPU_LOONGSON1B select CPU_LOONGSON32 select LEDS_GPIO_REGISTER
@@ -1488,7 +1495,7 @@ config CPU_LOONGSON1B instruction set. config CPU_LOONGSON1C - bool "Loongson 1C" + bool "Loongson 1C CPU" depends on SYS_HAS_CPU_LOONGSON1C select CPU_LOONGSON32 select LEDS_GPIO_REGISTER
arch/mips/include/asm/hazards.h +2 -2
@@ -23,7 +23,7 @@* TLB hazards */ #if (defined(CONFIG_CPU_MIPSR2 ) || defined(CONFIG_CPU_MIPSR6 )) && \ - !defined(CONFIG_CPU_CAVIUM_OCTEON ) && !defined(CONFIG_LOONGSON64_ENHANCEMENT ) + !defined(CONFIG_CPU_CAVIUM_OCTEON ) && !defined(CONFIG_LOONGSON3_ENHANCEMENT )/* * MIPSR2 defines ehb for hazard avoidance
@@ -159,7 +159,7 @@ do { \#elif defined(CONFIG_MIPS_ALCHEMY ) || defined(CONFIG_CPU_CAVIUM_OCTEON ) || \ defined(CONFIG_CPU_R10000 ) || defined(CONFIG_CPU_R5500 ) || defined(CONFIG_CPU_XLR ) || \ - defined(CONFIG_LOONGSON64_ENHANCEMENT ) + defined(CONFIG_LOONGSON3_ENHANCEMENT )/* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
arch/mips/loongson64/Kconfig +1 -1
@@ -3,7 +3,7 @@ if MACH_LOONGSON64 config RS780_HPET bool "RS780/SBX00 HPET Timer" - depends on CONFIG_MACH_LOONGSON64 + depends on MACH_LOONGSON64 select MIPS_EXTERNAL_TIMER help This option enables the hpet timer of AMD RS780/SBX00.
Signature · 1 line
2.7.0
Jiaxun Yang
maintainerRe: [PATCH 3/3] MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage
Quoted 13 lines · Huacai Chen
There are mixed LOONGSON3/LOONGSON64 usages in recently changes, let's establish some rules:
1, In
Kconfigsymbols, we only useCPU_LOONGSON64,MACH_LOONGSON64andSYS_HAS_CPU_LOONGSON64, all other derived symbols use "LOONGSON3" since they all not widely-used symbols and sometimes not suitable for all 64-bit Loongson processors. E.g., we use symbolsLOONGSON3_ENHANCEMENT,CPU_LOONGSON3_WORKAROUNDS, etc.2, Hide GSx64/GSx64E in
Kconfigtitle since it is not useful for general users. However, in the full description we use a more detailed manner. E.g., GS264/GS464/GS464E/GS464V.
Quoted 5 lines
All
Kconfigtitles and descriptions of Loongson processors and machines have also been updated in this patch for consistency.Signed-off-by Huacai Chen <[email protected]>---Acked-by: Jiaxun Yang <[email protected]>
Thanks!
I'll obey your rules.
--
Jiaxun Yang
Re: [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support
In reply to a message not in the archiveQuoted 2 lines · Huacai Chen
Loongson-2E/2F is old, inactive and a bit ugly, so let's remove them and the world will be more comfortable.
People still use them, e.g. I do, and upstream removal causes an issue
with the need to backport changes not specific to the platform.
If you don't want to maintain the code, then just mark it orphan and rely
on the community to maintain it. If it starts breaking and nobody picks it to make fixes, then it can be removed. There's no need to rush IMO.
BTW, there used to be a patch somewhere to support more than 512MiB of
DRAM with the 2E, but I can't find it -- can you help me tracking it down?
Maciej
Re: [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support
Hi, Maciej,
Quoted 9 lines · Maciej W. Rozycki
Quoted 2 lines · Huacai Chen
Loongson-2E/2F is old, inactive and a bit ugly, so let's remove them and the world will be more comfortable.
People still use them, e.g. I do, and upstream removal causes an issue
with the need to backport changes not specific to the platform.
Quoted 7 lines
If you don't want to maintain the code, then just mark it orphan and rely
on the community to maintain it. If it starts breaking and nobody picks it to make fixes, then it can be removed. There's no need to rush IMO.BTW, there used to be a patch somewhere to support more than 512MiB of
DRAM with the 2E, but I can't find it -- can you help me tracking it down?
OK, we will keep Loongson-2E/2F in kernel for sometime, thanks.
Huacai
Quoted 1 line
Maciej
Jiaxun Yang
maintainerRe: [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support
In reply to Maciej W. Rozycki于 2019年11月4日 GMT+08:00 上午7:08:26, "Maciej W. Rozycki" <[email protected]> 写到:
Quoted 8 lines · Huacai Chen
Quoted 3 lines
Loongson-2E/2F is old, inactive and a bit ugly, so let's remove them and the world will be more comfortable.
People still use them, e.g. I do, and upstream removal causes an issue with the need to backport changes not specific to the platform.
Quoted 8 lines
If you don't want to maintain the code, then just mark it orphan and rely
on the community to maintain it. If it starts breaking and nobody picks
it to make fixes, then it can be removed. There's no need to rush IMO.BTW, there used to be a patch somewhere to support more than 512MiB of DRAM with the 2E, but I can't find it -- can you help me tracking it
Hi Maciej
It seems like DRAM size issue is a firmware issue rather than kernel issue, some early versions of PMON don't pass highmem size correctly to the Kernel. Probably you can manually set it in loongson-2ef/common/mem.c?
Currently I can't find any working Fuloong-2E to test but the newest known PMON can be found here[1].
Thanks
[1] https://mirrors4.tuna.tsinghua.edu.cn/loongson/pmon/pmon_2e.bin
https://mirrors4.tuna.tsinghua.edu.cn/loongson/pmon/pmon_2e.bin.md5
Signature · 1 line
Jiaxun Yang
Re: [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support
Hi Jiaxun,
Quoted 9 lines · Jiaxun Yang
Quoted 2 lines
BTW, there used to be a patch somewhere to support more than 512MiB of DRAM with the 2E, but I can't find it -- can you help me tracking it
Hi Maciej
It seems like DRAM size issue is a firmware issue rather than kernel issue, some early versions of PMON don't pass highmem size correctly to the Kernel.
Probably you can manually set it in loongson-2ef/common/mem.c?
Not really, the size was passed correctly, but something was set wrong in
the chipset that caused the kernel to crash if access to upper 512MiB was allowed with a 1GiB SODIMM. I had to strap memory regions manually to keep the system working, as follows:
karg = "console=tty root=/dev/hda2 mem=256M@0 mem=256M@512M"
Yeah, I knew upgrading the firmware was the right way, but I was being a
coward about flashing, fearing I could brick the machine.
Quoted 7 lines
Currently I can't find any working Fuloong-2E to test but the newest known PMON can be found here[1].
Thanks
[1] https://mirrors4.tuna.tsinghua.edu.cn/loongson/pmon/pmon_2e.bin
https://mirrors4.tuna.tsinghua.edu.cn/loongson/pmon/pmon_2e.bin.md5
So I went ahead and I have now actually flashed the newer firmware. My
cowardice still told me not to take it lightly, so I waited until I travelled to my other site where I could power the machine via a UPS.
Results have been good and the extra RAM let me upgrade the 32-bit Debian
system installed to Debian 7 "Wheezy" without making the system swap to death. This is actually the final Debian release to support Fuloong-2E, as the MIPS port was skipped with Debian 8 "Jessie" and Debian 9 "Stretch" requires a MIPS R2 processor to run, and Fuloong-2E only supports the MIPS III ISA (plus vendor extensions). It would have saved me a lot of hassle, if it was more clearly stated at: <https://www.debian.org/ports/mips/>.
A further issue that caused me some pain was with Firefox, which did not
run and crashed with SIGILL right away. Eventually I figured out it was on a MIPS IV FPU instruction (MOVT IIRC) despite Firefox having been built for MIPS II. After a further research I realised a JIT compiler had been added to the browser at one point for JavaScript execution, and it must have been incorrectly set to produce code for an ISA beyond one Firefox has been built for.
As I think it's unlikely anyone will backport a fix let alone build a
MIPS Firefox binary for Debian 7, I went for a workaround instead and disabled JIT compilation with a:
user_pref("javascript.options.baselinejit", false);
entry added to `prefs.js'. That let Firefox run normally.
I guess these bits of information may still be useful to someone, so I
decided to post them; after so many years I still find Fuloong-2E a great machine and still very usable. I'll try to find some time to polish this a little and include with <https://www.linux-mips.org/wiki/Fuloong_2E>.
I think it would make sense to have a copy of the firmware image there too.
Thanks for encouraging me to upgrade the firmware and providing a link!
Maciej
Re: [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support
In reply to a message not in the archiveHi Huacai,
Quoted 10 lines · Huacai Chen
Loongson-2E/2F is old, inactive and a bit ugly, so let's remove them and the world will be more comfortable.
Old:
Products with Loongson-2E/2F are more than ten years old, there is no new products.Inactive:
There are not any updates for a long time, and the maintainer (Jiaxun Yang) focuses on Loongson-3 now.
Jiaxun just made changes to the 2E/2F code just a couple of weeks ago to separate it from other Loongson64 support & clean it up - he also indicated at the same time that he intends to contiue maintaining this code [1].
Quoted 3 lines
Ugly:
Loongson-2E/2F are not compatible with regular MIPS, e.g., ebase, cache flush method and tlb refill handler.
Sadly "quirks" like this aren't solely the domain of Loongson 2E/2F machines, so this isn't an unusual burden.
Quoted 2 lines
Linux-5.4.x is a LTS release, I think it is the suitable time to remove Loongson-2E/2F.
I disagree - Jiaxun says he's happy to maintain the platform & has recently been working on it. I'm not going to remove it & deny him that chance. If it does indeed become unmaintained then sure let's drop it, but that doesn't seem to be the case here.
Thanks,
Paul
Re: [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support
Hi, Paul
Quoted 27 lines · Paul Burton
Hi Huacai,
Quoted 10 lines · Huacai Chen
Loongson-2E/2F is old, inactive and a bit ugly, so let's remove them and the world will be more comfortable.
Old:
Products with Loongson-2E/2F are more than ten years old, there is no new products.Inactive:
There are not any updates for a long time, and the maintainer (Jiaxun Yang) focuses on Loongson-3 now.Jiaxun just made changes to the 2E/2F code just a couple of weeks ago to separate it from other Loongson64 support & clean it up - he also indicated at the same time that he intends to contiue maintaining this code [1].
Quoted 3 lines
Ugly:
Loongson-2E/2F are not compatible with regular MIPS, e.g., ebase, cache flush method and tlb refill handler.Sadly "quirks" like this aren't solely the domain of Loongson 2E/2F machines, so this isn't an unusual burden.
Quoted 8 lines
Quoted 2 lines
Linux-5.4.x is a LTS release, I think it is the suitable time to remove Loongson-2E/2F.
I disagree - Jiaxun says he's happy to maintain the platform & has recently been working on it. I'm not going to remove it & deny him that chance. If it does indeed become unmaintained then sure let's drop it, but that doesn't seem to be the case here.
OK, I will keep Loongson-2E/2F in the kernel, and please review my other patches. Thanks.
Huacai
Quoted 4 lines
Thanks,
Paul