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s390x: Testing the Channel Subsystem I/O

PATCH Superseded Pierre Morel 5 participants 41 messages Nov 28, 2019 – Dec 6, 2019

Subsystems (2)

v2 of 13 Superseded Latest is v13 →

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#0 lore raw

v2 cover s390x: Testing the Channel Subsystem I/O

Goal of the series is to have a framwork to test Channel-Subsystem I/O with QEMU/KVM.

To be able to support interrupt for CSS I/O and for SCLP we need to modify the interrupt framework to allow re-entrant interruptions.

Making the interrupt handler weak allows the test programm to define its own interrupt handler. We need to do special work under interrupt like acknoledging the interrupt.

Being working on PSW bits to allow I/O interrupt, we define all PSW bits in a dedicated file.

The simple test tests the I/O reading by the SUB Channel. It needs QEMU to be patched to have the pong device defined.
The pong device answers, for now, with a Hello World to the read request.

Pierre Morel (9):
s390x: saving regs for interrupts
s390x: Define the PSW bits
s390x: irq: make IRQ handler weak
s390x: export the clock get_clock_ms() utility
s390x: Library resources for CSS tests
s390x: css: stsch, enumeration test
s390x: css: msch, enable test
s390x: css: ssch/tsch with sense and interrupt
s390x: css: ping pong

 lib/s390x/asm/arch_bits.h |  20 +++
 lib/s390x/asm/arch_def.h  |   6 +-
 lib/s390x/asm/clock.h     |  25 ++++
 lib/s390x/css.h           | 282 ++++++++++++++++++++++++++++++++++++
 lib/s390x/css_dump.c      | 147 +++++++++++++++++++
 lib/s390x/interrupt.c     |   2 +-
 s390x/Makefile            |   4 +-
 s390x/css.c               | 294 ++++++++++++++++++++++++++++++++++++++
 s390x/cstart64.S          |  38 +++--
 s390x/intercept.c         |  11 +-
 s390x/unittests.cfg       |   4 +
 11 files changed, 809 insertions(+), 24 deletions(-)
 create mode 100644 lib/s390x/asm/arch_bits.h
 create mode 100644 lib/s390x/asm/clock.h
 create mode 100644 lib/s390x/css.h
 create mode 100644 lib/s390x/css_dump.c
 create mode 100644 s390x/css.c
Signature · 10 lines
2.17.0

Changelog:
- saving floating point registers (David, Janosh)
- suppress unused PSW bits defintions (Janosh)
- added Thomas reviewed-by
- style and comments modifications (Connie, Janosh)
- moved get_clock_ms() into headers and use it (Thomas)
- separate header and library utility from tests
- Suppress traces, separate tests, make better usage of reports
#1 lore raw

PATCH v2 1/9 s390x: saving regs for interrupts

If we use multiple source of interrupts, for exemple, using SCLP console to print information while using I/O interrupts, we need to have a re-entrant register saving interruption handling.

Instead of saving at a static memory address, let's save the base registers and the floating point registers on the stack.

Note that we keep the static register saving to recover from the RESET tests.

---
 s390x/cstart64.S | 25 +++++++++++++++++++++++--
 1 file changed, 23 insertions(+), 2 deletions(-)
s390x/cstart64.S +23 -2
index 399ae9b..525c464 100644
@@ -118,6 +118,25 @@ memsetxc:
 	lmg	%r0, %r15, GEN_LC_SW_INT_GRS
 	.endm
 
+	.macro SAVE_IRQ_REGS
+	slgfi   %r15, 15 * 8
+	stmg    %r0, %r14, 0(%r15)
+	slgfi   %r15, 16 * 8
+	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	std	\i, \i * 8(%r15)
+	.endr
+	lgr     %r2, %r15
+	.endm
+
+	.macro RESTORE_IRQ_REGS
+	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	ld	\i, \i * 8(%r15)
+	.endr
+	algfi   %r15, 16 * 8
+	lmg     %r0, %r14, 0(%r15)
+	algfi   %r15, 15 * 8
+	.endm
+
 .section .text
 /*
  * load_reset calling convention:
@@ -154,6 +173,8 @@ diag308_load_reset:
 	lpswe	GEN_LC_SW_INT_PSW
 1:	br	%r14
 
+
+
 .globl smp_cpu_setup_state
 smp_cpu_setup_state:
 	xgr	%r1, %r1
@@ -180,9 +201,9 @@ mcck_int:
 	lpswe	GEN_LC_MCCK_OLD_PSW
 
 io_int:
-	SAVE_REGS
+	SAVE_IRQ_REGS
 	brasl	%r14, handle_io_int
-	RESTORE_REGS
+	RESTORE_IRQ_REGS
 	lpswe	GEN_LC_IO_OLD_PSW
 
 svc_int:
Signature · 1 line
2.17.0
#2 lore raw

PATCH v2 2/9 s390x: Define the PSW bits

In reply to Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

---
 lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
 lib/s390x/asm/arch_def.h  |  6 ++----
 s390x/cstart64.S          | 13 +++++++------
 3 files changed, 29 insertions(+), 10 deletions(-)
 create mode 100644 lib/s390x/asm/arch_bits.h
lib/s390x/asm/arch_bits.h new file +20 -0
new file mode 100644
index 0000000..a77489a
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2019 IBM Corp
+ *
+ * Authors:
+ *  Pierre Morel <[email protected]>
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2.
+ */
+#ifndef _ASM_S390X_ARCH_BITS_H_
+#define _ASM_S390X_ARCH_BITS_H_
+
+#define PSW_MASK_IO		0x0200000000000000
+#define PSW_MASK_EXT		0x0100000000000000
+#define PSW_MASK_EA		0x0000000100000000
+#define PSW_MASK_BA		0x0000000080000000
+
+#define PSW_EXCEPTION_MASK (PSW_MASK_EA|PSW_MASK_BA)
+
+#endif
lib/s390x/asm/arch_def.h +2 -4
index cf6e1ca..ee7ace2 100644
@@ -10,15 +10,13 @@
 #ifndef _ASM_S390X_ARCH_DEF_H_
 #define _ASM_S390X_ARCH_DEF_H_
 
+#include <asm/arch_bits.h>
+
 struct psw {
 	uint64_t	mask;
 	uint64_t	addr;
 };
 
-#define PSW_MASK_EXT			0x0100000000000000UL
-#define PSW_MASK_DAT			0x0400000000000000UL
-#define PSW_MASK_PSTATE			0x0001000000000000UL
-
 #define CR0_EXTM_SCLP			0X0000000000000200UL
 #define CR0_EXTM_EXTC			0X0000000000002000UL
 #define CR0_EXTM_EMGC			0X0000000000004000UL
s390x/cstart64.S +7 -6
index 525c464..44caf7a 100644
@@ -11,6 +11,7 @@
  * under the terms of the GNU Library General Public License version 2.
  */
 #include <asm/asm-offsets.h>
+#include <asm/arch_bits.h>
 #include <asm/sigp.h>
 
 .section .init
@@ -216,17 +217,17 @@ svc_int:
 reset_psw:
 	.quad	0x0008000180000000
 initial_psw:
-	.quad	0x0000000180000000, clear_bss_start
+	.quad	PSW_EXCEPTION_MASK, clear_bss_start
 pgm_int_psw:
-	.quad	0x0000000180000000, pgm_int
+	.quad	PSW_EXCEPTION_MASK, pgm_int
 ext_int_psw:
-	.quad	0x0000000180000000, ext_int
+	.quad	PSW_EXCEPTION_MASK, ext_int
 mcck_int_psw:
-	.quad	0x0000000180000000, mcck_int
+	.quad	PSW_EXCEPTION_MASK, mcck_int
 io_int_psw:
-	.quad	0x0000000180000000, io_int
+	.quad	PSW_EXCEPTION_MASK, io_int
 svc_int_psw:
-	.quad	0x0000000180000000, svc_int
+	.quad	PSW_EXCEPTION_MASK, svc_int
 initial_cr0:
 	/* enable AFP-register control, so FP regs (+BFP instr) can be used */
 	.quad	0x0000000000040000
Signature · 1 line
2.17.0
#3 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

Quoted 7 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

---
 lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
 lib/s390x/asm/arch_def.h  |  6 ++----

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

(none of your other patches touch arch_bits.h - and it is somewhat a weird name. Where to put something new: arch_def.h or arch_bits.h? I would have understood "psw.h", but even that, I don't consider necessary)

Signature · 3 lines
Thanks,

David / dhildenb
#4 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

Quoted 10 lines · David Hildenbrand
Quoted 7 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

---
  lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
  lib/s390x/asm/arch_def.h  |  6 ++----

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

no because arch_def.h contains C structures and inline.

Quoted 5 lines

(none of your other patches touch arch_bits.h - and it is somewhat a weird name. Where to put something new: arch_def.h or arch_bits.h? I would have understood "psw.h", but even that, I don't consider necessary)

I can use a name like psw.h or let fall and keep the hexa.

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#5 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

Quoted 10 lines

Am 28.11.2019 um 20:16 schrieb Pierre Morel <[email protected]>:



Quoted 5 lines · David Hildenbrand
Quoted 4 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
---
 lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
 lib/s390x/asm/arch_def.h  |  6 ++----

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

no because arch_def.h contains C structures and inline.

(resend because the iOS Mail app does crazy html thingies)

You‘re looking for

#ifndef __ASSEMBLER__
...

See lib/s390x/asm/sigp.h

#6 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

Quoted 19 lines · David Hildenbrand
Quoted 10 lines

Am 28.11.2019 um 20:16 schrieb Pierre Morel <[email protected]>:



Quoted 5 lines · David Hildenbrand
Quoted 4 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
---
  lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
  lib/s390x/asm/arch_def.h  |  6 ++----

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

no because arch_def.h contains C structures and inline.

Quoted 9 lines

(resend because the iOS Mail app does crazy html thingies)

You‘re looking for

#ifndef __ASSEMBLER__
...

See lib/s390x/asm/sigp.h

Yes, better. :)

Thanks,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#7 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

In reply to David Hildenbrand
Quoted 9 lines · David Hildenbrand
Quoted 7 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

---
 lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
 lib/s390x/asm/arch_def.h  |  6 ++----
Quoted 7 lines

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

(none of your other patches touch arch_bits.h - and it is somewhat a weird name. Where to put something new: arch_def.h or arch_bits.h? I would have understood "psw.h", but even that, I don't consider necessary)

On a related note:
I'd still like to split up the file soonish, maybe moving the functions into a new file?

@Thomas/David: What's your opinion on that?

#8 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

Quoted 18 lines · Janosch Frank
Quoted 9 lines · David Hildenbrand
Quoted 7 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

---
 lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
 lib/s390x/asm/arch_def.h  |  6 ++----
Quoted 7 lines

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

(none of your other patches touch arch_bits.h - and it is somewhat a weird name. Where to put something new: arch_def.h or arch_bits.h? I would have understood "psw.h", but even that, I don't consider necessary)

Quoted 5 lines

On a related note:
I'd still like to split up the file soonish, maybe moving the functions into a new file?

@Thomas/David: What's your opinion on that?

Sure, as long as the file header is not longer as its actual content :D

Signature · 3 lines
Thanks,

David / dhildenb
#9 lore raw

Re: [kvm-unit-tests PATCH v2 2/9] s390x: Define the PSW bits

Quoted 19 lines · David Hildenbrand
Quoted 18 lines · Janosch Frank
Quoted 16 lines · David Hildenbrand
Quoted 7 lines · Pierre Morel

Let's define the PSW bits explicitly, it will clarify their usage.

---
  lib/s390x/asm/arch_bits.h | 20 ++++++++++++++++++++
  lib/s390x/asm/arch_def.h  |  6 ++----

I'm sorry, but I don't really see a reason to move these 4/5 defines to a separate header. Can you just keep them in arch_def.h and extend?

(none of your other patches touch arch_bits.h - and it is somewhat a weird name. Where to put something new: arch_def.h or arch_bits.h? I would have understood "psw.h", but even that, I don't consider necessary)

Quoted 8 lines
Quoted 5 lines

On a related note:
I'd still like to split up the file soonish, maybe moving the functions into a new file?

@Thomas/David: What's your opinion on that?

Sure, as long as the file header is not longer as its actual content :D

No problem for me.
What should the file header be?

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#10 lore raw

PATCH v2 3/9 s390x: irq: make IRQ handler weak

In reply to Pierre Morel

Having a weak function allows the tests programm to declare its own IRQ handler.
This is helpfull for I/O tests to have the I/O IRQ handler having its special work to do.

---
 lib/s390x/interrupt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
lib/s390x/interrupt.c +1 -1
index 3e07867..d70fde3 100644
@@ -140,7 +140,7 @@ void handle_mcck_int(void)
 		     lc->mcck_old_psw.addr);
 }
 
-void handle_io_int(void)
+__attribute__((weak)) void handle_io_int(void)
 {
 	report_abort("Unexpected io interrupt: at %#lx",
 		     lc->io_old_psw.addr);
Signature · 1 line
2.17.0
#11 lore raw

Re: [kvm-unit-tests PATCH v2 3/9] s390x: irq: make IRQ handler weak

Quoted 17 lines · Pierre Morel

Having a weak function allows the tests programm to declare its own IRQ handler.
This is helpfull for I/O tests to have the I/O IRQ handler having its special work to do.

---
 lib/s390x/interrupt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
lib/s390x/interrupt.c +0 -0
index 3e07867..d70fde3 100644

lib/s390x/interrupt.c void handle_mcck_int(void) · line 146

Quoted 8 lines
lib/s390x/interrupt.c +1 -1
@@ -140,7 +140,7 @@ void handle_mcck_int(void)
 		     lc->mcck_old_psw.addr);
 }
 
-void handle_io_int(void)
+__attribute__((weak)) void handle_io_int(void)
 {
 	report_abort("Unexpected io interrupt: at %#lx",
 		     lc->io_old_psw.addr);

The clear alternative would be a way to register a callback function. That way you can modify the callback during the tests. As long as not registered, wrong I/Os can be caught easily here. @Thomas?

Signature · 3 lines
Thanks,

David / dhildenb
#12 lore raw

Re: [kvm-unit-tests PATCH v2 3/9] s390x: irq: make IRQ handler weak

Quoted 20 lines · David Hildenbrand
Quoted 19 lines · Pierre Morel

Having a weak function allows the tests programm to declare its own IRQ handler.
This is helpfull for I/O tests to have the I/O IRQ handler having its special work to do.

---
 lib/s390x/interrupt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
lib/s390x/interrupt.c +0 -0
index 3e07867..d70fde3 100644
@@ -140,7 +140,7 @@ void handle_mcck_int(void)
 		     lc->mcck_old_psw.addr);
 }
 
Quoted 10 lines

lib/s390x/interrupt.c void handle_mcck_int(void) · line 146

Quoted 6 lines
lib/s390x/interrupt.c +1 -1
-void handle_io_int(void)
+__attribute__((weak)) void handle_io_int(void)
 {
 	report_abort("Unexpected io interrupt: at %#lx",
 		     lc->io_old_psw.addr);

The clear alternative would be a way to register a callback function. That way you can modify the callback during the tests. As long as not registered, wrong I/Os can be caught easily here. @Thomas?

I don't mind too much, but I think I'd also slightly prefer a registered callback function here instead.

Thomas

#13 lore raw

Re: [kvm-unit-tests PATCH v2 3/9] s390x: irq: make IRQ handler weak

Quoted 32 lines · Thomas Huth
Quoted 20 lines · David Hildenbrand
Quoted 19 lines · Pierre Morel

Having a weak function allows the tests programm to declare its own IRQ handler.
This is helpfull for I/O tests to have the I/O IRQ handler having its special work to do.

---
  lib/s390x/interrupt.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
lib/s390x/interrupt.c +0 -0
index 3e07867..d70fde3 100644
@@ -140,7 +140,7 @@ void handle_mcck_int(void)
  		     lc->mcck_old_psw.addr);
  }
 
Quoted 10 lines

lib/s390x/interrupt.c void handle_mcck_int(void) · line 146

Quoted 6 lines
lib/s390x/interrupt.c +1 -1
-void handle_io_int(void)
+__attribute__((weak)) void handle_io_int(void)
  {
  	report_abort("Unexpected io interrupt: at %#lx",
  		     lc->io_old_psw.addr);

The clear alternative would be a way to register a callback function. That way you can modify the callback during the tests. As long as not registered, wrong I/Os can be caught easily here. @Thomas?

Quoted 5 lines

I don't mind too much, but I think I'd also slightly prefer a registered callback function here instead.

Thomas

As you like but I wonder why you prefer the complicated solution.
The kvm-unit-test is single task, if a test really need something complicated it can be done in the test not in the common code.

Anyway I do like you want.

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#14 lore raw

PATCH v2 4/9 s390x: export the clock get_clock_ms() utility

In reply to Pierre Morel

To serve multiple times, the function get_clock_ms() is moved from intercept.c test to the new file asm/clock.h.

---
 lib/s390x/asm/clock.h | 25 +++++++++++++++++++++++++
 s390x/intercept.c     | 11 +----------
 2 files changed, 26 insertions(+), 10 deletions(-)
 create mode 100644 lib/s390x/asm/clock.h
lib/s390x/asm/clock.h new file +25 -0
new file mode 100644
index 0000000..e293741
@@ -0,0 +1,25 @@
+/*
+ * Clock utilities for s390
+ *
+ * Authors:
+ *  Thomas Huth <[email protected]>
+ *  Pierre Morel <[email protected]>
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2.
+ */
+#ifndef _ASM_S390X_CLOCK_H_
+#define _ASM_S390X_CLOCK_H_
+
+static inline uint64_t get_clock_ms(void)
+{
+	uint64_t clk;
+
+	asm volatile(" stck %0 " : : "Q"(clk) : "memory");
+
+	/* Bit 51 is incrememented each microsecond */
+	return (clk >> (63 - 51)) / 1000;
+}
+
+
+#endif
s390x/intercept.c +1 -10
index 404b4c6..ab08533 100644
@@ -13,6 +13,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/interrupt.h>
 #include <asm/page.h>
+#include <asm/clock.h>
 
 static uint8_t pagebuf[PAGE_SIZE * 2] __attribute__((aligned(PAGE_SIZE * 2)));
 
@@ -159,16 +160,6 @@ static void test_testblock(void)
 	check_pgm_int_code(PGM_INT_CODE_ADDRESSING);
 }
 
-static uint64_t get_clock_ms(void)
-{
-	uint64_t clk;
-
-	asm volatile(" stck %0 " : : "Q"(clk) : "memory");
-
-	/* Bit 51 is incrememented each microsecond */
-	return (clk >> (63 - 51)) / 1000;
-}
-
 struct {
 	const char *name;
 	void (*func)(void);
Signature · 1 line
2.17.0
Reviewed-by on v2 4/9
#15 lore raw

Re: [kvm-unit-tests PATCH v2 4/9] s390x: export the clock get_clock_ms() utility

Quoted 2 lines · Pierre Morel

To serve multiple times, the function get_clock_ms() is moved from intercept.c test to the new file asm/clock.h.

I'd probably call this "tod.h" instead. Nevermind.

Signature · 3 lines
Thanks,

David / dhildenb
#16 lore raw

Re: [kvm-unit-tests PATCH v2 4/9] s390x: export the clock get_clock_ms() utility

Quoted 9 lines · David Hildenbrand
Quoted 2 lines · Pierre Morel

To serve multiple times, the function get_clock_ms() is moved from intercept.c test to the new file asm/clock.h.

I'd probably call this "tod.h" instead. Nevermind.

Thanks,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#17 lore raw

Re: [kvm-unit-tests PATCH v2 4/9] s390x: export the clock get_clock_ms() utility

In reply to David Hildenbrand
Quoted 5 lines · David Hildenbrand
Quoted 2 lines · Pierre Morel

To serve multiple times, the function get_clock_ms() is moved from intercept.c test to the new file asm/clock.h.

I'd probably call this "tod.h" instead. Nevermind.

time.h / timing.h?
I'm planning on adding cpu timer functions somewhen next year...

Quoted 4 lines
#18 lore raw

Re: [kvm-unit-tests PATCH v2 4/9] s390x: export the clock get_clock_ms() utility

Quoted 9 lines · Janosch Frank
Quoted 5 lines · David Hildenbrand
Quoted 2 lines · Pierre Morel

To serve multiple times, the function get_clock_ms() is moved from intercept.c test to the new file asm/clock.h.

I'd probably call this "tod.h" instead. Nevermind.

time.h / timing.h?
I'm planning on adding cpu timer functions somewhen next year...

as long as you both agree, I take the name you want.

Quoted 7 lines
Quoted 5 lines
Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#19 lore raw

PATCH v2 5/9 s390x: Library resources for CSS tests

In reply to Pierre Morel

These are the include and library utilities for the css tests patch series.

---
 lib/s390x/css.h      | 269 +++++++++++++++++++++++++++++++++++++++++++
 lib/s390x/css_dump.c | 147 +++++++++++++++++++++++
 2 files changed, 416 insertions(+)
 create mode 100644 lib/s390x/css.h
 create mode 100644 lib/s390x/css_dump.c
lib/s390x/css.h new file +269 -0
new file mode 100644
index 0000000..95dec72
@@ -0,0 +1,269 @@
+/*
+ * CSS definitions
+ *
+ * Copyright IBM, Corp. 2019
+ * Author: Pierre Morel <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or (at
+ * your option) any later version. See the COPYING file in the top-level
+ * directory.
+ */
+
+#ifndef CSS_H
+#define CSS_H
+
+#define CCW_F_CD	0x80
+#define CCW_F_CC	0x40
+#define CCW_F_SLI	0x20
+#define CCW_F_SKP	0x10
+#define CCW_F_PCI	0x08
+#define CCW_F_IDA	0x04
+#define CCW_F_S		0x02
+#define CCW_F_MIDA	0x01
+
+#define CCW_C_NOP	0x03
+#define CCW_C_TIC	0x08
+
+struct ccw {
+	unsigned char code;
+	unsigned char flags;
+	unsigned short count;
+	unsigned int data;
+} __attribute__ ((aligned(4)));
+
+#define ORB_M_KEY	0xf0000000
+#define ORB_F_SUSPEND	0x08000000
+#define ORB_F_STREAMING	0x04000000
+#define ORB_F_MODIFCTRL	0x02000000
+#define ORB_F_SYNC	0x01000000
+#define ORB_F_FORMAT	0x00800000
+#define ORB_F_PREFETCH	0x00400000
+#define ORB_F_INIT_IRQ	0x00200000
+#define ORB_F_ADDRLIMIT	0x00100000
+#define ORB_F_SUSP_IRQ	0x00080000
+#define ORB_F_TRANSPORT	0x00040000
+#define ORB_F_IDAW2	0x00020000
+#define ORB_F_IDAW_2K	0x00010000
+#define ORB_M_LPM	0x0000ff00
+#define ORB_F_LPM_DFLT	0x00008000
+#define ORB_F_ILSM	0x00000080
+#define ORB_F_CCW_IND	0x00000040
+#define ORB_F_ORB_EXT	0x00000001
+
+struct orb {
+	unsigned int	intparm;
+	unsigned int	ctrl;
+	unsigned int	cpa;
+	unsigned int	prio;
+	unsigned int	reserved[4];
+} __attribute__ ((aligned(4)));
+
+struct scsw {
+	uint32_t ctrl;
+	uint32_t addr;
+	uint8_t  devs;
+	uint8_t  schs;
+	uint16_t count;
+};
+
+struct pmcw {
+	uint32_t intparm;
+#define PMCW_DNV        0x0001
+#define PMCW_ENABLE     0x0080
+	uint16_t flags;
+	uint16_t devnum;
+	uint8_t  lpm;
+	uint8_t  pnom;
+	uint8_t  lpum;
+	uint8_t  pim;
+	uint16_t mbi;
+	uint8_t  pom;
+	uint8_t  pam;
+	uint8_t  chpid[8];
+	struct {
+		uint8_t res0;
+		uint8_t st:3;
+		uint8_t :5;
+		uint16_t :13;
+		uint16_t f:1;
+		uint16_t x:1;
+		uint16_t s:1;
+	};
+};
+
+struct schib {
+	struct pmcw pmcw;
+	struct scsw scsw;
+	uint32_t  md0;
+	uint32_t  md1;
+	uint32_t  md2;
+} __attribute__ ((aligned(4)));
+
+struct irb {
+	struct scsw scsw;
+	uint32_t esw[5];
+	uint32_t ecw[8];
+	uint32_t emw[8];
+} __attribute__ ((aligned(4)));
+
+/* CSS low level access functions */
+
+static inline int ssch(unsigned long schid, struct orb *addr)
+{
+	register long long reg1 asm("1") = schid;
+	int cc = -1;
+
+	asm volatile(
+		"	   ssch	0(%2)\n"
+		"0:	 ipm	 %0\n"
+		"	   srl	 %0,28\n"
+		"1:\n"
+		: "+d" (cc)
+		: "d" (reg1), "a" (addr), "m" (*addr)
+		: "cc", "memory");
+	return cc;
+}
+
+static inline int stsch(unsigned long schid, struct schib *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   stsch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}
+
+static inline int msch(unsigned long schid, struct schib *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   msch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}
+
+static inline int tsch(unsigned long schid, struct irb *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   tsch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}
+
+static inline int hsch(unsigned long schid)
+{
+	register unsigned long reg1 asm("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	hsch\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}
+
+static inline int xsch(unsigned long schid)
+{
+	register unsigned long reg1 asm("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	xsch\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}
+
+static inline int csch(unsigned long schid)
+{
+	register unsigned long reg1 asm("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	csch\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}
+
+static inline int rsch(unsigned long schid)
+{
+	register unsigned long reg1 asm("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	rsch\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}
+
+static inline int rchp(unsigned long chpid)
+{
+	register unsigned long reg1 asm("1") = chpid;
+	int cc;
+
+	asm volatile(
+		"	rchp\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}
+
+/* Debug functions */
+char *dump_pmcw_flags(uint16_t f);
+char *dump_scsw_flags(uint32_t f);
+#undef DEBUG
+#ifdef DEBUG
+void dump_scsw(struct scsw *);
+void dump_irb(struct irb *irbp);
+void dump_schib(struct schib *sch);
+struct ccw *dump_ccw(struct ccw *cp);
+#else
+static inline void dump_scsw(struct scsw *scsw){}
+static inline void dump_irb(struct irb *irbp){}
+static inline void dump_pmcw(struct pmcw *p){}
+static inline void dump_schib(struct schib *sch){}
+static inline void dump_orb(struct orb *op){}
+static inline struct ccw *dump_ccw(struct ccw *cp)
+{
+	return NULL;
+}
+#endif
+
+extern unsigned long stacktop;
+#endif
lib/s390x/css_dump.c new file +147 -0

147 lines not on this page · raw message

Signature · 1 line
2.17.0
#20 lore raw

Re: [kvm-unit-tests PATCH v2 5/9] s390x: Library resources for CSS tests

Quoted 34 lines · On Thu, 28 Nov 2019 13:46:03 +0100 Pierre Morel <[email protected]> wrote:

These are the include and library utilities for the css tests patch series.

---
 lib/s390x/css.h      | 269 +++++++++++++++++++++++++++++++++++++++++++
 lib/s390x/css_dump.c | 147 +++++++++++++++++++++++
 2 files changed, 416 insertions(+)
 create mode 100644 lib/s390x/css.h
 create mode 100644 lib/s390x/css_dump.c
lib/s390x/css.h new file +17 -0
new file mode 100644
index 0000000..95dec72
@@ -0,0 +1,269 @@
+/*
+ * CSS definitions
+ *
+ * Copyright IBM, Corp. 2019
+ * Author: Pierre Morel <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or (at
+ * your option) any later version. See the COPYING file in the top-level
+ * directory.
+ */
+
+#ifndef CSS_H
+#define CSS_H
+
+#define CCW_F_CD	0x80
+#define CCW_F_CC	0x40
+#define CCW_F_SLI	0x20

lib/s390x/css.h line 27

Quoted 10 lines
lib/s390x/css.h new file +10 -0
+#define CCW_F_SKP	0x10
+#define CCW_F_PCI	0x08
+#define CCW_F_IDA	0x04
+#define CCW_F_S		0x02
+#define CCW_F_MIDA	0x01
+
+#define CCW_C_NOP	0x03
+#define CCW_C_TIC	0x08
+
+struct ccw {

ccw1, to make it clear that this is a format-1 ccw?

(Do you have any plans to test this with format-0 ccws as well?)

lib/s390x/css.h line 31

Quoted 4 lines
lib/s390x/css.h new file +4 -0
+	unsigned char code;
+	unsigned char flags;
+	unsigned short count;
+	unsigned int data;

data_address?

Quoted 22 lines
lib/s390x/css.h new file +22 -0
+} __attribute__ ((aligned(4)));
+
+#define ORB_M_KEY	0xf0000000
+#define ORB_F_SUSPEND	0x08000000
+#define ORB_F_STREAMING	0x04000000
+#define ORB_F_MODIFCTRL	0x02000000
+#define ORB_F_SYNC	0x01000000
+#define ORB_F_FORMAT	0x00800000
+#define ORB_F_PREFETCH	0x00400000
+#define ORB_F_INIT_IRQ	0x00200000
+#define ORB_F_ADDRLIMIT	0x00100000
+#define ORB_F_SUSP_IRQ	0x00080000
+#define ORB_F_TRANSPORT	0x00040000
+#define ORB_F_IDAW2	0x00020000
+#define ORB_F_IDAW_2K	0x00010000
+#define ORB_M_LPM	0x0000ff00
+#define ORB_F_LPM_DFLT	0x00008000
+#define ORB_F_ILSM	0x00000080
+#define ORB_F_CCW_IND	0x00000040
+#define ORB_F_ORB_EXT	0x00000001
+
+struct orb {

lib/s390x/css.h line 63

Quoted 10 lines
lib/s390x/css.h new file +10 -0
+	unsigned int	intparm;
+	unsigned int	ctrl;
+	unsigned int	cpa;
+	unsigned int	prio;
+	unsigned int	reserved[4];
+} __attribute__ ((aligned(4)));
+
+struct scsw {
+	uint32_t ctrl;
+	uint32_t addr;

ccw_addr?

lib/s390x/css.h line 65

Quoted 2 lines
lib/s390x/css.h new file +2 -0
+	uint8_t  devs;
+	uint8_t  schs;

Maybe dev_stat/sch_stat?

lib/s390x/css.h line 67

Quoted 2 lines
lib/s390x/css.h new file +2 -0
+	uint16_t count;
+};

Out of curiousity (I'm not familiar with the conventions in kvm-unit-tests): You use the explicit uint32_t et al. types here, while you used unsigned int et al. in the other definitions... maybe it would be better to use one or the other?

Also, you probably always want to test against a QEMU-provided device anyway, so you can probably ignore transport mode and stick with command mode only, right?

Quoted 14 lines
lib/s390x/css.h new file +14 -0
+
+struct pmcw {
+	uint32_t intparm;
+#define PMCW_DNV        0x0001
+#define PMCW_ENABLE     0x0080
+	uint16_t flags;
+	uint16_t devnum;
+	uint8_t  lpm;
+	uint8_t  pnom;
+	uint8_t  lpum;
+	uint8_t  pim;
+	uint16_t mbi;
+	uint8_t  pom;
+	uint8_t  pam;

lib/s390x/css.h line 91

Quoted 10 lines
lib/s390x/css.h new file +10 -0
+	uint8_t  chpid[8];
+	struct {
+		uint8_t res0;
+		uint8_t st:3;
+		uint8_t :5;
+		uint16_t :13;
+		uint16_t f:1;
+		uint16_t x:1;
+		uint16_t s:1;
+	};

Hm... you used masks for the other fields, any reason you didn't here?

lib/s390x/css.h line 99

Quoted 8 lines
lib/s390x/css.h new file +8 -0
+};
+
+struct schib {
+	struct pmcw pmcw;
+	struct scsw scsw;
+	uint32_t  md0;
+	uint32_t  md1;
+	uint32_t  md2;

Hm, both Linux and QEMU express the fields you called md<n> as a 64 bit measurement-block address and a four bytes model-dependent area... would it make sense to do so here as well? If the extended measurement block facility is not installed, we'd get a 12 bytes model-dependent area, which IMHO would also look better here.

lib/s390x/css.h line 106

Quoted 7 lines
lib/s390x/css.h new file +7 -0
+} __attribute__ ((aligned(4)));
+
+struct irb {
+	struct scsw scsw;
+	uint32_t esw[5];
+	uint32_t ecw[8];
+	uint32_t emw[8];

If I read the PoP correctly, esw, ecw, and emw are defined bytewise, not u32-wise.

Quoted 9 lines
lib/s390x/css.h new file +9 -0
+} __attribute__ ((aligned(4)));
+
+/* CSS low level access functions */
+
+static inline int ssch(unsigned long schid, struct orb *addr)
+{
+	register long long reg1 asm("1") = schid;
+	int cc = -1;
+

lib/s390x/css.h line 125

Quoted 10 lines
lib/s390x/css.h new file +10 -0
+	asm volatile(
+		"	   ssch	0(%2)\n"
+		"0:	 ipm	 %0\n"
+		"	   srl	 %0,28\n"
+		"1:\n"
+		: "+d" (cc)
+		: "d" (reg1), "a" (addr), "m" (*addr)
+		: "cc", "memory");
+	return cc;
+}

Looking at the Linux code, stsch, msch, and ssch all set up an exception handler. IIRC, I had introduced that for stsch for multiple subchannels sets, not sure about the others. Are we sure we never need to catch exceptions here?

Quoted 30 lines
lib/s390x/css.h new file +30 -0
+
+static inline int stsch(unsigned long schid, struct schib *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   stsch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}
+
+static inline int msch(unsigned long schid, struct schib *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   msch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}

(...)

Quoted 4 lines
lib/s390x/css.h new file +4 -0
+static inline int rchp(unsigned long chpid)
+{
+	register unsigned long reg1 asm("1") = chpid;
+	int cc;

lib/s390x/css.h line 245

Quoted 10 lines
lib/s390x/css.h new file +10 -0
+
+	asm volatile(
+		"	rchp\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}

Does rchp actually do anything useful on QEMU? Or is this mainly for completeness' sake?

Quoted 30 lines
lib/s390x/css.h new file +24 -0
+
+/* Debug functions */
+char *dump_pmcw_flags(uint16_t f);
+char *dump_scsw_flags(uint32_t f);
+#undef DEBUG
+#ifdef DEBUG
+void dump_scsw(struct scsw *);
+void dump_irb(struct irb *irbp);
+void dump_schib(struct schib *sch);
+struct ccw *dump_ccw(struct ccw *cp);
+#else
+static inline void dump_scsw(struct scsw *scsw){}
+static inline void dump_irb(struct irb *irbp){}
+static inline void dump_pmcw(struct pmcw *p){}
+static inline void dump_schib(struct schib *sch){}
+static inline void dump_orb(struct orb *op){}
+static inline struct ccw *dump_ccw(struct ccw *cp)
+{
+	return NULL;
+}
+#endif
+
+extern unsigned long stacktop;
+#endif
lib/s390x/css_dump.c new file +0 -0
new file mode 100644
index 0000000..5356df2

lib/s390x/css_dump.c line 2

Quoted 2 lines
lib/s390x/css_dump.c new file +2 -0
@@ -0,0 +1,147 @@
+/*
+ * Channel Sub-System structures dumping

I think "subsystem" is the more usual spelling.

lib/s390x/css_dump.c line 14

Quoted 12 lines
lib/s390x/css_dump.c new file +12 -0
+ *
+ * Copyright (c) 2019 IBM Corp.
+ *
+ * Authors:
+ *  Pierre Morel <[email protected]>
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU Library General Public License version 2.
+ *
+ * Description:
+ * Provides the dumping functions for various structures used by subchannels:
+ * - ORB  : Operation request block, describe the I/O operation and point to

s/describe/describes/
s/point/points/

lib/s390x/css_dump.c line 16

Quoted 2 lines
lib/s390x/css_dump.c new file +2 -0
+ *          a CCW chain
+ * - CCW  : Channel Command Word, describe the data and flow control

s/describe/describes/

but maybe better:

"contains the command, parameters, and a pointer to data"

?

Also this is format-1 only, isn't it?

lib/s390x/css_dump.c line 17

Quoted 1 line
lib/s390x/css_dump.c new file +1 -0
+ * - IRB  : Interuption response Block, describe the result of an operation

s/describe/describes/

lib/s390x/css_dump.c line 18

Quoted 1 line
lib/s390x/css_dump.c new file +1 -0
+ *          hold a SCSW and several channel type dependent fields.

s/hold/holds/

s/several channel type dependent fields/model-dependent data/ ?

lib/s390x/css_dump.c line 19

Quoted 1 line
lib/s390x/css_dump.c new file +1 -0
+ * - SCHIB: SubChannel Information Block composed of:

s/SubChannel/Subchannel/

lib/s390x/css_dump.c line 20

Quoted 1 line
lib/s390x/css_dump.c new file +1 -0
+ *   - SCSW: SubChannel Status Word, status of the channel as a result of an

s/SubChannel/Subchannel/

lib/s390x/css_dump.c line 21

Quoted 1 line
lib/s390x/css_dump.c new file +1 -0
+ *           operation when in IRB.

I think that description is a bit confusing: An SCSW always contains the subchannel status; it's just when it is contained in an IRB that the status is associated to the last event on that subchannel (as the result of an operation, or as an unsolicited status.)

lib/s390x/css_dump.c line 34

Quoted 13 lines
lib/s390x/css_dump.c new file +13 -0
+ *   - PMCW: Path Management Control Word
+ * You need the QEMU ccw-pong device in QEMU to answer the I/O transfers.
+ */
+
+#include <unistd.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <css.h>
+
+static const char *scsw_str = "kkkkslccfpixuzen";
+static const char *scsw_str2 = "1SHCrshcsdsAIPSs";

Nice, random strings? :)

(...)

#21 lore raw

Re: [kvm-unit-tests PATCH v2 5/9] s390x: Library resources for CSS tests

Quoted 50 lines · Cornelia Huck
Quoted 34 lines · On Thu, 28 Nov 2019 13:46:03 +0100 Pierre Morel <[email protected]> wrote:

These are the include and library utilities for the css tests patch series.

---
  lib/s390x/css.h      | 269 +++++++++++++++++++++++++++++++++++++++++++
  lib/s390x/css_dump.c | 147 +++++++++++++++++++++++
  2 files changed, 416 insertions(+)

create mode 100644 lib/s390x/css.h
create mode 100644 lib/s390x/css_dump.c

lib/s390x/css.h new file +17 -0
new file mode 100644
index 0000000..95dec72
@@ -0,0 +1,269 @@
+/*
+ * CSS definitions
+ *
+ * Copyright IBM, Corp. 2019
+ * Author: Pierre Morel <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or (at
+ * your option) any later version. See the COPYING file in the top-level
+ * directory.
+ */
+
+#ifndef CSS_H
+#define CSS_H
+
+#define CCW_F_CD	0x80
+#define CCW_F_CC	0x40
+#define CCW_F_SLI	0x20

lib/s390x/css.h line 27

Quoted 10 lines
lib/s390x/css.h new file +10 -0
+#define CCW_F_SKP	0x10
+#define CCW_F_PCI	0x08
+#define CCW_F_IDA	0x04
+#define CCW_F_S		0x02
+#define CCW_F_MIDA	0x01
+
+#define CCW_C_NOP	0x03
+#define CCW_C_TIC	0x08
+
+struct ccw {

ccw1, to make it clear that this is a format-1 ccw?

Quoted 1 line

(Do you have any plans to test this with format-0 ccws as well?)

not in a near future

Quoted 7 lines

lib/s390x/css.h line 31

Quoted 5 lines
lib/s390x/css.h new file +4 -0
+	unsigned char code;
+	unsigned char flags;
+	unsigned short count;
+	unsigned int data;

data_address?

OK

Quoted 27 lines
Quoted 27 lines
lib/s390x/css.h new file +26 -0
+} __attribute__ ((aligned(4)));
+
+#define ORB_M_KEY	0xf0000000
+#define ORB_F_SUSPEND	0x08000000
+#define ORB_F_STREAMING	0x04000000
+#define ORB_F_MODIFCTRL	0x02000000
+#define ORB_F_SYNC	0x01000000
+#define ORB_F_FORMAT	0x00800000
+#define ORB_F_PREFETCH	0x00400000
+#define ORB_F_INIT_IRQ	0x00200000
+#define ORB_F_ADDRLIMIT	0x00100000
+#define ORB_F_SUSP_IRQ	0x00080000
+#define ORB_F_TRANSPORT	0x00040000
+#define ORB_F_IDAW2	0x00020000
+#define ORB_F_IDAW_2K	0x00010000
+#define ORB_M_LPM	0x0000ff00
+#define ORB_F_LPM_DFLT	0x00008000
+#define ORB_F_ILSM	0x00000080
+#define ORB_F_CCW_IND	0x00000040
+#define ORB_F_ORB_EXT	0x00000001
+
+struct orb {
+	unsigned int	intparm;
+	unsigned int	ctrl;
+	unsigned int	cpa;
+	unsigned int	prio;
Quoted 8 lines

lib/s390x/css.h line 63

Quoted 6 lines
lib/s390x/css.h new file +6 -0
+	unsigned int	reserved[4];
+} __attribute__ ((aligned(4)));
+
+struct scsw {
+	uint32_t ctrl;
+	uint32_t addr;

ccw_addr?

OK

Quoted 5 lines

lib/s390x/css.h line 65

Quoted 3 lines
lib/s390x/css.h new file +2 -0
+	uint8_t  devs;
+	uint8_t  schs;

Maybe dev_stat/sch_stat?

OK

Quoted 8 lines

lib/s390x/css.h line 67

Quoted 3 lines
lib/s390x/css.h new file +2 -0
+	uint16_t count;
+};

Out of curiousity (I'm not familiar with the conventions in kvm-unit-tests): You use the explicit uint32_t et al. types here, while you used unsigned int et al. in the other definitions... maybe it would be better to use one or the other?

OK, I suppose that if we want to be working with TCG uintxxx_t is better. So I will take care to be coherent.

Quoted 4 lines

Also, you probably always want to test against a QEMU-provided device anyway, so you can probably ignore transport mode and stick with command mode only, right?

Yes

Quoted 19 lines
Quoted 19 lines
lib/s390x/css.h new file +18 -0
+
+struct pmcw {
+	uint32_t intparm;
+#define PMCW_DNV        0x0001
+#define PMCW_ENABLE     0x0080
+	uint16_t flags;
+	uint16_t devnum;
+	uint8_t  lpm;
+	uint8_t  pnom;
+	uint8_t  lpum;
+	uint8_t  pim;
+	uint16_t mbi;
+	uint8_t  pom;
+	uint8_t  pam;
+	uint8_t  chpid[8];
+	struct {
+		uint8_t res0;
+		uint8_t st:3;
Quoted 8 lines

lib/s390x/css.h line 91

Quoted 6 lines
lib/s390x/css.h new file +6 -0
+		uint8_t :5;
+		uint16_t :13;
+		uint16_t f:1;
+		uint16_t x:1;
+		uint16_t s:1;
+	};

Hm... you used masks for the other fields, any reason you didn't here?

Here too , I must be coherent.
Reason was that I use the flags differently, the test of the bit fields is easier to read than shift & mask but ... anyway I prefer masks for hardware close programing.

Quoted 15 lines

lib/s390x/css.h line 99

Quoted 9 lines
lib/s390x/css.h new file +8 -0
+};
+
+struct schib {
+	struct pmcw pmcw;
+	struct scsw scsw;
+	uint32_t  md0;
+	uint32_t  md1;
+	uint32_t  md2;

Hm, both Linux and QEMU express the fields you called md<n> as a 64 bit measurement-block address and a four bytes model-dependent area... would it make sense to do so here as well? If the extended measurement block facility is not installed, we'd get a 12 bytes model-dependent area, which IMHO would also look better here.

OK, IMHO too

Quoted 11 lines

lib/s390x/css.h line 106

Quoted 8 lines
lib/s390x/css.h new file +7 -0
+} __attribute__ ((aligned(4)));
+
+struct irb {
+	struct scsw scsw;
+	uint32_t esw[5];
+	uint32_t ecw[8];
+	uint32_t emw[8];

If I read the PoP correctly, esw, ecw, and emw are defined bytewise, not u32-wise.

Hum, I found them referenced u32-wise.
I intended to define them as a structure at the moment they are used. If you really prefer I can use uint8_t esw[40] uint8_t ecw[64] etc. but I like better word aligned structures.

Quoted 17 lines
Quoted 17 lines
lib/s390x/css.h new file +16 -0
+} __attribute__ ((aligned(4)));
+
+/* CSS low level access functions */
+
+static inline int ssch(unsigned long schid, struct orb *addr)
+{
+	register long long reg1 asm("1") = schid;
+	int cc = -1;
+
+	asm volatile(
+		"	   ssch	0(%2)\n"
+		"0:	 ipm	 %0\n"
+		"	   srl	 %0,28\n"
+		"1:\n"
+		: "+d" (cc)
+		: "d" (reg1), "a" (addr), "m" (*addr)
Quoted 8 lines

lib/s390x/css.h line 125

Quoted 3 lines
lib/s390x/css.h new file +3 -0
+		: "cc", "memory");
+	return cc;
+}

Looking at the Linux code, stsch, msch, and ssch all set up an exception handler. IIRC, I had introduced that for stsch for multiple subchannels sets, not sure about the others. Are we sure we never need to catch exceptions here?

This is the next and important step.
I want to surround each call with expect_pgm_int() / check_pgm_int_code()

Also testing each error case.
So we do not need exception handler here, we will use the kvm-test ones.

Quoted 43 lines
Quoted 31 lines
lib/s390x/css.h new file +30 -0
+
+static inline int stsch(unsigned long schid, struct schib *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   stsch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}
+
+static inline int msch(unsigned long schid, struct schib *addr)
+{
+	register unsigned long reg1 asm ("1") = schid;
+	int cc;
+
+	asm volatile(
+		"	   msch	0(%3)\n"
+		"	   ipm	 %0\n"
+		"	   srl	 %0,28"
+		: "=d" (cc), "=m" (*addr)
+		: "d" (reg1), "a" (addr)
+		: "cc");
+	return cc;
+}

(...)

Quoted 9 lines
lib/s390x/css.h new file +9 -0
+static inline int rchp(unsigned long chpid)
+{
+	register unsigned long reg1 asm("1") = chpid;
+	int cc;
+
+	asm volatile(
+		"	rchp\n"
+		"	ipm	%0\n"
+		"	srl	%0,28"
Quoted 8 lines

lib/s390x/css.h line 185

Quoted 5 lines
lib/s390x/css.h new file +5 -0
+		: "=d" (cc)
+		: "d" (reg1)
+		: "cc");
+	return cc;
+}

Does rchp actually do anything useful on QEMU? Or is this mainly for completeness' sake?

It is for completness for this first series.
However I would like to do something with it in a following one.
to be ready for QEMU implementation or to test real hardware when the kvm-unit-test run on LPAR.

Quoted 27 lines
Quoted 27 lines
lib/s390x/css.h new file +24 -0
+
+/* Debug functions */
+char *dump_pmcw_flags(uint16_t f);
+char *dump_scsw_flags(uint32_t f);
+#undef DEBUG
+#ifdef DEBUG
+void dump_scsw(struct scsw *);
+void dump_irb(struct irb *irbp);
+void dump_schib(struct schib *sch);
+struct ccw *dump_ccw(struct ccw *cp);
+#else
+static inline void dump_scsw(struct scsw *scsw){}
+static inline void dump_irb(struct irb *irbp){}
+static inline void dump_pmcw(struct pmcw *p){}
+static inline void dump_schib(struct schib *sch){}
+static inline void dump_orb(struct orb *op){}
+static inline struct ccw *dump_ccw(struct ccw *cp)
+{
+	return NULL;
+}
+#endif
+
+extern unsigned long stacktop;
+#endif
lib/s390x/css_dump.c new file +0 -0
new file mode 100644
Quoted 8 lines

lib/s390x/css_dump.c line 2

Quoted 6 lines

index 0000000..5356df2

lib/s390x/css_dump.c new file +2 -0
@@ -0,0 +1,147 @@
+/*
+ * Channel Sub-System structures dumping

I think "subsystem" is the more usual spelling.

OK, I found it much fun so :)

Quoted 14 lines

lib/s390x/css_dump.c line 14

Quoted 13 lines
lib/s390x/css_dump.c new file +12 -0
+ *
+ * Copyright (c) 2019 IBM Corp.
+ *
+ * Authors:
+ *  Pierre Morel <[email protected]>
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU Library General Public License version 2.
+ *
+ * Description:
+ * Provides the dumping functions for various structures used by subchannels:
+ * - ORB  : Operation request block, describe the I/O operation and point to
Quoted 2 lines

s/describe/describes/
s/point/points/

thanks

Quoted 11 lines

lib/s390x/css_dump.c line 16

Quoted 3 lines
lib/s390x/css_dump.c new file +2 -0
+ *          a CCW chain
+ * - CCW  : Channel Command Word, describe the data and flow control

s/describe/describes/

but maybe better:

"contains the command, parameters, and a pointer to data"

?

yes, thanks

Quoted 2 lines

Also this is format-1 only, isn't it?

yes, I add this

Quoted 4 lines

lib/s390x/css_dump.c line 17

Quoted 2 lines
lib/s390x/css_dump.c new file +1 -0
+ * - IRB  : Interuption response Block, describe the result of an operation

s/describe/describes/

again!
thanks :)

Quoted 4 lines

lib/s390x/css_dump.c line 18

Quoted 2 lines
lib/s390x/css_dump.c new file +1 -0
+ *          hold a SCSW and several channel type dependent fields.

s/hold/holds/

hum...

Quoted 2 lines

s/several channel type dependent fields/model-dependent data/ ?

yes

Quoted 8 lines

lib/s390x/css_dump.c line 19

Quoted 2 lines
lib/s390x/css_dump.c new file +1 -0
+ * - SCHIB: SubChannel Information Block composed of:

s/SubChannel/Subchannel/

lib/s390x/css_dump.c line 20

Quoted 1 line
lib/s390x/css_dump.c new file +1 -0
+ *   - SCSW: SubChannel Status Word, status of the channel as a result of an

s/SubChannel/Subchannel/

OK

Quoted 7 lines

lib/s390x/css_dump.c line 21

Quoted 2 lines
lib/s390x/css_dump.c new file +1 -0
+ *           operation when in IRB.

I think that description is a bit confusing: An SCSW always contains the subchannel status; it's just when it is contained in an IRB that the status is associated to the last event on that subchannel (as the result of an operation, or as an unsolicited status.)

yes, the "when in IRB has nothing to do there" IRB defintion is above. I will make it clearer

Quoted 16 lines
Quoted 4 lines
lib/s390x/css_dump.c new file +3 -0
+ *   - PMCW: Path Management Control Word
+ * You need the QEMU ccw-pong device in QEMU to answer the I/O transfers.
+ */

lib/s390x/css_dump.c line 34

Quoted 10 lines
lib/s390x/css_dump.c new file +10 -0
+
+#include <unistd.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <css.h>
+
+static const char *scsw_str = "kkkkslccfpixuzen";
+static const char *scsw_str2 = "1SHCrshcsdsAIPSs";

Nice, random strings? :)

these are the bit definitions associated with the scsw flags. Easier to read than a bit field ... as long as you have the documentation (Pop)

Thanks a lot for the review.
Seems I have some work for the v3

Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#22 lore raw

PATCH v2 6/9 s390x: css: stsch, enumeration test

In reply to Pierre Morel

First step by testing the channel subsystem is to enumerate the css and retrieve the css devices.

This test the success of STSCH I/O instruction.

---
 s390x/Makefile      |  4 ++-
 s390x/css.c         | 86 +++++++++++++++++++++++++++++++++++++++++++++
 s390x/unittests.cfg |  4 +++
 3 files changed, 93 insertions(+), 1 deletion(-)
 create mode 100644 s390x/css.c
s390x/Makefile +3 -1
index e9da618..167ba05 100644
@@ -1,4 +1,4 @@
-tests = $(TEST_DIR)/selftest.elf
+#tests = $(TEST_DIR)/selftest.elf
 tests += $(TEST_DIR)/intercept.elf
 tests += $(TEST_DIR)/emulator.elf
 tests += $(TEST_DIR)/sieve.elf
@@ -19,6 +19,7 @@ tests += $(TEST_DIR)/smp.elf
 tests += $(TEST_DIR)/uv-guest.elf
 tests += $(TEST_DIR)/uv-host.elf
 tests += $(TEST_DIR)/uv-limit.elf
+tests += $(TEST_DIR)/css.elf
 tests_binary = $(patsubst %.elf,%.bin,$(tests))
 tests_img = $(patsubst %.elf,%.img,$(tests))
 
@@ -56,6 +57,7 @@ cflatobjs += lib/s390x/sclp-console.o
 cflatobjs += lib/s390x/interrupt.o
 cflatobjs += lib/s390x/mmu.o
 cflatobjs += lib/s390x/smp.o
+cflatobjs += lib/s390x/css_dump.o
 
 OBJDIRS += lib/s390x
 
s390x/css.c new file +86 -0

86 lines not on this page · raw message

s390x/unittests.cfg +4 -0
index ff4c088..efdf954 100644
@@ -78,3 +78,7 @@ extra_params =-smp 2
 
 [uv-guest]
 file = uv-guest.elf
+
+[css]
+file = css.elf
+extra_params =-device ccw-pong
Signature · 1 line
2.17.0
#23 lore raw

Re: [kvm-unit-tests PATCH v2 6/9] s390x: css: stsch, enumeration test

Quoted 1 line · On Thu, 28 Nov 2019 13:46:04 +0100 Pierre Morel <[email protected]> wrote:

First step by testing the channel subsystem is to enumerate the css and

s/by/for/

Quoted 3 lines

retrieve the css devices.

This test the success of STSCH I/O instruction.

s/test/tests/

Quoted 9 lines
---
 s390x/Makefile      |  4 ++-
 s390x/css.c         | 86 +++++++++++++++++++++++++++++++++++++++++++++
 s390x/unittests.cfg |  4 +++
 3 files changed, 93 insertions(+), 1 deletion(-)
 create mode 100644 s390x/css.c

(...)

s390x/css.c line 2

Quoted 8 lines
s390x/css.c new file +2 -0
new file mode 100644
index 0000000..8186f55
@@ -0,0 +1,86 @@
+/*
+ * Channel Sub-System tests

s/Sub-System/Subsystem/

Quoted 10 lines
s390x/css.c new file +10 -0
+ *
+ * Copyright (c) 2019 IBM Corp
+ *
+ * Authors:
+ *  Pierre Morel <[email protected]>
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2.
+ */
+

s390x/css.c line 22

Quoted 10 lines
s390x/css.c new file +10 -0
+#include <libcflat.h>
+
+#include <css.h>
+
+#define SID_ONE		0x00010000
+
+static struct schib schib;
+
+static const char *Channel_type[3] = {
+	"I/O", "CHSC", "MSG"

No EADM? :)

I don't think we plan to emulate anything beyond I/O in QEMU, though.

s390x/css.c line 35

Quoted 13 lines
s390x/css.c new file +13 -0
+};
+
+static int test_device_sid;
+
+static void test_enumerate(void)
+{
+	struct pmcw *pmcw = &schib.pmcw;
+	int sid;
+	int ret, i;
+	int found = 0;
+
+	for (sid = 0; sid < 0xffff; sid++) {
+		ret = stsch(sid|SID_ONE, &schib);

This seems a bit odd. You are basically putting the subchannel number into sid, OR in the one, and then use the resulting value as the sid (subchannel identifier).

s390x/css.c line 37

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (!ret && (pmcw->flags & PMCW_DNV)) {
+			report_info("SID %04x Type %s PIM %x", sid,

That's not a sid, but the subchannel number (see above).

s390x/css.c line 48

Quoted 11 lines
s390x/css.c new file +11 -0
+				     Channel_type[pmcw->st], pmcw->pim);
+			for (i = 0; i < 8; i++)  {
+				if ((pmcw->pim << i) & 0x80) {
+					report_info("CHPID[%d]: %02x", i,
+						    pmcw->chpid[i]);
+					break;
+				}
+			}
+			found++;
+	
+		}

Here, you iterate over the 0-0xffff range, even if you got a condition code 3 (indicating no more subchannels in that set). Is that intentional?

s390x/css.c line 50

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (found && !test_device_sid)
+			test_device_sid = sid|SID_ONE;

You set test_device_sid to the last valid subchannel? Why?

s390x/css.c line 56

Quoted 6 lines
s390x/css.c new file +6 -0
+	}
+	if (!found) {
+		report("Found %d devices", 0, found);
+		return;
+	}
+	ret = stsch(test_device_sid, &schib);

Why do you do a stsch() again?

s390x/css.c line 62

Quoted 6 lines
s390x/css.c new file +6 -0
+	if (ret) {
+		report("Err %d on stsch on sid %08x", 0, ret, test_device_sid);
+		return;
+	}
+	report("Tested", 1);
+	return;

I don't think you need this return statement.

Your test only enumerates devices in the first subchannel set. Do you plan to enhance the test to enable the MSS facility and iterate over all subchannel sets?

Quoted 5 lines
s390x/css.c new file +5 -0
+}
+
+static struct {
+	const char *name;
+	void (*func)(void);

s390x/css.c line 77

Quoted 10 lines
s390x/css.c new file +10 -0
+} tests[] = {
+	{ "enumerate (stsch)", test_enumerate },
+	{ NULL, NULL }
+};
+
+int main(int argc, char *argv[])
+{
+	int i;
+
+	report_prefix_push("Channel Sub-System");

s/Sub-System/Subsystem/

Quoted 9 lines
s390x/css.c new file +9 -0
+	for (i = 0; tests[i].name; i++) {
+		report_prefix_push(tests[i].name);
+		tests[i].func();
+		report_prefix_pop();
+	}
+	report_prefix_pop();
+
+	return report_summary();
+}

(...)

#24 lore raw

Re: [kvm-unit-tests PATCH v2 6/9] s390x: css: stsch, enumeration test

Quoted 6 lines · Cornelia Huck
Quoted 1 line · On Thu, 28 Nov 2019 13:46:04 +0100 Pierre Morel <[email protected]> wrote:

First step by testing the channel subsystem is to enumerate the css and

s/by/for/

ok

Quoted 6 lines
Quoted 4 lines

retrieve the css devices.

This test the success of STSCH I/O instruction.

s/test/tests/

yes

Quoted 13 lines
Quoted 10 lines
---
  s390x/Makefile      |  4 ++-
  s390x/css.c         | 86 +++++++++++++++++++++++++++++++++++++++++++++
  s390x/unittests.cfg |  4 +++
  3 files changed, 93 insertions(+), 1 deletion(-)

create mode 100644 s390x/css.c

(...)

Quoted 10 lines

s390x/css.c line 2

Quoted 8 lines
s390x/css.c new file +2 -0
new file mode 100644
index 0000000..8186f55
@@ -0,0 +1,86 @@
+/*
+ * Channel Sub-System tests

s/Sub-System/Subsystem/

yes too

Quoted 15 lines
Quoted 15 lines
s390x/css.c new file +14 -0
+ *
+ * Copyright (c) 2019 IBM Corp
+ *
+ * Authors:
+ *  Pierre Morel <[email protected]>
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2.
+ */
+
+#include <libcflat.h>
+
+#include <css.h>
+
Quoted 8 lines

s390x/css.c line 22

Quoted 6 lines
s390x/css.c new file +6 -0
+#define SID_ONE		0x00010000
+
+static struct schib schib;
+
+static const char *Channel_type[3] = {
+	"I/O", "CHSC", "MSG"

No EADM? :)

I forgot EADM, I will add it!

Quoted 2 lines

I don't think we plan to emulate anything beyond I/O in QEMU, though.

Even, yes, no plan to use it for now.

Quoted 24 lines
Quoted 4 lines
s390x/css.c new file +3 -0
+};
+
+static int test_device_sid;

s390x/css.c line 35

Quoted 10 lines
s390x/css.c new file +10 -0
+
+static void test_enumerate(void)
+{
+	struct pmcw *pmcw = &schib.pmcw;
+	int sid;
+	int ret, i;
+	int found = 0;
+
+	for (sid = 0; sid < 0xffff; sid++) {
+		ret = stsch(sid|SID_ONE, &schib);

This seems a bit odd. You are basically putting the subchannel number into sid, OR in the one, and then use the resulting value as the sid (subchannel identifier).

s390x/css.c line 37

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (!ret && (pmcw->flags & PMCW_DNV)) {
+			report_info("SID %04x Type %s PIM %x", sid,

That's not a sid, but the subchannel number (see above).

Quoted 15 lines

s390x/css.c line 48

Quoted 11 lines
s390x/css.c new file +11 -0
+				     Channel_type[pmcw->st], pmcw->pim);
+			for (i = 0; i < 8; i++)  {
+				if ((pmcw->pim << i) & 0x80) {
+					report_info("CHPID[%d]: %02x", i,
+						    pmcw->chpid[i]);
+					break;
+				}
+			}
+			found++;
+	
+		}

Here, you iterate over the 0-0xffff range, even if you got a condition code 3 (indicating no more subchannels in that set). Is that intentional?

I thought there could be more subchannels.
I need then a break in the loop when this happens.
I will reread the PoP to see how to find that no more subchannel are in that set.

Quoted 5 lines

s390x/css.c line 50

Quoted 3 lines
s390x/css.c new file +2 -0
+		if (found && !test_device_sid)
+			test_device_sid = sid|SID_ONE;

You set test_device_sid to the last valid subchannel? Why?

The last ? I wanted the first one

I wanted something easy but I should have explain.

To avoid doing complicated things like doing a sense on each valid subchannel I just take the first one. Should be enough as we do not go to the device in this test.

Quoted 9 lines

s390x/css.c line 56

Quoted 7 lines
s390x/css.c new file +6 -0
+	}
+	if (!found) {
+		report("Found %d devices", 0, found);
+		return;
+	}
+	ret = stsch(test_device_sid, &schib);

Why do you do a stsch() again?

right, no need.
In an internal version I used to print some informations from the SCHIB. Since in between I overwrote the SHIB, I did it again.
But in this version; no need.

Quoted 9 lines

s390x/css.c line 62

Quoted 7 lines
s390x/css.c new file +6 -0
+	if (ret) {
+		report("Err %d on stsch on sid %08x", 0, ret, test_device_sid);
+		return;
+	}
+	report("Tested", 1);
+	return;

I don't think you need this return statement.

right I have enough work. :)

Quoted 4 lines

Your test only enumerates devices in the first subchannel set. Do you plan to enhance the test to enable the MSS facility and iterate over all subchannel sets?

Yes, it is something we can do in a following series

Quoted 10 lines
Quoted 10 lines
s390x/css.c new file +9 -0
+}
+
+static struct {
+	const char *name;
+	void (*func)(void);
+} tests[] = {
+	{ "enumerate (stsch)", test_enumerate },
+	{ NULL, NULL }
+};
Quoted 8 lines

s390x/css.c line 77

Quoted 6 lines
s390x/css.c new file +6 -0
+
+int main(int argc, char *argv[])
+{
+	int i;
+
+	report_prefix_push("Channel Sub-System");

s/Sub-System/Subsystem/

yes, again.

Thanks for the review.
Regards,

Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#25 lore raw

Re: [kvm-unit-tests PATCH v2 6/9] s390x: css: stsch, enumeration test

Quoted 41 lines · On Mon, 2 Dec 2019 18:53:16 +0100 Pierre Morel <[email protected]> wrote:
Quoted 24 lines · Cornelia Huck

s390x/css.c line 35

Quoted 11 lines · On Thu, 28 Nov 2019 13:46:04 +0100 Pierre Morel <[email protected]> wrote:
s390x/css.c new file +11 -0
+static int test_device_sid;
+
+static void test_enumerate(void)
+{
+	struct pmcw *pmcw = &schib.pmcw;
+	int sid;
+	int ret, i;
+	int found = 0;
+
+	for (sid = 0; sid < 0xffff; sid++) {
+		ret = stsch(sid|SID_ONE, &schib);  

This seems a bit odd. You are basically putting the subchannel number into sid, OR in the one, and then use the resulting value as the sid (subchannel identifier).

s390x/css.c line 37

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (!ret && (pmcw->flags & PMCW_DNV)) {
+			report_info("SID %04x Type %s PIM %x", sid,  

That's not a sid, but the subchannel number (see above).

Quoted 15 lines

s390x/css.c line 48

Quoted 11 lines
s390x/css.c new file +11 -0
+				     Channel_type[pmcw->st], pmcw->pim);
+			for (i = 0; i < 8; i++)  {
+				if ((pmcw->pim << i) & 0x80) {
+					report_info("CHPID[%d]: %02x", i,
+						    pmcw->chpid[i]);
+					break;
+				}
+			}
+			found++;
+	
+		}  

Here, you iterate over the 0-0xffff range, even if you got a condition code 3 (indicating no more subchannels in that set). Is that intentional?

Quoted 4 lines

I thought there could be more subchannels.
I need then a break in the loop when this happens.
I will reread the PoP to see how to find that no more subchannel are in that set.

The fact that cc 3 for stsch == no more subchannels is unfortunately a bit scattered across the PoP :/ Dug it out some time ago, maybe it's still in the archives somewhere...

Quoted 8 lines
Quoted 6 lines

s390x/css.c line 50

Quoted 4 lines
s390x/css.c new file +2 -0
+		if (found && !test_device_sid)
+			test_device_sid = sid|SID_ONE;  

You set test_device_sid to the last valid subchannel? Why?

The last ? I wanted the first one

It is indeed the first one, -ENOCOFFEE.

Quoted 6 lines

I wanted something easy but I should have explain.

To avoid doing complicated things like doing a sense on each valid subchannel I just take the first one.
Should be enough as we do not go to the device in this test.

Yes; but you plan to reuse that code, don't you?

Quoted 5 lines
Quoted 5 lines

s390x/css.c line 53

Quoted 5 lines
s390x/css.c new file +3 -0
+	}
+	if (!found) {
+		report("Found %d devices", 0, found);

Now that I look at this again: If you got here, you always found 0 devices, so that message is not super helpful :)

Quoted 10 lines
Quoted 5 lines

s390x/css.c line 56

Quoted 3 lines
s390x/css.c new file +3 -0
+		return;
+	}
+	ret = stsch(test_device_sid, &schib);  

Why do you do a stsch() again?

right, no need.
In an internal version I used to print some informations from the SCHIB. Since in between I overwrote the SHIB, I did it again.
But in this version; no need.

You could copy the schib of the subchannel to be tested to a different place, but I'm not sure it's worth it.

Quoted 11 lines
Quoted 10 lines

s390x/css.c line 62

Quoted 8 lines
s390x/css.c new file +6 -0
+	if (ret) {
+		report("Err %d on stsch on sid %08x", 0, ret, test_device_sid);
+		return;
+	}
+	report("Tested", 1);
+	return;  

I don't think you need this return statement.

Quoted 8 lines

right I have enough work. :)

Quoted 4 lines

Your test only enumerates devices in the first subchannel set. Do you plan to enhance the test to enable the MSS facility and iterate over all subchannel sets?

Yes, it is something we can do in a following series

Sure, just asked out of interest :)

#26 lore raw

Re: [kvm-unit-tests PATCH v2 6/9] s390x: css: stsch, enumeration test

Quoted 44 lines · Cornelia Huck
Quoted 41 lines · On Mon, 2 Dec 2019 18:53:16 +0100 Pierre Morel <[email protected]> wrote:
Quoted 39 lines · Cornelia Huck

s390x/css.c line 35

Quoted 11 lines · On Thu, 28 Nov 2019 13:46:04 +0100 Pierre Morel <[email protected]> wrote:
s390x/css.c new file +11 -0
+static int test_device_sid;
+
+static void test_enumerate(void)
+{
+	struct pmcw *pmcw = &schib.pmcw;
+	int sid;
+	int ret, i;
+	int found = 0;
+
+	for (sid = 0; sid < 0xffff; sid++) {
+		ret = stsch(sid|SID_ONE, &schib);

This seems a bit odd. You are basically putting the subchannel number into sid, OR in the one, and then use the resulting value as the sid (subchannel identifier).

s390x/css.c line 37

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (!ret && (pmcw->flags & PMCW_DNV)) {
+			report_info("SID %04x Type %s PIM %x", sid,

That's not a sid, but the subchannel number (see above).

s390x/css.c line 48

Quoted 11 lines
s390x/css.c new file +11 -0
+				     Channel_type[pmcw->st], pmcw->pim);
+			for (i = 0; i < 8; i++)  {
+				if ((pmcw->pim << i) & 0x80) {
+					report_info("CHPID[%d]: %02x", i,
+						    pmcw->chpid[i]);
+					break;
+				}
+			}
+			found++;
+	
+		}

Here, you iterate over the 0-0xffff range, even if you got a condition code 3 (indicating no more subchannels in that set). Is that intentional?

Quoted 8 lines
Quoted 4 lines

I thought there could be more subchannels.
I need then a break in the loop when this happens.
I will reread the PoP to see how to find that no more subchannel are in that set.

The fact that cc 3 for stsch == no more subchannels is unfortunately a bit scattered across the PoP :/ Dug it out some time ago, maybe it's still in the archives somewhere...

So the the subchannel are always one after the other?

Quoted 11 lines
Quoted 9 lines
Quoted 7 lines

s390x/css.c line 50

Quoted 5 lines
s390x/css.c new file +2 -0
+		if (found && !test_device_sid)
+			test_device_sid = sid|SID_ONE;

You set test_device_sid to the last valid subchannel? Why?

The last ? I wanted the first one

It is indeed the first one, -ENOCOFFEE.

Would never happend to me.

Quoted 9 lines
Quoted 7 lines

I wanted something easy but I should have explain.

To avoid doing complicated things like doing a sense on each valid subchannel I just take the first one.
Should be enough as we do not go to the device in this test.

Yes; but you plan to reuse that code, don't you?

yes, so I must think about this

Quoted 9 lines
Quoted 6 lines
Quoted 6 lines

s390x/css.c line 53

Quoted 6 lines
s390x/css.c new file +3 -0
+	}
+	if (!found) {
+		report("Found %d devices", 0, found);

Now that I look at this again: If you got here, you always found 0 devices, so that message is not super helpful :)

yes, found is too much.
A cut and past from the time I was happy to find even one! :)

Quoted 29 lines
Quoted 11 lines
Quoted 6 lines

s390x/css.c line 56

Quoted 4 lines
s390x/css.c new file +3 -0
+		return;
+	}
+	ret = stsch(test_device_sid, &schib);

Why do you do a stsch() again?

right, no need.
In an internal version I used to print some informations from the SCHIB. Since in between I overwrote the SHIB, I did it again.
But in this version; no need.

You could copy the schib of the subchannel to be tested to a different place, but I'm not sure it's worth it.

Quoted 14 lines
Quoted 10 lines

s390x/css.c line 62

Quoted 8 lines
s390x/css.c new file +6 -0
+	if (ret) {
+		report("Err %d on stsch on sid %08x", 0, ret, test_device_sid);
+		return;
+	}
+	report("Tested", 1);
+	return;

I don't think you need this return statement.

right I have enough work. :)

Quoted 1 line
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines

Your test only enumerates devices in the first subchannel set. Do you plan to enhance the test to enable the MSS facility and iterate over all subchannel sets?

Yes, it is something we can do in a following series

Sure, just asked out of interest :)

Thanks,

Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#27 lore raw

Re: [kvm-unit-tests PATCH v2 6/9] s390x: css: stsch, enumeration test

Quoted 50 lines · On Mon, 2 Dec 2019 19:33:59 +0100 Pierre Morel <[email protected]> wrote:
Quoted 49 lines · Cornelia Huck
Quoted 45 lines · On Mon, 2 Dec 2019 18:53:16 +0100 Pierre Morel <[email protected]> wrote:
Quoted 24 lines · Cornelia Huck

s390x/css.c line 35

Quoted 11 lines · On Thu, 28 Nov 2019 13:46:04 +0100 Pierre Morel <[email protected]> wrote:
s390x/css.c new file +11 -0
+static int test_device_sid;
+
+static void test_enumerate(void)
+{
+	struct pmcw *pmcw = &schib.pmcw;
+	int sid;
+	int ret, i;
+	int found = 0;
+
+	for (sid = 0; sid < 0xffff; sid++) {
+		ret = stsch(sid|SID_ONE, &schib);  

This seems a bit odd. You are basically putting the subchannel number into sid, OR in the one, and then use the resulting value as the sid (subchannel identifier).

s390x/css.c line 37

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (!ret && (pmcw->flags & PMCW_DNV)) {
+			report_info("SID %04x Type %s PIM %x", sid,  

That's not a sid, but the subchannel number (see above).

Quoted 15 lines

s390x/css.c line 48

Quoted 11 lines
s390x/css.c new file +11 -0
+				     Channel_type[pmcw->st], pmcw->pim);
+			for (i = 0; i < 8; i++)  {
+				if ((pmcw->pim << i) & 0x80) {
+					report_info("CHPID[%d]: %02x", i,
+						    pmcw->chpid[i]);
+					break;
+				}
+			}
+			found++;
+	
+		}  

Here, you iterate over the 0-0xffff range, even if you got a condition code 3 (indicating no more subchannels in that set). Is that intentional?

I thought there could be more subchannels.
I need then a break in the loop when this happens.
I will reread the PoP to see how to find that no more subchannel are in that set.

Quoted 5 lines
Quoted 3 lines

The fact that cc 3 for stsch == no more subchannels is unfortunately a bit scattered across the PoP :/ Dug it out some time ago, maybe it's still in the archives somewhere...

So the the subchannel are always one after the other?

While QEMU (and z/VM) usually do that, they can really be scattered around. For the in-between I/O subchannels that don't lead to a device, you'll still get cc 0, it's just the dnv bit that is 0. The cc 3 basically just tells you that you can stop looking.

#28 lore raw

Re: [kvm-unit-tests PATCH v2 6/9] s390x: css: stsch, enumeration test

Quoted 57 lines · Cornelia Huck
Quoted 54 lines · On Mon, 2 Dec 2019 19:33:59 +0100 Pierre Morel <[email protected]> wrote:
Quoted 52 lines · Cornelia Huck
Quoted 41 lines · On Mon, 2 Dec 2019 18:53:16 +0100 Pierre Morel <[email protected]> wrote:
Quoted 24 lines · Cornelia Huck

s390x/css.c line 35

Quoted 11 lines · On Thu, 28 Nov 2019 13:46:04 +0100 Pierre Morel <[email protected]> wrote:
s390x/css.c new file +11 -0
+static int test_device_sid;
+
+static void test_enumerate(void)
+{
+	struct pmcw *pmcw = &schib.pmcw;
+	int sid;
+	int ret, i;
+	int found = 0;
+
+	for (sid = 0; sid < 0xffff; sid++) {
+		ret = stsch(sid|SID_ONE, &schib);

This seems a bit odd. You are basically putting the subchannel number into sid, OR in the one, and then use the resulting value as the sid (subchannel identifier).

s390x/css.c line 37

Quoted 2 lines
s390x/css.c new file +2 -0
+		if (!ret && (pmcw->flags & PMCW_DNV)) {
+			report_info("SID %04x Type %s PIM %x", sid,

That's not a sid, but the subchannel number (see above).

Quoted 15 lines

s390x/css.c line 48

Quoted 11 lines
s390x/css.c new file +11 -0
+				     Channel_type[pmcw->st], pmcw->pim);
+			for (i = 0; i < 8; i++)  {
+				if ((pmcw->pim << i) & 0x80) {
+					report_info("CHPID[%d]: %02x", i,
+						    pmcw->chpid[i]);
+					break;
+				}
+			}
+			found++;
+	
+		}

Here, you iterate over the 0-0xffff range, even if you got a condition code 3 (indicating no more subchannels in that set). Is that intentional?

Quoted 4 lines

I thought there could be more subchannels.
I need then a break in the loop when this happens.
I will reread the PoP to see how to find that no more subchannel are in that set.

The fact that cc 3 for stsch == no more subchannels is unfortunately a bit scattered across the PoP :/ Dug it out some time ago, maybe it's still in the archives somewhere...

Quoted 7 lines
Quoted 1 line

So the the subchannel are always one after the other?

While QEMU (and z/VM) usually do that, they can really be scattered around. For the in-between I/O subchannels that don't lead to a device, you'll still get cc 0, it's just the dnv bit that is 0. The cc 3 basically just tells you that you can stop looking.

Thanks for the explanation, I will change the code accordingly.

Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#29 lore raw

PATCH v2 7/9 s390x: css: msch, enable test

In reply to Pierre Morel

A second step when testing the channel subsystem is to prepare a channel for use.

This tests the success of the MSCH instruction by enabling a channel.

---
 s390x/css.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
s390x/css.c +27 -0
index 8186f55..e42dc2f 100644
@@ -62,11 +62,38 @@ static void test_enumerate(void)
 	return;
 }
 
+static void set_schib(void)
+{
+	struct pmcw *p = &schib.pmcw;
+
+	p->intparm = 0xdeadbeef;
+	p->flags |= PMCW_ENABLE;
+}
+
+static void test_enable(void)
+{
+	int ret;
+
+	if (!test_device_sid) {
+		report_skip("No device");
+		return;
+	}
+	set_schib();
+	dump_schib(&schib);
+
+	ret = msch(test_device_sid, &schib);
+	if (ret)
+		report("msch cc=%d", 0, ret);
+	else
+		report("Tested", 1);
+}
+
 static struct {
 	const char *name;
 	void (*func)(void);
 } tests[] = {
 	{ "enumerate (stsch)", test_enumerate },
+	{ "enable (msch)", test_enable },
 	{ NULL, NULL }
 };
 
Signature · 1 line
2.17.0
#30 lore raw

Re: [kvm-unit-tests PATCH v2 7/9] s390x: css: msch, enable test

Quoted 30 lines · On Thu, 28 Nov 2019 13:46:05 +0100 Pierre Morel <[email protected]> wrote:

A second step when testing the channel subsystem is to prepare a channel for use.

This tests the success of the MSCH instruction by enabling a channel.

---
 s390x/css.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
s390x/css.c +12 -0
index 8186f55..e42dc2f 100644
@@ -62,11 +62,38 @@ static void test_enumerate(void)
 	return;
 }
 
+static void set_schib(void)
+{
+	struct pmcw *p = &schib.pmcw;
+
+	p->intparm = 0xdeadbeef;
+	p->flags |= PMCW_ENABLE;
+}
+
+static void test_enable(void)
+{
+	int ret;
+

s390x/css.c static void test_enumerate(void) · line 86

Quoted 10 lines
s390x/css.c +10 -0
+	if (!test_device_sid) {
+		report_skip("No device");
+		return;
+	}
+	set_schib();
+	dump_schib(&schib);
+
+	ret = msch(test_device_sid, &schib);
+	if (ret)
+		report("msch cc=%d", 0, ret);

Maybe do a stsch and then check/dump the contents of the schib again?

Background: The architecture allows that msch returns success, but that the fields modified by the issuer remain unchanged at the subchannel regardless. That should not happen with QEMU; but I remember versions of z/VM where we sometimes had to call msch twice to make changes stick.

Quoted 13 lines
s390x/css.c +5 -0
+	else
+		report("Tested", 1);
+}
+
 static struct {
 	const char *name;
 	void (*func)(void);
 } tests[] = {
 	{ "enumerate (stsch)", test_enumerate },
+	{ "enable (msch)", test_enable },
 	{ NULL, NULL }
 };
 
#31 lore raw

Re: [kvm-unit-tests PATCH v2 7/9] s390x: css: msch, enable test

Quoted 46 lines · Cornelia Huck
Quoted 30 lines · On Thu, 28 Nov 2019 13:46:05 +0100 Pierre Morel <[email protected]> wrote:

A second step when testing the channel subsystem is to prepare a channel for use.

This tests the success of the MSCH instruction by enabling a channel.

---
  s390x/css.c | 27 +++++++++++++++++++++++++++
  1 file changed, 27 insertions(+)
s390x/css.c +12 -0
index 8186f55..e42dc2f 100644
@@ -62,11 +62,38 @@ static void test_enumerate(void)
  	return;
  }
 
+static void set_schib(void)
+{
+	struct pmcw *p = &schib.pmcw;
+
+	p->intparm = 0xdeadbeef;
+	p->flags |= PMCW_ENABLE;
+}
+
+static void test_enable(void)
+{
+	int ret;
+

s390x/css.c static void test_enumerate(void) · line 86

Quoted 10 lines
s390x/css.c +10 -0
+	if (!test_device_sid) {
+		report_skip("No device");
+		return;
+	}
+	set_schib();
+	dump_schib(&schib);
+
+	ret = msch(test_device_sid, &schib);
+	if (ret)
+		report("msch cc=%d", 0, ret);

Maybe do a stsch and then check/dump the contents of the schib again?

Quoted 4 lines

Background: The architecture allows that msch returns success, but that the fields modified by the issuer remain unchanged at the subchannel regardless. That should not happen with QEMU; but I remember versions of z/VM where we sometimes had to call msch twice to make changes stick.

OK, thanks, good advice

Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#32 lore raw

PATCH v2 8/9 s390x: css: ssch/tsch with sense and interrupt

In reply to Pierre Morel

When a channel is enabled we can start a SENSE command using the SSCH instruction to recognize the control unit and device.

This tests the success of SSCH, the I/O interruption and the TSCH instructions.

The test expect a device with a control unit type of 0xC0CA.

---
 lib/s390x/css.h |  13 +++++
 s390x/css.c     | 137 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
lib/s390x/css.h +13 -0
index 95dec72..59114c6 100644
@@ -106,6 +106,19 @@ struct irb {
 	uint32_t emw[8];
 } __attribute__ ((aligned(4)));
 
+#define CCW_CMD_SENSE_ID	0xe4
+#define PONG_CU			0xc0ca
+struct senseid {
+    /* common part */
+    uint8_t reserved;        /* always 0x'FF' */
+    uint16_t cu_type;        /* control unit type */
+    uint8_t cu_model;        /* control unit model */
+    uint16_t dev_type;       /* device type */
+    uint8_t dev_model;       /* device model */
+    uint8_t unused;          /* padding byte */
+    uint8_t padding[256 - 10]; /* Extra padding for CCW */
+} __attribute__ ((aligned(8)));
+
 /* CSS low level access functions */
 
 static inline int ssch(unsigned long schid, struct orb *addr)
s390x/css.c +137 -0

167 lines not on this page · raw message

Signature · 1 line
2.17.0
#33 lore raw

Re: [kvm-unit-tests PATCH v2 8/9] s390x: css: ssch/tsch with sense and interrupt

Quoted 7 lines · On Thu, 28 Nov 2019 13:46:06 +0100 Pierre Morel <[email protected]> wrote:

When a channel is enabled we can start a SENSE command using the SSCH instruction to recognize the control unit and device.

This tests the success of SSCH, the I/O interruption and the TSCH instructions.

The test expect a device with a control unit type of 0xC0CA.

s/expect/expects/

Quoted 7 lines
---
 lib/s390x/css.h |  13 +++++
 s390x/css.c     | 137 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)

(...)

Quoted 14 lines
s390x/css.c +6 -0
index e42dc2f..534864f 100644
@@ -11,12 +11,28 @@
  */
 
 #include <libcflat.h>
+#include <alloc_phys.h>
+#include <asm/page.h>
+#include <string.h>
+#include <asm/interrupt.h>
+#include <asm/arch_def.h>
+#include <asm/clock.h>

s390x/css.c line 29

Quoted 10 lines
s390x/css.c +4 -0
 
 #include <css.h>
 
 #define SID_ONE		0x00010000
+#define PSW_PRG_MASK (PSW_MASK_IO | PSW_MASK_EA | PSW_MASK_BA)
+
+struct lowcore *lowcore = (void *)0x0;
 
 static struct schib schib;
+#define NB_CCW  100

s/NB_CCW/NUM_CCWS/ ?

I was scratching my head a bit when I first saw that define.

Quoted 13 lines
s390x/css.c +6 -0
+static struct ccw ccw[NB_CCW];
+#define NB_ORB  100
+static struct orb orb[NB_ORB];
+static struct irb irb;
+static char buffer[0x1000] __attribute__ ((aligned(8)));
+static struct senseid senseid;
 
 static const char *Channel_type[3] = {
 	"I/O", "CHSC", "MSG"
@@ -24,6 +40,34 @@ static const char *Channel_type[3] = {
 
 static int test_device_sid;
 

(...)

s390x/css.c static void test_enable(void) · line 152

Quoted 11 lines
s390x/css.c +11 -0
+void handle_io_int(void)
+{
+	int ret = 0;
+	char *flags;
+
+	report_prefix_push("Interrupt");
+	if (lowcore->io_int_param != 0xcafec0ca) {
+		report("Bad io_int_param: %x", 0, lowcore->io_int_param);
+		report_prefix_pop();
+		return;
+	}

Should you accommodate unsolicited interrupts as well?

Quoted 15 lines
s390x/css.c +15 -0
+	report("io_int_param: %x", 1, lowcore->io_int_param);
+	report_prefix_pop();
+
+	ret = tsch(lowcore->subsys_id_word, &irb);
+	dump_irb(&irb);
+	flags = dump_scsw_flags(irb.scsw.ctrl);
+
+	if (ret)
+		report("IRB scsw flags: %s", 0, flags);
+	else
+		report("IRB scsw flags: %s", 1, flags);
+	report_prefix_pop();
+}
+
+static int start_subchannel(int code, char *data, int count)

s390x/css.c static void test_enable(void) · line 177

Quoted 10 lines
s390x/css.c +10 -0
+{
+	int ret;
+	struct pmcw *p = &schib.pmcw;
+	struct orb *orb_p = &orb[0];
+
+	if (!test_device_sid) {
+		report_skip("No device");
+		return 0;
+	}
+	ret = stsch(test_device_sid, &schib);

That schib is a global variable, isn't it? Why do you need to re-check?

s390x/css.c static void test_enable(void) · line 186

Quoted 9 lines
s390x/css.c +9 -0
+	if (ret) {
+		report("Err %d on stsch on sid %08x", 0, ret, test_device_sid);
+		return 0;
+	}
+	if (!(p->flags & PMCW_ENABLE)) {
+		report_skip("Device (sid %08x) not enabled", test_device_sid);
+		return 0;
+	}
+	ccw[0].code = code ;

Extra ' ' before ';'

s390x/css.c static void test_enable(void) · line 187

Quoted 1 line
s390x/css.c +1 -0
+	ccw[0].flags = CCW_F_PCI;

Huh, what's that PCI for?

s390x/css.c static void test_enable(void) · line 189

Quoted 2 lines
s390x/css.c +2 -0
+	ccw[0].count = count;
+	ccw[0].data = (int)(unsigned long)data;

Can you be sure that data is always below 2G?

Quoted 26 lines
s390x/css.c +26 -0
+	orb_p->intparm = 0xcafec0ca;
+	orb_p->ctrl = ORB_F_INIT_IRQ|ORB_F_FORMAT|ORB_F_LPM_DFLT;
+	orb_p->cpa = (unsigned int) (unsigned long)&ccw[0];
+
+	report_prefix_push("Start Subchannel");
+	ret = ssch(test_device_sid, orb_p);
+	if (ret) {
+		report("ssch cc=%d", 0, ret);
+		report_prefix_pop();
+		return 0;
+	}
+	report_prefix_pop();
+	return 1;
+}
+
+static void test_sense(void)
+{
+	int success;
+
+	enable_io_irq();
+
+	success = start_subchannel(CCW_CMD_SENSE_ID, buffer, sizeof(senseid));
+	if (!success) {
+		report("start_subchannel failed", 0);
+		return;
+	}

s390x/css.c static void test_enable(void) · line 225

Quoted 10 lines
s390x/css.c +10 -0
+
+	senseid.cu_type = buffer[2] | (buffer[1] << 8);
+	delay(1000);
+
+	/* Sense ID is non packed cut_type is at offset +1 byte */
+	if (senseid.cu_type == PONG_CU)
+		report("cu_type: expect c0ca, got %04x", 1, senseid.cu_type);
+	else
+		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
+}

I'm not really convinced by that logic here. This will fall apart if you don't have your pong device exactly in the right place, and it does not make it easy to extend this for more devices in the future.

What about the following:
- do a stsch() loop (basically re-use your first patch)
- for each I/O subchannel with dnv=1, do SenseID
- use the first (?) device with a c0ca CU type as your test device

Or maybe I'm overthinking this? It just does not strike me as very robust and reusable.

Quoted 11 lines
s390x/css.c +2 -0
+
 static struct {
 	const char *name;
 	void (*func)(void);
 } tests[] = {
 	{ "enumerate (stsch)", test_enumerate },
 	{ "enable (msch)", test_enable },
+	{ "sense (ssch/tsch)", test_sense },
 	{ NULL, NULL }
 };
#34 lore raw

Re: [kvm-unit-tests PATCH v2 8/9] s390x: css: ssch/tsch with sense and interrupt

Quoted 6 lines · Cornelia Huck
Quoted 3 lines · On Thu, 28 Nov 2019 13:46:06 +0100 Pierre Morel <[email protected]> wrote:

When a channel is enabled we can start a SENSE command using the SSCH instruction to recognize the control unit and device.

Quoted 6 lines
Quoted 4 lines

This tests the success of SSCH, the I/O interruption and the TSCH instructions.

The test expect a device with a control unit type of 0xC0CA.

s/expect/expects/

... :(

Quoted 33 lines
Quoted 8 lines
---
  lib/s390x/css.h |  13 +++++
  s390x/css.c     | 137 ++++++++++++++++++++++++++++++++++++++++++++++++
  2 files changed, 150 insertions(+)

(...)

Quoted 22 lines
s390x/css.c +9 -0
index e42dc2f..534864f 100644
@@ -11,12 +11,28 @@
   */
 
  #include <libcflat.h>
+#include <alloc_phys.h>
+#include <asm/page.h>
+#include <string.h>
+#include <asm/interrupt.h>
+#include <asm/arch_def.h>
+#include <asm/clock.h>
 
  #include <css.h>
 
  #define SID_ONE		0x00010000
+#define PSW_PRG_MASK (PSW_MASK_IO | PSW_MASK_EA | PSW_MASK_BA)
+
+struct lowcore *lowcore = (void *)0x0;
 
Quoted 6 lines

s390x/css.c line 29

Quoted 2 lines
s390x/css.c +1 -0
  static struct schib schib;
+#define NB_CCW  100

s/NB_CCW/NUM_CCWS/ ?

I was scratching my head a bit when I first saw that define.

French and english.... sorry
of course better, I change it

Quoted 17 lines
Quoted 14 lines
s390x/css.c +6 -0
+static struct ccw ccw[NB_CCW];
+#define NB_ORB  100
+static struct orb orb[NB_ORB];
+static struct irb irb;
+static char buffer[0x1000] __attribute__ ((aligned(8)));
+static struct senseid senseid;
 
  static const char *Channel_type[3] = {
  	"I/O", "CHSC", "MSG"
@@ -24,6 +40,34 @@ static const char *Channel_type[3] = {
 
  static int test_device_sid;
 

(...)

Quoted 13 lines

s390x/css.c static void test_enable(void) · line 152

Quoted 11 lines
s390x/css.c +11 -0
+void handle_io_int(void)
+{
+	int ret = 0;
+	char *flags;
+
+	report_prefix_push("Interrupt");
+	if (lowcore->io_int_param != 0xcafec0ca) {
+		report("Bad io_int_param: %x", 0, lowcore->io_int_param);
+		report_prefix_pop();
+		return;
+	}

Should you accommodate unsolicited interrupts as well?

Yet, I do not expect unsolicited interrupt.
But should be at least kept in mind.

May be I add this for v3.

Quoted 20 lines
Quoted 20 lines
s390x/css.c +19 -0
+	report("io_int_param: %x", 1, lowcore->io_int_param);
+	report_prefix_pop();
+
+	ret = tsch(lowcore->subsys_id_word, &irb);
+	dump_irb(&irb);
+	flags = dump_scsw_flags(irb.scsw.ctrl);
+
+	if (ret)
+		report("IRB scsw flags: %s", 0, flags);
+	else
+		report("IRB scsw flags: %s", 1, flags);
+	report_prefix_pop();
+}
+
+static int start_subchannel(int code, char *data, int count)
+{
+	int ret;
+	struct pmcw *p = &schib.pmcw;
+	struct orb *orb_p = &orb[0];
Quoted 8 lines

s390x/css.c static void test_enable(void) · line 177

Quoted 6 lines
s390x/css.c +6 -0
+
+	if (!test_device_sid) {
+		report_skip("No device");
+		return 0;
+	}
+	ret = stsch(test_device_sid, &schib);

That schib is a global variable, isn't it? Why do you need to re-check?

In the principe the previous tests, storing the SHIB could have been disabled.

Quoted 12 lines

s390x/css.c static void test_enable(void) · line 186

Quoted 10 lines
s390x/css.c +9 -0
+	if (ret) {
+		report("Err %d on stsch on sid %08x", 0, ret, test_device_sid);
+		return 0;
+	}
+	if (!(p->flags & PMCW_ENABLE)) {
+		report_skip("Device (sid %08x) not enabled", test_device_sid);
+		return 0;
+	}
+	ccw[0].code = code ;

Extra ' ' before ';'

yes, thanks

Quoted 4 lines

s390x/css.c static void test_enable(void) · line 187

Quoted 2 lines
s390x/css.c +1 -0
+	ccw[0].flags = CCW_F_PCI;

Huh, what's that PCI for?

Program Control Interruption

I will add a comment :)

Quoted 5 lines

s390x/css.c static void test_enable(void) · line 189

Quoted 3 lines
s390x/css.c +2 -0
+	ccw[0].count = count;
+	ccw[0].data = (int)(unsigned long)data;

Can you be sure that data is always below 2G?

Currently yes, the program is loaded at 0x10000 and is quite small
also doing a test does not hurt for the case the function is used in another test someday.

Quoted 33 lines
Quoted 33 lines
s390x/css.c +32 -0
+	orb_p->intparm = 0xcafec0ca;
+	orb_p->ctrl = ORB_F_INIT_IRQ|ORB_F_FORMAT|ORB_F_LPM_DFLT;
+	orb_p->cpa = (unsigned int) (unsigned long)&ccw[0];
+
+	report_prefix_push("Start Subchannel");
+	ret = ssch(test_device_sid, orb_p);
+	if (ret) {
+		report("ssch cc=%d", 0, ret);
+		report_prefix_pop();
+		return 0;
+	}
+	report_prefix_pop();
+	return 1;
+}
+
+static void test_sense(void)
+{
+	int success;
+
+	enable_io_irq();
+
+	success = start_subchannel(CCW_CMD_SENSE_ID, buffer, sizeof(senseid));
+	if (!success) {
+		report("start_subchannel failed", 0);
+		return;
+	}
+
+	senseid.cu_type = buffer[2] | (buffer[1] << 8);
+	delay(1000);
+
+	/* Sense ID is non packed cut_type is at offset +1 byte */
+	if (senseid.cu_type == PONG_CU)
Quoted 8 lines

s390x/css.c static void test_enable(void) · line 225

Quoted 4 lines
s390x/css.c +4 -0
+		report("cu_type: expect c0ca, got %04x", 1, senseid.cu_type);
+	else
+		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
+}

I'm not really convinced by that logic here. This will fall apart if you don't have your pong device exactly in the right place, and it does not make it easy to extend this for more devices in the future.

Wanted to keep things simple. PONG must be the first valid channel. also, should be documented at least.

Quoted 8 lines

What about the following:
- do a stsch() loop (basically re-use your first patch)
- for each I/O subchannel with dnv=1, do SenseID
- use the first (?) device with a c0ca CU type as your test device

Or maybe I'm overthinking this? It just does not strike me as very robust and reusable.

I can do it.

Thanks for the comments,

Best regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#35 lore raw

Re: [kvm-unit-tests PATCH v2 8/9] s390x: css: ssch/tsch with sense and interrupt

Quoted 8 lines · On Mon, 2 Dec 2019 19:18:20 +0100 Pierre Morel <[email protected]> wrote:
Quoted 6 lines · Cornelia Huck

s390x/css.c static void test_enable(void) · line 186

Quoted 1 line · On Thu, 28 Nov 2019 13:46:06 +0100 Pierre Morel <[email protected]> wrote:
s390x/css.c +1 -0
+	ccw[0].code = code ;  

Extra ' ' before ';'

Quoted 8 lines

yes, thanks

Quoted 4 lines

s390x/css.c static void test_enable(void) · line 187

Quoted 2 lines
s390x/css.c +1 -0
+	ccw[0].flags = CCW_F_PCI;  

Huh, what's that PCI for?

Program Control Interruption

Yes; but why do you need it? Doesn't the QEMU device provide you with an interrupt for the final status? I don't think PCI makes sense unless you want a notification for the progress through a chain.

Quoted 2 lines

I will add a comment :)

Good idea; the PCI is bound to confuse people :)

Quoted 10 lines
Quoted 6 lines

s390x/css.c static void test_enable(void) · line 189

Quoted 4 lines
s390x/css.c +2 -0
+	ccw[0].count = count;
+	ccw[0].data = (int)(unsigned long)data;  

Can you be sure that data is always below 2G?

Currently yes, the program is loaded at 0x10000 and is quite small also doing a test does not hurt for the case the function is used in another test someday.

Nod.

Quoted 43 lines
Quoted 34 lines
Quoted 34 lines
s390x/css.c +32 -0
+	orb_p->intparm = 0xcafec0ca;
+	orb_p->ctrl = ORB_F_INIT_IRQ|ORB_F_FORMAT|ORB_F_LPM_DFLT;
+	orb_p->cpa = (unsigned int) (unsigned long)&ccw[0];
+
+	report_prefix_push("Start Subchannel");
+	ret = ssch(test_device_sid, orb_p);
+	if (ret) {
+		report("ssch cc=%d", 0, ret);
+		report_prefix_pop();
+		return 0;
+	}
+	report_prefix_pop();
+	return 1;
+}
+
+static void test_sense(void)
+{
+	int success;
+
+	enable_io_irq();
+
+	success = start_subchannel(CCW_CMD_SENSE_ID, buffer, sizeof(senseid));
+	if (!success) {
+		report("start_subchannel failed", 0);
+		return;
+	}
+
+	senseid.cu_type = buffer[2] | (buffer[1] << 8);
+	delay(1000);
+
+	/* Sense ID is non packed cut_type is at offset +1 byte */
+	if (senseid.cu_type == PONG_CU)
Quoted 8 lines

s390x/css.c static void test_enable(void) · line 225

Quoted 4 lines
s390x/css.c +4 -0
+		report("cu_type: expect c0ca, got %04x", 1, senseid.cu_type);
+	else
+		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
+}  

I'm not really convinced by that logic here. This will fall apart if you don't have your pong device exactly in the right place, and it does not make it easy to extend this for more devices in the future.

Quoted 2 lines

Wanted to keep things simple. PONG must be the first valid channel. also, should be documented at least.

Yes, please :)

Quoted 17 lines
Quoted 9 lines

What about the following:
- do a stsch() loop (basically re-use your first patch)
- for each I/O subchannel with dnv=1, do SenseID
- use the first (?) device with a c0ca CU type as your test device

Or maybe I'm overthinking this? It just does not strike me as very robust and reusable.

I can do it.

Thanks for the comments,

Best regards,
Pierre

#36 lore raw

Re: [kvm-unit-tests PATCH v2 8/9] s390x: css: ssch/tsch with sense and interrupt

Quoted 18 lines · Cornelia Huck
Quoted 15 lines · On Mon, 2 Dec 2019 19:18:20 +0100 Pierre Morel <[email protected]> wrote:
Quoted 6 lines · Cornelia Huck

s390x/css.c static void test_enable(void) · line 186

Quoted 1 line · On Thu, 28 Nov 2019 13:46:06 +0100 Pierre Morel <[email protected]> wrote:
s390x/css.c +1 -0
+	ccw[0].code = code ;

Extra ' ' before ';'

yes, thanks

Quoted 4 lines

s390x/css.c static void test_enable(void) · line 187

Quoted 2 lines
s390x/css.c +1 -0
+	ccw[0].flags = CCW_F_PCI;

Huh, what's that PCI for?

Quoted 5 lines
Quoted 1 line

Program Control Interruption

Yes; but why do you need it? Doesn't the QEMU device provide you with an interrupt for the final status? I don't think PCI makes sense unless you want a notification for the progress through a chain.

Right, but this is for a later test.
So I do not need it. Will remove it.

Quoted 13 lines
Quoted 3 lines

I will add a comment :)

Good idea; the PCI is bound to confuse people :)

Quoted 7 lines
Quoted 6 lines

s390x/css.c static void test_enable(void) · line 189

Quoted 4 lines
s390x/css.c +2 -0
+	ccw[0].count = count;
+	ccw[0].data = (int)(unsigned long)data;

Can you be sure that data is always below 2G?

Quoted 5 lines
Quoted 3 lines

Currently yes, the program is loaded at 0x10000 and is quite small also doing a test does not hurt for the case the function is used in another test someday.

Nod.

Will do.

Quoted 44 lines
Quoted 44 lines
Quoted 43 lines
Quoted 29 lines
s390x/css.c +26 -0
+	orb_p->intparm = 0xcafec0ca;
+	orb_p->ctrl = ORB_F_INIT_IRQ|ORB_F_FORMAT|ORB_F_LPM_DFLT;
+	orb_p->cpa = (unsigned int) (unsigned long)&ccw[0];
+
+	report_prefix_push("Start Subchannel");
+	ret = ssch(test_device_sid, orb_p);
+	if (ret) {
+		report("ssch cc=%d", 0, ret);
+		report_prefix_pop();
+		return 0;
+	}
+	report_prefix_pop();
+	return 1;
+}
+
+static void test_sense(void)
+{
+	int success;
+
+	enable_io_irq();
+
+	success = start_subchannel(CCW_CMD_SENSE_ID, buffer, sizeof(senseid));
+	if (!success) {
+		report("start_subchannel failed", 0);
+		return;
+	}

s390x/css.c static void test_enable(void) · line 225

Quoted 10 lines
s390x/css.c +10 -0
+
+	senseid.cu_type = buffer[2] | (buffer[1] << 8);
+	delay(1000);
+
+	/* Sense ID is non packed cut_type is at offset +1 byte */
+	if (senseid.cu_type == PONG_CU)
+		report("cu_type: expect c0ca, got %04x", 1, senseid.cu_type);
+	else
+		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
+}

I'm not really convinced by that logic here. This will fall apart if you don't have your pong device exactly in the right place, and it does not make it easy to extend this for more devices in the future.

Quoted 5 lines
Quoted 2 lines

Wanted to keep things simple. PONG must be the first valid channel. also, should be documented at least.

Yes, please :)

Thanks.

Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#37 lore raw

PATCH v2 9/9 s390x: css: ping pong

In reply to Pierre Morel

To test a write command with the SSCH instruction we need a QEMU device, with control unit type 0xC0CA. The PONG device is such a device.

This type of device respond to PONG_WRITE requests by incrementing an integer, stored as a string at offset 0 of the CCW data.

This is only a success test, no error expected.

---
 s390x/css.c | 46 +++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)
s390x/css.c +45 -1
index 534864f..0761e70 100644
@@ -23,6 +23,10 @@
 #define SID_ONE		0x00010000
 #define PSW_PRG_MASK (PSW_MASK_IO | PSW_MASK_EA | PSW_MASK_BA)
 
+/* Local Channel Commands */
+#define PONG_WRITE	0x21 /* Write */
+#define PONG_READ	0x22 /* Read buffer */
+
 struct lowcore *lowcore = (void *)0x0;
 
 static struct schib schib;
@@ -31,7 +35,8 @@ static struct ccw ccw[NB_CCW];
 #define NB_ORB  100
 static struct orb orb[NB_ORB];
 static struct irb irb;
-static char buffer[0x1000] __attribute__ ((aligned(8)));
+#define BUF_SZ	0x1000
+static char buffer[BUF_SZ] __attribute__ ((aligned(8)));
 static struct senseid senseid;
 
 static const char *Channel_type[3] = {
@@ -224,6 +229,44 @@ static void test_sense(void)
 		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
 }
 
+static void test_ping(void)
+{
+	int success, result;
+	int cnt = 0, max = 4;
+
+	if (senseid.cu_type != PONG_CU) {
+		report_skip("No PONG, no ping-pong");
+		return;
+	}
+
+	enable_io_irq();
+
+	while (cnt++ < max) {
+report_info("cnt..: %08x", cnt);
+		snprintf(buffer, BUF_SZ, "%08x\n", cnt);
+		success = start_subchannel(PONG_WRITE, buffer, 8);
+		if (!success) {
+			report("start_subchannel failed", 0);
+			return;
+		}
+		delay(100);
+		success = start_subchannel(PONG_READ, buffer, 8);
+		if (!success) {
+			report("start_subchannel failed", 0);
+			return;
+		}
+		result = atol(buffer);
+		if (result != (cnt + 1)) {
+			report("Bad answer from pong: %08x - %08x", 0, cnt, result);
+			return;
+		} else 
+			report_info("%08x - %08x", cnt, result);
+
+		delay(100);
+	}
+	report("ping-pong count 0x%08x", 1, cnt);
+}
+
 static struct {
 	const char *name;
 	void (*func)(void);
@@ -231,6 +274,7 @@ static struct {
 	{ "enumerate (stsch)", test_enumerate },
 	{ "enable (msch)", test_enable },
 	{ "sense (ssch/tsch)", test_sense },
+	{ "ping-pong (ssch/tsch)", test_ping },
 	{ NULL, NULL }
 };
 
Signature · 1 line
2.17.0
#38 lore raw

Re: [kvm-unit-tests PATCH v2 9/9] s390x: css: ping pong

Quoted 2 lines · On Thu, 28 Nov 2019 13:46:07 +0100 Pierre Morel <[email protected]> wrote:

To test a write command with the SSCH instruction we need a QEMU device, with control unit type 0xC0CA. The PONG device is such a device.

"We want to test some read/write ccws via the SSCH instruction with a QEMU device with control unit type 0xC0CA." ?

Quoted 2 lines

This type of device respond to PONG_WRITE requests by incrementing an

s/respond/responds/

Quoted 3 lines

integer, stored as a string at offset 0 of the CCW data.

This is only a success test, no error expected.

Nobody expects the Spanish Inquisition^W^W^W an error :)

Quoted 11 lines
---
 s390x/css.c | 46 +++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)
s390x/css.c +0 -0
index 534864f..0761e70 100644

s390x/css.c line 26

Quoted 4 lines
s390x/css.c +1 -0
@@ -23,6 +23,10 @@
 #define SID_ONE		0x00010000
 #define PSW_PRG_MASK (PSW_MASK_IO | PSW_MASK_EA | PSW_MASK_BA)
 
+/* Local Channel Commands */

/* Channel commands for the PONG device */

?

s390x/css.c static struct ccw ccw[NB_CCW]; · line 39

Quoted 13 lines
s390x/css.c +5 -1
+#define PONG_WRITE	0x21 /* Write */
+#define PONG_READ	0x22 /* Read buffer */
+
 struct lowcore *lowcore = (void *)0x0;
 
 static struct schib schib;
@@ -31,7 +35,8 @@ static struct ccw ccw[NB_CCW];
 #define NB_ORB  100
 static struct orb orb[NB_ORB];
 static struct irb irb;
-static char buffer[0x1000] __attribute__ ((aligned(8)));
+#define BUF_SZ	0x1000
+static char buffer[BUF_SZ] __attribute__ ((aligned(8)));

Merge this with the introduction of this variable?

Quoted 4 lines
s390x/css.c +0 -0
 static struct senseid senseid;
 
 static const char *Channel_type[3] = {

s390x/css.c static void test_sense(void) · line 238

Quoted 10 lines
s390x/css.c +7 -0
@@ -224,6 +229,44 @@ static void test_sense(void)
 		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
 }
 
+static void test_ping(void)
+{
+	int success, result;
+	int cnt = 0, max = 4;
+
+	if (senseid.cu_type != PONG_CU) {
+		report_skip("No PONG, no ping-pong");

:D

s390x/css.c static void test_sense(void) · line 242

Quoted 4 lines
s390x/css.c +4 -0
+		return;
+	}
+
+	enable_io_irq();

Hasn't that been enabled already for doing SenseID?

s390x/css.c static void test_sense(void) · line 245

Quoted 3 lines
s390x/css.c +3 -0
+
+	while (cnt++ < max) {
+report_info("cnt..: %08x", cnt);

Wrong indentation?

Quoted 35 lines
s390x/css.c +25 -0
+		snprintf(buffer, BUF_SZ, "%08x\n", cnt);
+		success = start_subchannel(PONG_WRITE, buffer, 8);
+		if (!success) {
+			report("start_subchannel failed", 0);
+			return;
+		}
+		delay(100);
+		success = start_subchannel(PONG_READ, buffer, 8);
+		if (!success) {
+			report("start_subchannel failed", 0);
+			return;
+		}
+		result = atol(buffer);
+		if (result != (cnt + 1)) {
+			report("Bad answer from pong: %08x - %08x", 0, cnt, result);
+			return;
+		} else 
+			report_info("%08x - %08x", cnt, result);
+
+		delay(100);
+	}
+	report("ping-pong count 0x%08x", 1, cnt);
+}
+
 static struct {
 	const char *name;
 	void (*func)(void);
@@ -231,6 +274,7 @@ static struct {
 	{ "enumerate (stsch)", test_enumerate },
 	{ "enable (msch)", test_enable },
 	{ "sense (ssch/tsch)", test_sense },
+	{ "ping-pong (ssch/tsch)", test_ping },
 	{ NULL, NULL }
 };
 
#39 lore raw

Re: [kvm-unit-tests PATCH v2 9/9] s390x: css: ping pong

Quoted 6 lines · Cornelia Huck
Quoted 2 lines · On Thu, 28 Nov 2019 13:46:07 +0100 Pierre Morel <[email protected]> wrote:

To test a write command with the SSCH instruction we need a QEMU device, with control unit type 0xC0CA. The PONG device is such a device.

Quoted 7 lines

"We want to test some read/write ccws via the SSCH instruction with a QEMU device with control unit type 0xC0CA." ?

Quoted 2 lines

This type of device respond to PONG_WRITE requests by incrementing an

s/respond/responds/

oiiinnnn..... but yes

Quoted 21 lines
Quoted 4 lines

integer, stored as a string at offset 0 of the CCW data.

This is only a success test, no error expected.

Nobody expects the Spanish Inquisition^W^W^W an error :)

Quoted 14 lines
---
  s390x/css.c | 46 +++++++++++++++++++++++++++++++++++++++++++++-
  1 file changed, 45 insertions(+), 1 deletion(-)
s390x/css.c +0 -0
index 534864f..0761e70 100644
@@ -23,6 +23,10 @@
  #define SID_ONE		0x00010000
  #define PSW_PRG_MASK (PSW_MASK_IO | PSW_MASK_EA | PSW_MASK_BA)
 
Quoted 5 lines

s390x/css.c line 26

Quoted 1 line
s390x/css.c +1 -0
+/* Local Channel Commands */

/* Channel commands for the PONG device */

?

better, thanks

Quoted 6 lines
Quoted 6 lines
s390x/css.c +3 -0
+#define PONG_WRITE	0x21 /* Write */
+#define PONG_READ	0x22 /* Read buffer */
+
  struct lowcore *lowcore = (void *)0x0;
 
Quoted 10 lines

s390x/css.c static struct ccw ccw[NB_CCW]; · line 39

Quoted 8 lines
s390x/css.c +2 -1
  static struct schib schib;
@@ -31,7 +35,8 @@ static struct ccw ccw[NB_CCW];
  #define NB_ORB  100
  static struct orb orb[NB_ORB];
  static struct irb irb;
-static char buffer[0x1000] __attribute__ ((aligned(8)));
+#define BUF_SZ	0x1000
+static char buffer[BUF_SZ] __attribute__ ((aligned(8)));

Merge this with the introduction of this variable?

yes, better too

Quoted 18 lines
Quoted 5 lines
s390x/css.c +0 -0
  static struct senseid senseid;
 
  static const char *Channel_type[3] = {

s390x/css.c static void test_sense(void) · line 238

Quoted 10 lines
s390x/css.c +7 -0
@@ -224,6 +229,44 @@ static void test_sense(void)
  		report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
  }
 
+static void test_ping(void)
+{
+	int success, result;
+	int cnt = 0, max = 4;
+
+	if (senseid.cu_type != PONG_CU) {
+		report_skip("No PONG, no ping-pong");

:D

Quoted 6 lines

s390x/css.c static void test_sense(void) · line 242

Quoted 4 lines
s390x/css.c +4 -0
+		return;
+	}
+
+	enable_io_irq();

Hasn't that been enabled already for doing SenseID?

Yes, but same remark as before, the sub tests here are independant, started from the test[] table. If the sense test is commented out, the...

Quoted 6 lines

s390x/css.c static void test_sense(void) · line 245

Quoted 4 lines
s390x/css.c +3 -0
+
+	while (cnt++ < max) {
+report_info("cnt..: %08x", cnt);

Wrong indentation?

wrong report !
forgotten from a test.

Thanks for the review,
Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen
#40 lore raw

Re: [kvm-unit-tests PATCH v2 9/9] s390x: css: ping pong

Quoted 86 lines · Pierre Morel
Quoted 6 lines · Cornelia Huck
Quoted 2 lines · On Thu, 28 Nov 2019 13:46:07 +0100 Pierre Morel <[email protected]> wrote:

To test a write command with the SSCH instruction we need a QEMU device, with control unit type 0xC0CA. The PONG device is such a device.

Quoted 7 lines

"We want to test some read/write ccws via the SSCH instruction with a QEMU device with control unit type 0xC0CA." ?

Quoted 2 lines

This type of device respond to PONG_WRITE requests by incrementing an

s/respond/responds/

oiiinnnn..... but yes

Quoted 24 lines
Quoted 4 lines

integer, stored as a string at offset 0 of the CCW data.

This is only a success test, no error expected.

Nobody expects the Spanish Inquisition^W^W^W an error :)

Quoted 11 lines

---
  s390x/css.c | 46 +++++++++++++++++++++++++++++++++++++++++++++-

  1 file changed, 45 insertions(+), 1 deletion(-)
s390x/css.c +0 -0
index 534864f..0761e70 100644

s390x/css.c line 25

Quoted 3 lines
s390x/css.c +1 -0
@@ -23,6 +23,10 @@
   #define SID_ONE        0x00010000
   #define PSW_PRG_MASK (PSW_MASK_IO | PSW_MASK_EA | PSW_MASK_BA)
+/* Local Channel Commands */

/* Channel commands for the PONG device */

Quoted 1 line

?

better, thanks

Quoted 15 lines

s390x/css.c static struct ccw ccw[NB_CCW]; · line 39

Quoted 13 lines
s390x/css.c +5 -1
+#define PONG_WRITE    0x21 /* Write */
+#define PONG_READ    0x22 /* Read buffer */
+
   struct lowcore *lowcore = (void *)0x0;
   static struct schib schib;
@@ -31,7 +35,8 @@ static struct ccw ccw[NB_CCW];
   #define NB_ORB  100
   static struct orb orb[NB_ORB];
   static struct irb irb;
-static char buffer[0x1000] __attribute__ ((aligned(8)));
+#define BUF_SZ    0x1000
+static char buffer[BUF_SZ] __attribute__ ((aligned(8)));

Merge this with the introduction of this variable?

yes, better too

Quoted 21 lines

s390x/css.c static void test_sense(void) · line 237

Quoted 13 lines
s390x/css.c +7 -0
   static struct senseid senseid;
   static const char *Channel_type[3] = {
@@ -224,6 +229,44 @@ static void test_sense(void)
           report("cu_type: expect c0ca, got %04x", 0, senseid.cu_type);
   }
+static void test_ping(void)
+{
+    int success, result;
+    int cnt = 0, max = 4;
+
+    if (senseid.cu_type != PONG_CU) {
+        report_skip("No PONG, no ping-pong");

:D

Quoted 4 lines
s390x/css.c +4 -0
+        return;
+    }
+
+    enable_io_irq();
Quoted 4 lines
Quoted 1 line

Hasn't that been enabled already for doing SenseID?

Yes, but same remark as before, the sub tests here are independant, started from the test[] table. If the sense test is commented out, the...

hum, coming back here again, the tests depends one from the other and are absolutely not independent as I pretended. so... You are right I do not need to enable IRQ here.

Quoted 16 lines
Quoted 7 lines

s390x/css.c static void test_sense(void) · line 245

Quoted 5 lines
s390x/css.c +3 -0
+
+    while (cnt++ < max) {
+report_info("cnt..: %08x", cnt);

Wrong indentation?

wrong report !
forgotten from a test.

Thanks for the review,
Regards,
Pierre

Signature · 2 lines
Pierre Morel
IBM Lab Boeblingen