Add modem Clock controller (MSS CC) driver for SC7180
v2 cover Add modem Clock controller (MSS CC) driver for SC7180
[v2]
* Update the license for the documentation and fix minor comments in the YAML bindings.
[v1]
* Add driver support for Modem clock controller for SC7180 and also update device tree bindings for the various clocks supported in the clock controller.
Taniya Das (3):
dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
dt-bindings: clock: Introduce QCOM Modem clock bindings
clk: qcom: Add modem clock controller driver for SC7180
.../devicetree/bindings/clock/qcom,mss.yaml | 41 ++++++++++ drivers/clk/qcom/Kconfig | 9 +++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sc7180.c | 70 ++++++++++++++++ drivers/clk/qcom/mss-sc7180.c | 94 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sc7180.h | 5 ++ include/dt-bindings/clock/qcom,mss-sc7180.h | 12 +++ 7 files changed, 232 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,mss.yaml create mode 100644 drivers/clk/qcom/mss-sc7180.c create mode 100644 include/dt-bindings/clock/qcom,mss-sc7180.h
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v2 1/3 dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
The MSS clock provider have a bunch of generic properties that are needed in a device tree. Add a YAML schemas for those.
--- .../devicetree/bindings/clock/qcom,mss.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,mss.yaml
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +41 -0
@@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/qcom,mss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Modem Clock Controller Binding + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm modem clock control module which supports the clocks. + +properties: + compatible : + enum: + - qcom,sc7180-mss + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + additionalItems: false + +required: + - compatible + - reg + - '#clock-cells' + +examples: + # Example of MSS with clock nodes properties for SC7180: + - | + clock-controller@41aa000 { + compatible = "qcom,sc7180-mss"; + reg = <0x041aa000 0x100>; + #clock-cells = <1>; + }; +...
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Re: [PATCH v2 1/3] dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
Hey Taniya,
Quoted 46 lines · Taniya Das
The MSS clock provider have a bunch of generic properties that are needed in a device tree. Add a YAML schemas for those.
Signed-off-by Taniya Das <[email protected]>--- .../devicetree/bindings/clock/qcom,mss.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644
Documentation/devicetree/bindings/clock/qcom,mss.yamlDocumentation/devicetree/bindings/clock/qcom,mss.yaml new file +28
-0@@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/qcom,mss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Modem Clock Controller Binding + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm modem clock control module which supports the clocks. + +properties: + compatible : + enum: + - qcom,sc7180-mss + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + additionalItems: false + +required:
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 38
Quoted 10 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +10
-0+ - compatible + - reg + - '#clock-cells' + +examples: + # Example of MSS with clock nodes properties for SC7180: + - | + clock-controller@41aa000 { + compatible = "qcom,sc7180-mss"; + reg = <0x041aa000 0x100>;
Bjorn/me had a discussion about the size
a while back, we should use the entire
reg space instead of fragmenting it.
reg = <0x041a8000 0x8000>;
We should just use ^^ instead.
Quoted 6 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +3
-1+ #clock-cells = <1>; + }; +... --Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH v2 1/3] dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
Thanks Sibi, will take care of mapping the entire region.
+ reg = <0x041aa000 0x100>;
Quoted 16 lines
Bjorn/me had a discussion about the size
a while back, we should use the entire
reg space instead of fragmenting it.reg = <
0x041a80000x8000>;We should just use ^^ instead.
Quoted 6 lines
+ #clock-cells = <1>;
+ };
+...Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Rob Herring
maintainerRe: [PATCH v2 1/3] dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
In reply to Taniya DasQuoted 21 lines · Taniya Das
The MSS clock provider have a bunch of generic properties that are needed in a device tree. Add a YAML schemas for those.
Signed-off-by Taniya Das <[email protected]>--- .../devicetree/bindings/clock/qcom,mss.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,mss.yamlDocumentation/devicetree/bindings/clock/qcom,mss.yaml new file +6
-0@@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/qcom,mss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# +
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 16
Quoted 10 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +10
-0+title: Qualcomm Modem Clock Controller Binding + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm modem clock control module which supports the clocks. + +properties: + compatible :
drop space ^
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 26
Quoted 10 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +10
-0+ enum: + - qcom,sc7180-mss + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + additionalItems: false
With the indentation here, you are defining a property. Should be no indent.
Quoted 19 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +15
-1+ +required: + - compatible + - reg + - '#clock-cells' + +examples: + # Example of MSS with clock nodes properties for SC7180: + - | + clock-controller@41aa000 { + compatible = "qcom,sc7180-mss"; + reg = <0x041aa000 0x100>; + #clock-cells = <1>; + }; +... --Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Re: [PATCH v2 1/3] dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
Hi Rob,
Thanks for your review.
Quoted 8 lines · Rob Herring
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 16
Quoted 5 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +5
-0+description: | + Qualcomm modem clock control module which supports the clocks. + +properties: + compatible :drop space ^
Will take care in the next patch.
Quoted 5 lines
Quoted 5 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +5
-0+ enum: + - qcom,sc7180-mss + + '#clock-cells': + const: 1
Quoted 9 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 26
Quoted 5 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +5
-0+ + reg: + maxItems: 1 + + additionalItems: falseWith the indentation here, you are defining a property. Should be no indent.
I tried removing the indent too, but I keep getting this error.
Additional properties are not allowed ('additionalItems' was unexpected)
Please let me know if I am missing something?
Quoted 19 lines
Quoted 19 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +15
-1+ +required: + - compatible + - reg + - '#clock-cells' + +examples: + # Example of MSS with clock nodes properties for SC7180: + - | + clock-controller@41aa000 { + compatible = "qcom,sc7180-mss"; + reg = <0x041aa000 0x100>; + #clock-cells = <1>; + }; +... --Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Rob Herring
maintainerRe: [PATCH v2 1/3] dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
Quoted 33 lines · Taniya Das
Hi Rob,
Thanks for your review.
Quoted 8 lines · Rob Herring
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 16
Quoted 5 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +5
-0+description: | + Qualcomm modem clock control module which supports the clocks. + +properties: + compatible :drop space ^
Will take care in the next patch.
Quoted 5 lines
Quoted 5 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +5
-0+ enum: + - qcom,sc7180-mss + + '#clock-cells': + const: 1Quoted 9 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml line 26
Quoted 5 lines
Documentation/devicetree/bindings/clock/qcom,mss.yaml new file +5
-0+ + reg: + maxItems: 1 + + additionalItems: falseWith the indentation here, you are defining a property. Should be no indent.
Quoted 4 lines
I tried removing the indent too, but I keep getting this error.
Additional properties are not allowed ('additionalItems' was unexpected)Please let me know if I am missing something?
Sorry, I was reading that as 'additionalProperties' which is what you want at the top level. Generally, 'additionalItems' is not needed.
Rob
PATCH v2 2/3 dt-bindings: clock: Introduce QCOM Modem clock bindings
In reply to Taniya DasAdd device tree bindings for modem clock controller for Qualcomm Technology Inc's SC7180 SoCs.
--- include/dt-bindings/clock/qcom,gcc-sc7180.h | 5 +++++ include/dt-bindings/clock/qcom,mss-sc7180.h | 12 ++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 include/dt-bindings/clock/qcom,mss-sc7180.h
include/dt-bindings/clock/qcom,gcc-sc7180.h +5 -0
@@ -132,6 +132,11 @@#define GCC_VIDEO_GPLL0_DIV_CLK_SRC 122#define GCC_VIDEO_THROTTLE_AXI_CLK 123#define GCC_VIDEO_XO_CLK 124 +#define GCC_MSS_CFG_AHB_CBCR 125 +#define GCC_MSS_MFAB_AXIS_CBCR 126 +#define GCC_MSS_NAV_AXI_CBCR 127 +#define GCC_MSS_Q6_MEMNOC_AXI_CBCR 128 +#define GCC_MSS_SNOC_AXI_CBCR 129/* GCC resets */ #define GCC_QUSB2PHY_PRIM_BCR 0
include/dt-bindings/clock/qcom,mss-sc7180.h new file +12 -0
@@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +* Copyright (c) 2019, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H +#define _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H + +#define MSS_AXI_CRYPTO_CLK 0 +#define MSS_AXI_NAV_CLK 1 + +#endif
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v2 3/3 clk: qcom: Add modem clock controller driver for SC7180
In reply to Taniya DasAdd support for the modem clock controller found on SC7180 based devices. This would allow modem drivers to probe and control their clocks.
--- drivers/clk/qcom/Kconfig | 9 +++++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sc7180.c | 70 ++++++++++++++++++++++++++++++++ drivers/clk/qcom/mss-sc7180.c | 94 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 174 insertions(+) create mode 100644 drivers/clk/qcom/mss-sc7180.c
drivers/clk/qcom/Kconfig +9 -0
@@ -245,6 +245,15 @@ config SC_GCC_7180 Say Y if you want to use peripheral devices such as UART, SPI, I2C, USB, UFS, SDCC, etc. +config SC_MSS_7180 + tristate "SC7180 MSS Clock Controller" + select SC_GCC_7180 + help + Support for the MSS clock controller on Qualcomm Technologies, Inc + SC7180 devices. + Say Y if you want to use the MSS branch clocks of the MSS clock + controller to reset the MSS subsystem. + config SDM_CAMCC_845 tristate "SDM845 Camera Clock Controller" select SDM_GCC_845
drivers/clk/qcom/Makefile +1 -0
@@ -46,6 +46,7 @@ obj-$(CONFIG_QCS_GCC_404) += gcc-qcs404.o obj-$(CONFIG_QCS_Q6SSTOP_404) += q6sstop-qcs404.o obj-$(CONFIG_QCS_TURING_404) += turingcc-qcs404.o obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o +obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.o
drivers/clk/qcom/gcc-sc7180.c +70 -0
82 lines not on this page · raw message
drivers/clk/qcom/mss-sc7180.c new file +94 -0
94 lines not on this page · raw message
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Re: [PATCH v2 3/3] clk: qcom: Add modem clock controller driver for SC7180
Hey Taniya,
Quoted 150 lines · Taniya Das
Add support for the modem clock controller found on SC7180 based devices. This would allow modem drivers to probe and control their clocks.
Signed-off-by Taniya Das <[email protected]>--- drivers/clk/qcom/Kconfig | 9 +++++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sc7180.c | 70 ++++++++++++++++++++++++++++++++ drivers/clk/qcom/mss-sc7180.c | 94 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 174 insertions(+) create mode 100644 drivers/clk/qcom/mss-sc7180.cdrivers/clk/qcom/Kconfig +9
-0@@ -245,6 +245,15 @@ config SC_GCC_7180 Say Y if you want to use peripheral devices such as UART, SPI, I2C, USB, UFS, SDCC, etc. +config SC_MSS_7180 + tristate "SC7180 MSS Clock Controller" + select SC_GCC_7180 + help + Support for the MSS clock controller on Qualcomm Technologies, Inc + SC7180 devices. + Say Y if you want to use the MSS branch clocks of the MSS clock + controller to reset the MSS subsystem. + config SDM_CAMCC_845 tristate "SDM845 Camera Clock Controller" select SDM_GCC_845drivers/clk/qcom/Makefile +1
-0@@ -46,6 +46,7 @@ obj-$(CONFIG_QCS_GCC_404) += gcc-qcs404.o obj-$(CONFIG_QCS_Q6SSTOP_404) += q6sstop-qcs404.o obj-$(CONFIG_QCS_TURING_404) += turingcc-qcs404.o obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o +obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.odrivers/clk/qcom/gcc-sc7180.c +70
-0@@ -2165,6 +2165,71 @@ static struct clk_branch gcc_video_xo_clk = { }, }; +static struct clk_branch gcc_mss_cfg_ahb_clk = { + .halt_reg =0x8a000 , + .halt_check =BRANCH_HALT , + .clkr = { + .enable_reg =0x8a000 , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_mss_cfg_ahb_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_mfab_axis_clk = { + .halt_reg =0x8a004 , + .halt_check =BRANCH_HALT_VOTED , + .clkr = { + .enable_reg =0x8a004 , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_mss_mfab_axis_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_nav_axi_clk = { + .halt_reg =0x8a00c , + .halt_check =BRANCH_HALT_VOTED , + .clkr = { + .enable_reg =0x8a00c , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_mss_nav_axi_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_snoc_axi_clk = { + .halt_reg =0x8a150 , + .halt_check =BRANCH_HALT , + .clkr = { + .enable_reg =0x8a150 , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_mss_snoc_axi_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_q6_memnoc_axi_clk = { + .halt_reg =0x8a154 , + .halt_check =BRANCH_HALT , + .clkr = { + .enable_reg =0x8a154 , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_mss_q6_memnoc_axi_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; +static struct gdsc ufs_phy_gdsc = { .gdscr =0x77004 , .pd = {@@ -2334,6 +2399,11 @@ static struct clk_regmap *gcc_sc7180_clocks[] = { [GPLL7] = &gpll7.clkr, [GPLL4] = &gpll4.clkr, [GPLL1] = &gpll1.clkr, + [GCC_MSS_CFG_AHB_CBCR] = &gcc_mss_cfg_ahb_clk.clkr, + [GCC_MSS_MFAB_AXIS_CBCR] = &gcc_mss_mfab_axis_clk.clkr, + [GCC_MSS_NAV_AXI_CBCR] = &gcc_mss_nav_axi_clk.clkr, + [GCC_MSS_Q6_MEMNOC_AXI_CBCR] = &gcc_mss_q6_memnoc_axi_clk.clkr, + [GCC_MSS_SNOC_AXI_CBCR] = &gcc_mss_snoc_axi_clk.clkr, };static const struct
qcom_reset_mapgcc_sc7180_resets[] = {drivers/clk/qcom/mss-sc7180.c new file +9
-0@@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +* Copyright (c) 2019, The Linux Foundation. All rights reserved. +*/ + +#include <linux/clk-provider.h> +#include <linux/platform_device.h> +#include <linux/module.h> +#include <linux/of_address.h>
drivers/clk/qcom/mss-sc7180.c line 19
Quoted 10 lines
drivers/clk/qcom/mss-sc7180.c new file +10
-0+#include <linux/regmap.h> + +#include <dt-bindings/clock/qcom,mss-sc7180.h> + +#include "clk-regmap.h" +#include "clk-branch.h" +#include "common.h" + +static struct clk_branch mss_axi_nav_clk = { + .halt_reg =0xbc ,
if we use the entire mpss_perph
reg space it should be 0x20bc
instead.
drivers/clk/qcom/mss-sc7180.c line 22
Quoted 3 lines
drivers/clk/qcom/mss-sc7180.c new file +3
-0+ .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0xbc,
0x20bc
drivers/clk/qcom/mss-sc7180.c line 32
Quoted 10 lines
drivers/clk/qcom/mss-sc7180.c new file +10
-0+ .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data ){ + .name ="mss_axi_nav_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch mss_axi_crypto_clk = { + .halt_reg =0xcc ,
if we use the entire mpss_perph
reg space it should be 0x20cc
instead.
drivers/clk/qcom/mss-sc7180.c line 35
Quoted 3 lines
drivers/clk/qcom/mss-sc7180.c new file +3
-0+ .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0xcc,
0x20cc
Quoted 19 lines
drivers/clk/qcom/mss-sc7180.c new file +19
-0+ .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data ){ + .name ="mss_axi_crypto_clk" , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct regmap_config mss_regmap_config = { + .reg_bits =32 , + .reg_stride =4 , + .val_bits =32 , + .fast_io = true, +}; + +static struct clk_regmap *mss_sc7180_clocks[] = { + [MSS_AXI_CRYPTO_CLK ] = &mss_axi_crypto_clk.clkr, + [MSS_AXI_NAV_CLK ] = &mss_axi_nav_clk.clkr, +};
drivers/clk/qcom/mss-sc7180.c line 64
Quoted 10 lines
drivers/clk/qcom/mss-sc7180.c new file +10
-0+ +static const struct qcom_cc_desc mss_sc7180_desc = { + .config = &mss_regmap_config, + .clks = mss_sc7180_clocks, + .num_clks =ARRAY_SIZE (mss_sc7180_clocks), +}; + +static int mss_sc7180_probe (struct platform_device *pdev) +{ +return qcom_cc_probe (pdev, &mss_sc7180_desc);
Similar to turingcc-qcs404 and q6sstop-qcs404
shouldn't we model the iface clk dependency
here since both the above clocks cant be turned
on/off without it.
Quoted 33 lines
drivers/clk/qcom/mss-sc7180.c new file +30
-1+} + +static const struct of_device_id mss_sc7180_match_table[] = { + { .compatible ="qcom,sc7180-mss" }, + { } +}; +MODULE_DEVICE_TABLE (of, mss_sc7180_match_table); + +static struct platform_driver mss_sc7180_driver = { + .probe = mss_sc7180_probe, + .driver = { + .name ="sc7180-mss" , + .of_match_table = mss_sc7180_match_table, + }, +}; + +static int __init mss_sc7180_init (void ) +{ +return platform_driver_register (&mss_sc7180_driver); +} +subsys_initcall (mss_sc7180_init); + +static void __exit mss_sc7180_exit(void) +{ +platform_driver_unregister (&mss_sc7180_driver); +} +module_exit (mss_sc7180_exit); + +MODULE_DESCRIPTION ("QTI MSS SC7180 Driver" ); +MODULE_LICENSE ("GPL v2" ); --Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Re: [PATCH v2 3/3] clk: qcom: Add modem clock controller driver for SC7180
Hi Sibi,
Thanks for your review.
Quoted 34 lines · Sibi Sankar
Hey Taniya,
Quoted 16 lines
static const struct
qcom_reset_mapgcc_sc7180_resets[] = {drivers/clk/qcom/mss-sc7180.c new file +9
-0@@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +* Copyright (c) 2019, The Linux Foundation. All rights reserved. +*/ + +#include <linux/clk-provider.h> +#include <linux/platform_device.h> +#include <linux/module.h> +#include <linux/of_address.h> drivers/clk/qcom/mss-sc7180.c line 19
Quoted 10 lines
drivers/clk/qcom/mss-sc7180.c new file +10
-0+#include <linux/regmap.h> + +#include <dt-bindings/clock/qcom,mss-sc7180.h> + +#include "clk-regmap.h" +#include "clk-branch.h" +#include "common.h" + +static struct clk_branch mss_axi_nav_clk = { + .halt_reg = 0xbc,if we use the entire
mpss_perph
reg space it should be0x20bc
instead.
Quoted 6 lines
drivers/clk/qcom/mss-sc7180.c line 22
Quoted 3 lines
drivers/clk/qcom/mss-sc7180.c new file +3
-0+ .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0xbc,
0x20bc
yes, will take care in the next patch.
Quoted 15 lines
drivers/clk/qcom/mss-sc7180.c line 32
Quoted 10 lines
drivers/clk/qcom/mss-sc7180.c new file +10
-0+ .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "mss_axi_nav_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch mss_axi_crypto_clk = { + .halt_reg = 0xcc,if we use the entire
mpss_perph
reg space it should be0x20cc
instead.
Quoted 6 lines
drivers/clk/qcom/mss-sc7180.c line 35
Quoted 3 lines
drivers/clk/qcom/mss-sc7180.c new file +3
-0+ .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0xcc,
0x20cc
same as above.
Quoted 26 lines
Quoted 26 lines
drivers/clk/qcom/mss-sc7180.c new file +26
-0+ .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "mss_axi_crypto_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct regmap_config mss_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .fast_io = true, +}; + +static struct clk_regmap *mss_sc7180_clocks[] = { + [MSS_AXI_CRYPTO_CLK] = &mss_axi_crypto_clk.clkr, + [MSS_AXI_NAV_CLK] = &mss_axi_nav_clk.clkr, +}; + +static const struct qcom_cc_desc mss_sc7180_desc = { + .config = &mss_regmap_config, + .clks = mss_sc7180_clocks, + .num_clks = ARRAY_SIZE(mss_sc7180_clocks), +}; +
Quoted 9 lines
drivers/clk/qcom/mss-sc7180.c line 64
Quoted 3 lines
drivers/clk/qcom/mss-sc7180.c new file +3
-0+static int mss_sc7180_probe (struct platform_device *pdev) +{ + return qcom_cc_probe(pdev, &mss_sc7180_desc);Similar to turingcc-qcs404 and q6sstop-qcs404
shouldn't we model the iface clk dependency
here since both the above clocks cant be turned
on/off without it.
Could we skip and proceed with the above for now?
Quoted 34 lines
Quoted 33 lines
drivers/clk/qcom/mss-sc7180.c new file +30
-0+} + +static const struct of_device_id mss_sc7180_match_table[] = { + { .compatible = "qcom,sc7180-mss" }, + { } +}; +MODULE_DEVICE_TABLE (of, mss_sc7180_match_table); + +static struct platform_driver mss_sc7180_driver = { + .probe = mss_sc7180_probe, + .driver = { + .name = "sc7180-mss", + .of_match_table = mss_sc7180_match_table, + }, +}; + +static int __init mss_sc7180_init (void ) +{ + return platform_driver_register(&mss_sc7180_driver); +} +subsys_initcall (mss_sc7180_init); + +static void __exit mss_sc7180_exit(void) +{ + platform_driver_unregister(&mss_sc7180_driver); +} +module_exit (mss_sc7180_exit); + +MODULE_DESCRIPTION ("QTI MSS SC7180 Driver" ); +MODULE_LICENSE ("GPL v2" );Signature · 2 lines
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Re: [PATCH v2 3/3] clk: qcom: Add modem clock controller driver for SC7180
In reply to Taniya DasHi,
Quoted 20 lines · Taniya Das
Add support for the modem clock controller found on SC7180 based devices. This would allow modem drivers to probe and control their clocks.
Signed-off-by Taniya Das <[email protected]>--- drivers/clk/qcom/Kconfig | 9 +++++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sc7180.c | 70 ++++++++++++++++++++++++++++++++ drivers/clk/qcom/mss-sc7180.c | 94 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 174 insertions(+) create mode 100644 drivers/clk/qcom/mss-sc7180.cdrivers/clk/qcom/Kconfig +0
-0@@ -245,6 +245,15 @@ config SC_GCC_7180 Say Y if you want to use peripheral devices such as UART, SPI,
drivers/clk/qcom/Kconfig config SC_GCC_7180 · line 255
Quoted 10 lines
drivers/clk/qcom/Kconfig +8
-0I2C, USB, UFS, SDCC, etc. +config SC_MSS_7180 + tristate "SC7180 MSS Clock Controller" + select SC_GCC_7180 + help + Support for the MSS clock controller on Qualcomm Technologies, Inc + SC7180 devices. + Say Y if you want to use the MSS branch clocks of the MSS clock + controller to reset the MSS subsystem.
I didn't review your whole patch, but I was skimming through things and trying to figure out what the heck a "MSS" clock was for a while before I finally thought to look at the commit message and figured out that it probably means "modem subsystem". I assume you're going to spin this patch somewhat soon. When you do, can you please expand the "MSS" acronym somewhere in your KConfig description?
Thanks!
-Doug
Stephen Boyd
maintainerQuoting Taniya Das (2019-12-26 20:42:37)
Quoted 3 lines
[v2]
* Update the license for the documentation and fix minor comments in the YAML bindings.
I see Sibi has comments. Please resend with those comments addressed.