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Convert QSPI binding to YAML and add interconnect doc

PATCH Superseded Akash Asthana 2 participants 6 messages Feb 17, 2020 – Mar 13, 2020

Subsystems (3)

v1 of 2 Superseded Latest is v2 →

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#0 lore raw

cover Convert QSPI binding to YAML and add interconnect doc

Akash Asthana (2):
dt-bindings: spi: Convert QSPI bindings to YAML
dt-bindings: spi: Add interconnect binding for QSPI

 .../devicetree/bindings/spi/qcom,spi-qcom-qspi.txt | 36 --------
 .../bindings/spi/qcom,spi-qcom-qspi.yaml           | 97 ++++++++++++++++++++++
 2 files changed, 97 insertions(+), 36 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt
 create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml
Signature · 1 line
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
#1 lore raw

PATCH 1/2 dt-bindings: spi: Convert QSPI bindings to YAML

Convert QSPI bindings to DT schema format using json-schema.

---
 .../devicetree/bindings/spi/qcom,spi-qcom-qspi.txt | 36 ---------
 .../bindings/spi/qcom,spi-qcom-qspi.yaml           | 89 ++++++++++++++++++++++
 2 files changed, 89 insertions(+), 36 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt
 create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt deleted +0 -36
deleted file mode 100644
index 1d64b61..0000000
@@ -1,36 +0,0 @@
-Qualcomm Quad Serial Peripheral Interface (QSPI)
-
-The QSPI controller allows SPI protocol communication in single, dual, or quad
-wire transmission modes for read/write access to slaves such as NOR flash.
-
-Required properties:
-- compatible:	An SoC specific identifier followed by "qcom,qspi-v1", such as
-		"qcom,sdm845-qspi", "qcom,qspi-v1"
-- reg:		Should contain the base register location and length.
-- interrupts:	Interrupt number used by the controller.
-- clocks:	Should contain the core and AHB clock.
-- clock-names:	Should be "core" for core clock and "iface" for AHB clock.
-
-SPI slave nodes must be children of the SPI master node and can contain
-properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
-
-Example:
-
-	qspi: spi@88df000 {
-		compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
-		reg = <0x88df000 0x600>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "iface", "core";
-		clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
-			 <&gcc GCC_QSPI_CORE_CLK>;
-
-		flash@0 {
-			compatible = "jedec,spi-nor";
-			reg = <0>;
-			spi-max-frequency = <25000000>;
-			spi-tx-bus-width = <2>;
-			spi-rx-bus-width = <2>;
-		};
-	};
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +89 -0

89 lines not on this page · raw message

Signature · 1 line
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
#2 lore raw

Re: [PATCH 1/2] dt-bindings: spi: Convert QSPI bindings to YAML

Quoting Akash Asthana (2020-02-17 01:49:33)

Quoted 10 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +4 -0
new file mode 100644
index 0000000..977070a
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 14

Quoted 10 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +10 -0
+$id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Quad Serial Peripheral Interface (QSPI)
+
+maintainers:
+ - Mukesh Savaliya <[email protected]>
+ - Akash Asthana <[email protected]>
+
+description: |

Drop the | because it doesn't look like any formatting needs to be maintained in the text for the description.

Quoted 4 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +4 -0
+ The QSPI controller allows SPI protocol communication in single, dual, or quad
+ wire transmission modes for read/write access to slaves such as NOR flash.
+
+allOf:

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 28

Quoted 10 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +10 -0
+  - $ref: /spi/spi-controller.yaml#
+
+properties:
+  compatible:
+    items:
+      - const: qcom,sdm845-qspi
+      - const: qcom,qspi-v1
+
+  reg:
+    description: Base register location and length.

Drop description? It doesn't seem useful.

Quoted 4 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +4 -0
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 42

Quoted 10 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +10 -0
+
+  clock-names:
+    items:
+      - const: iface
+      - const: core
+
+  clocks:
+    items:
+      - description: AHB clock
+      - description: QSPI core clock.

Please drop the full-stop on core clock.

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 48

Quoted 6 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +6 -0
+
+  "#address-cells":
+     const: 1
+
+  "#size-cells":
+    const: 0

Aren't these two unnecessary because they're covered by the spi-controller.yaml binding?

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 57

Quoted 9 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +9 -0
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clock-names
+  - clocks
+  - "#address-cells"
+  - "#size-cells"

These last two are also covered by spi-controller binding.

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 59

Quoted 2 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +2 -0
+
+

Why two newlines instead of one?

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 65

Quoted 6 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +6 -0
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    soc: soc@0 {

Remove this node from example please.

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 77

Quoted 12 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +12 -0
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        qspi: spi@88df000 {
+            compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
+            reg = <0 0x88df000 0 0x600>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+            clock-names = "iface", "core";
+            clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+                <&gcc GCC_QSPI_CORE_CLK>;

Weird tabbing here. Just use spaces and align it up.

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 85

Quoted 8 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +8 -0
+
+                flash@0 {
+                    compatible = "jedec,spi-nor";
+                    reg = <0>;
+                    spi-max-frequency = <25000000>;
+                    spi-tx-bus-width = <2>;
+                    spi-rx-bus-width = <2>;
+                };

Is this flash node necessary for the example?

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 88

Quoted 3 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +3 -0
+        };
+    };
+

Nitpick: Why newline here?

Quoted 1 line
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +1 -0
+...
#3 lore raw

Re: [PATCH 1/2] dt-bindings: spi: Convert QSPI bindings to YAML

Hi Stephen,

Quoted 15 lines · Stephen Boyd

Quoting Akash Asthana (2020-02-17 01:49:33)

Quoted 14 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +8 -0
new file mode 100644
index 0000000..977070a
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id:"http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
+$schema:"http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Quad Serial Peripheral Interface (QSPI)
Quoted 8 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 14

Quoted 6 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +6 -0
+
+maintainers:
+ - Mukesh Savaliya<[email protected]>
+ - Akash Asthana<[email protected]>
+
+description: |

Drop the | because it doesn't look like any formatting needs to be maintained in the text for the description.

ok

Quoted 7 lines
Quoted 7 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +7 -0
+ The QSPI controller allows SPI protocol communication in single, dual, or quad
+ wire transmission modes for read/write access to slaves such as NOR flash.
+
+allOf:
+  - $ref: /spi/spi-controller.yaml#
+
+properties:
Quoted 8 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 28

Quoted 7 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +7 -0
+  compatible:
+    items:
+      - const: qcom,sdm845-qspi
+      - const: qcom,qspi-v1
+
+  reg:
+    description: Base register location and length.

Drop description? It doesn't seem useful.

ok

Quoted 7 lines
Quoted 7 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +7 -0
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clock-names:
+    items:
Quoted 8 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 42

Quoted 7 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +7 -0
+      - const: iface
+      - const: core
+
+  clocks:
+    items:
+      - description: AHB clock
+      - description: QSPI core clock.

Please drop the full-stop on core clock.

ok

Quoted 8 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 48

Quoted 6 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +6 -0
+
+  "#address-cells":
+     const: 1
+
+  "#size-cells":
+    const: 0

Aren't these two unnecessary because they're covered by the spi-controller.yaml binding?

ok

Quoted 11 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 57

Quoted 10 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +9 -0
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clock-names
+  - clocks
+  - "#address-cells"
+  - "#size-cells"

These last two are also covered by spi-controller binding.

ok will remove

Quoted 11 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 59

Quoted 2 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +2 -0
+
+

Why two newlines instead of one?

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 65

Quoted 6 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +6 -0
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    soc: soc@0 {

Remove this node from example please.

If I remove this node I am getting below compilation error.

Error: Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.example.dts:46.1-2 syntax error
FATAL ERROR: Unable to parse input tree
scripts/Makefile.lib:311: recipe for target 'Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.example.dt.yaml' failed make[1]: *** [Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.example.dt.yaml] Error 1 Makefile:1264: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2

Quoted 13 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 77

Quoted 13 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +12 -0
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        qspi: spi@88df000 {
+            compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
+            reg = <0 0x88df000 0 0x600>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+            clock-names = "iface", "core";
+            clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+                <&gcc GCC_QSPI_CORE_CLK>;
Quoted 1 line

Weird tabbing here. Just use spaces and align it up.

Ok, I will align it better.

Quoted 10 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 85

Quoted 9 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +8 -0
+
+                flash@0 {
+                    compatible = "jedec,spi-nor";
+                    reg = <0>;
+                    spi-max-frequency = <25000000>;
+                    spi-tx-bus-width = <2>;
+                    spi-rx-bus-width = <2>;
+                };

Is this flash node necessary for the example?

It's not neccessary.

I just preserved the original example from .txt binding file.

Quoted 5 lines

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml line 88

Quoted 4 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +3 -0
+        };
+    };
+

Nitpick: Why newline here?

Will remove it.

Thankyou for reviewing the patch.

Regards,

Akash

Quoted 2 lines
Quoted 2 lines
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml new file +1 -0
+...
Signature · 1 line
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
#4 lore raw

PATCH 2/2 dt-bindings: spi: Add interconnect binding for QSPI

In reply to Akash Asthana

Add documentation for the interconnect and interconnect-names properties for QSPI.

---
 Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml +8 -0
index 977070a..b58bd73 100644
@@ -47,6 +47,14 @@ properties:
   "#size-cells":
     const: 0
 
+  interconnects:
+    maxItems: 2
+
+  interconnect-names:
+    items:
+      - const: qspi-config
+      - const: qspi-memory
+
 required:
   - compatible
   - reg
Signature · 1 line
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project