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Add SDHC interconnect bandwidth scaling

PATCH In review Pradeep P V K 3 participants 7 messages Jun 9, 2020 – Jun 16, 2020

Subsystems (4)

v4 of 6 In review Latest is v6 →

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#0 lore raw

v4 cover Add SDHC interconnect bandwidth scaling

Add interconnect bandwidths for SDHC driver using OPP framework that is required by SDHC driver based on the clock frequency and bus width of the card. Otherwise, the system clocks may run at minimum clock speed and thus affecting the performance.

This change is based on
[1] [Patch v8] Introduce OPP bandwidth bindings
(https://lkml.org/lkml/2020/5/12/493)

[2] [Patch v3 09/17] mmc: sdhci-msm: Fix error handling for dev_pm_opp_of_add_table()
(https://lkml.org/lkml/2020/5/5/491)

[3] [RFC v6 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings
(https://lkml.org/lkml/2020/3/23/409)

as there were no extra changes made on [3], retaining the Acked-by and Reviewed-by sign-off from [3].

Changes since V3:
- Modified the commit message.
- Retained Reviewed-by sign-off from sibi.

Changes since V2:
- Removed debug error prints on icc path ready check.

changes since V1:
- Added dev_pm_opp_find_icc_paths() to check for icc paths.

Pradeep P V K (2):
mmc: sdhci-msm: Add interconnect bandwidth scaling support
dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings

Pradeep P V K (2):
mmc: sdhci-msm: Add interconnect bandwidth scaling support
dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings

 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
 drivers/mmc/host/sdhci-msm.c                        |  6 ++++++
 2 files changed, 24 insertions(+)
Signature · 1 line
1.9.1
#1 lore raw

PATCH v4 1/2 mmc: sdhci-msm: Add interconnect bandwidth scaling support

Interconnect bandwidth scaling support is now added as a part of OPP. So, make sure interconnect driver is ready before handling interconnect scaling.

---

This change is based on
[1] [Patch v8] Introduce OPP bandwidth bindings
(https://lkml.org/lkml/2020/5/12/493)

[2] [Patch v3] mmc: sdhci-msm: Fix error handling for dev_pm_opp_of_add_table()
(https://lkml.org/lkml/2020/5/5/491)

 drivers/mmc/host/sdhci-msm.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/mmc/host/sdhci-msm.c +6 -0
index b277dd7..15c42b0 100644
@@ -14,6 +14,7 @@
 #include <linux/slab.h>
 #include <linux/iopoll.h>
 #include <linux/regulator/consumer.h>
+#include <linux/interconnect.h>
 
 #include "sdhci-pltfm.h"
 #include "cqhci.h"
@@ -2070,6 +2071,11 @@ static int sdhci_msm_probe(struct platform_device *pdev)
 	}
 	msm_host->bulk_clks[0].clk = clk;
 
+	 /* Check for optional interconnect paths */
+	ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL);
+	if (ret)
+		goto bus_clk_disable;
+
 	msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "core");
 	if (IS_ERR(msm_host->opp_table)) {
 		ret = PTR_ERR(msm_host->opp_table);
Signature · 1 line
1.9.1
Reviewed-by on v4 1/2
#2 lore raw

Re: [PATCH V4 1/2] mmc: sdhci-msm: Add interconnect bandwidth scaling support

Quoted 6 lines · Pradeep P V K

Interconnect bandwidth scaling support is now added as a part of OPP. So, make sure interconnect driver is ready before handling interconnect scaling.

Do you plan to send also patches that add the necessary DT entries? I'm particularly interested in SC7180.

#3 lore raw

Re: [PATCH V4 1/2] mmc: sdhci-msm: Add interconnect bandwidth scaling support

Hi Matthias,

Thanks!

Quoted 5 lines · Matthias Kaehlcke
Quoted 4 lines · Pradeep P V K

Interconnect bandwidth scaling support is now added as a part of OPP. So, make sure interconnect driver is ready before handling interconnect scaling.

Quoted 7 lines
Quoted 2 lines

Do you plan to send also patches that add the necessary DT entries? I'm particularly interested in SC7180.

Yes, we will send the DT entries soon.

#4 lore raw

Re: [PATCH V4 1/2] mmc: sdhci-msm: Add interconnect bandwidth scaling support

In reply to Pradeep P V K
Quoted 7 lines · Pradeep P V K

Interconnect bandwidth scaling support is now added as a part of OPP. So, make sure interconnect driver is ready before handling interconnect scaling.

Applied for next, thanks!

Kind regards
Uffe

Quoted 40 lines

---

This change is based on
[1] [Patch v8] Introduce OPP bandwidth bindings
(https://lkml.org/lkml/2020/5/12/493)

[2] [Patch v3] mmc: sdhci-msm: Fix error handling for dev_pm_opp_of_add_table()
(https://lkml.org/lkml/2020/5/5/491)

 drivers/mmc/host/sdhci-msm.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/mmc/host/sdhci-msm.c +6 -1
index b277dd7..15c42b0 100644
@@ -14,6 +14,7 @@
 #include <linux/slab.h>
 #include <linux/iopoll.h>
 #include <linux/regulator/consumer.h>
+#include <linux/interconnect.h>
 
 #include "sdhci-pltfm.h"
 #include "cqhci.h"
@@ -2070,6 +2071,11 @@ static int sdhci_msm_probe(struct platform_device *pdev)
        }
        msm_host->bulk_clks[0].clk = clk;
 
+        /* Check for optional interconnect paths */
+       ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL);
+       if (ret)
+               goto bus_clk_disable;
+
        msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "core");
        if (IS_ERR(msm_host->opp_table)) {
                ret = PTR_ERR(msm_host->opp_table);
--

1.9.1

#5 lore raw

PATCH v4 2/2 dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings

In reply to Pradeep P V K

Add interconnect bandwidth scaling supported strings for qcom-sdhci controller.

---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
Documentation/devicetree/bindings/mmc/sdhci-msm.txt +18 -0
index b8e1d2b..3b602fd 100644
@@ -54,6 +54,21 @@ Required properties:
 - qcom,dll-config: Chipset and Platform specific value. Use this field to
 	specify the DLL_CONFIG register value as per Hardware Programming Guide.
 
+Optional Properties:
+* Following bus parameters are required for interconnect bandwidth scaling:
+- interconnects: Pairs of phandles and interconnect provider specifier
+		 to denote the edge source and destination ports of
+		 the interconnect path.
+
+- interconnect-names: For sdhc, we have two main paths.
+		1. Data path : sdhc to ddr
+		2. Config path : cpu to sdhc
+		For Data interconnect path the name supposed to be
+		is "sdhc-ddr" and for config interconnect path it is
+		"cpu-sdhc".
+		Please refer to Documentation/devicetree/bindings/
+		interconnect/ for more details.
+
 Example:
 
 	sdhc_1: sdhci@f9824900 {
@@ -71,6 +86,9 @@ Example:
 
 		clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
 		clock-names = "core", "iface";
+		interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
+				<&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
+		interconnect-names = "sdhc-ddr","cpu-sdhc";
 
 		qcom,dll-config = <0x000f642c>;
 		qcom,ddr-config = <0x80040868>;
Signature · 1 line
1.9.1
#6 lore raw

Re: [PATCH V4 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings

Quoted 7 lines · Pradeep P V K

Add interconnect bandwidth scaling supported strings for qcom-sdhci controller.

Applied for next, thanks!

Kind regards
Uffe

Quoted 43 lines
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
Documentation/devicetree/bindings/mmc/sdhci-msm.txt +18 -1
index b8e1d2b..3b602fd 100644
@@ -54,6 +54,21 @@ Required properties:
 - qcom,dll-config: Chipset and Platform specific value. Use this field to
        specify the DLL_CONFIG register value as per Hardware Programming Guide.
 
+Optional Properties:
+* Following bus parameters are required for interconnect bandwidth scaling:
+- interconnects: Pairs of phandles and interconnect provider specifier
+                to denote the edge source and destination ports of
+                the interconnect path.
+
+- interconnect-names: For sdhc, we have two main paths.
+               1. Data path : sdhc to ddr
+               2. Config path : cpu to sdhc
+               For Data interconnect path the name supposed to be
+               is "sdhc-ddr" and for config interconnect path it is
+               "cpu-sdhc".
+               Please refer to Documentation/devicetree/bindings/
+               interconnect/ for more details.
+
 Example:
 
        sdhc_1: sdhci@f9824900 {
@@ -71,6 +86,9 @@ Example:
 
                clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
                clock-names = "core", "iface";
+               interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
+                               <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
+               interconnect-names = "sdhc-ddr","cpu-sdhc";
 
                qcom,dll-config = <0x000f642c>;
                qcom,ddr-config = <0x80040868>;
--

1.9.1