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regulator: rtmv20: Update DT binding document and property name parsing

PATCH In review cy_huang 2 participants 5 messages Sep 30, 2020

Subsystems (2)
Device tree bindings Voltage and current regulator framework
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cy_huang

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PATCH 1/1 regulator: rtmv20: Update DT binding document and property name parsing

From: ChiYuan Huang <[email protected]>

1. Add vendor suffix to all proprietary properties.
2. Fix typo.
3. Change lsw to normal property, not pattern property.
4. Due to item 1, modify source code for property parsing.

Signed-off-by ChiYuan Huang <[email protected]>
---
 .../regulator/richtek,rtmv20-regulator.yaml        | 53 +++++++++-------------
 drivers/regulator/rtmv20-regulator.c               | 36 ++++++++-------
 2 files changed, 42 insertions(+), 47 deletions(-)
Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml +22 -31
index 4cb4b68..a8ccb5c 100644
@@ -26,108 +26,99 @@ properties:
 
   wakeup-source: true
 
-  interrupts-extend:
+  interrupts:
     maxItems: 1
 
   enable-gpios:
     description: A connection of the 'enable' gpio line.
     maxItems: 1
 
-  ld-pulse-delay-us:
+  richtek,ld-pulse-delay-us:
     description: |
       load current pulse delay in microsecond after strobe pin pulse high.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 0
     maximum: 100000
     default: 0
 
-  ld-pulse-width-us:
+  richtek,ld-pulse-width-us:
     description: |
       Load current pulse width in microsecond after strobe pin pulse high.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 0
     maximum: 10000
     default: 1200
 
-  fsin1-delay-us:
+  richtek,fsin1-delay-us:
     description: |
       Fsin1 pulse high delay in microsecond after vsync signal pulse high.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 0
     maximum: 100000
     default: 23000
 
-  fsin1-width-us:
+  richtek,fsin1-width-us:
     description: |
       Fsin1 pulse high width in microsecond after vsync signal pulse high.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 40
     maximum: 10000
     default: 160
 
-  fsin2-delay-us:
+  richtek,fsin2-delay-us:
     description: |
       Fsin2 pulse high delay in microsecond after vsync signal pulse high.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 0
     maximum: 100000
     default: 23000
 
-  fsin2-width-us:
+  richtek,fsin2-width-us:
     description: |
       Fsin2 pulse high width in microsecond after vsync signal pulse high.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 40
     maximum: 10000
     default: 160
 
-  es-pulse-width-us:
+  richtek,es-pulse-width-us:
     description: Eye safety function pulse width limit in microsecond.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 0
     maximum: 10000
     default: 1200
 
-  es-ld-current-microamp:
+  richtek,es-ld-current-microamp:
     description: Eye safety function load current limit in microamp.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 0
     maximum: 6000000
     default: 3000000
 
-  lbp-level-microvolt:
+  richtek,lbp-level-microvolt:
     description: Low battery protection level in microvolt.
-    $ref: "/schemas/types.yaml#/definitions/uint32"
     minimum: 2400000
     maximum: 3700000
     default: 2700000
 
-  lbp-enable:
+  richtek,lbp-enable:
     description: Low battery protection function enable control.
     type: boolean
 
-  strobe-polarity-high:
+  richtek,strobe-polarity-high:
     description: Strobe pin active polarity control.
     type: boolean
 
-  vsync-polarity-high:
+  richtek,vsync-polarity-high:
     description: Vsync pin active polarity control.
     type: boolean
 
-  fsin-enable:
+  richtek,fsin-enable:
     description: Fsin function enable control.
     type: boolean
 
-  fsin-output:
+  richtek,fsin-output:
     description: Fsin function output control.
     type: boolean
 
-  es-enable:
+  richtek,es-enable:
     description: Eye safety function enable control.
     type: boolean
 
-patternProperties:
-  "lsw":
+  lsw:
+    description: load switch current regulator description.
     type: object
     $ref: "regulator.yaml#"
 

@@ -135,7 +126,7 @@ required:
   - compatible
   - reg
   - wakeup-source
-  - interrupts-extend
+  - interrupts
   - enable-gpios
   - lsw
 

@@ -152,11 +143,11 @@ examples:
         compatible = "richtek,rtmv20";
         reg = <0x34>;
         wakeup-source;
-        interrupts-extend = <&gpio26 2 IRQ_TYPE_LEVEL_LOW>;
+        interrupts-extended = <&gpio26 2 IRQ_TYPE_LEVEL_LOW>;
         enable-gpios = <&gpio26 3 0>;
 
-        strobe-polarity-high;
-        vsync-polarity-high;
+        richtek,strobe-polarity-high;
+        richtek,vsync-polarity-high;
 
         lsw {
                 regulator-name = "rtmv20,lsw";
drivers/regulator/rtmv20-regulator.c +20 -16
index 1075b10..05fd8e7c 100644
@@ -166,28 +166,32 @@ static int rtmv20_properties_init(struct rtmv20_priv *priv)
 		u32 addr;
 		u32 mask;
 	} props[] = {
-		{ "ld-pulse-delay-us", 0, 0, 100000, 100, RTMV20_REG_PULSEDELAY,
+		{ "richtek,ld-pulse-delay-us", 0, 0, 100000, 100, RTMV20_REG_PULSEDELAY,
 			RTMV20_DELAY_MASK },
-		{ "ld-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_PULSEWIDTH,
+		{ "richtek,ld-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_PULSEWIDTH,
 			RTMV20_WIDTH_MASK },
-		{ "fsin1-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN1CTRL1,
+		{ "richtek,fsin1-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN1CTRL1,
 			RTMV20_DELAY_MASK },
-		{ "fsin1-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN1CTRL3, RTMV20_WIDTH2_MASK },
-		{ "fsin2-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN2CTRL1,
+		{ "richtek,fsin1-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN1CTRL3,
+			RTMV20_WIDTH2_MASK },
+		{ "richtek,fsin2-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN2CTRL1,
 			RTMV20_DELAY_MASK },
-		{ "fsin2-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN2CTRL3, RTMV20_WIDTH2_MASK },
-		{ "es-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_ESPULSEWIDTH,
+		{ "richtek,fsin2-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN2CTRL3,
+			RTMV20_WIDTH2_MASK },
+		{ "richtek,es-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_ESPULSEWIDTH,
 			RTMV20_WIDTH_MASK },
-		{ "es-ld-current-microamp", 3000000, 0, 6000000, 30000, RTMV20_REG_ESLDCTRL1,
-			RTMV20_LDCURR_MASK },
-		{ "lbp-level-microvolt", 2700000, 2400000, 3700000, 100000, RTMV20_REG_LBP,
+		{ "richtek,es-ld-current-microamp", 3000000, 0, 6000000, 30000,
+			RTMV20_REG_ESLDCTRL1, RTMV20_LDCURR_MASK },
+		{ "richtek,lbp-level-microvolt", 2700000, 2400000, 3700000, 100000, RTMV20_REG_LBP,
 			RTMV20_LBPLVL_MASK },
-		{ "lbp-enable", 0, 0, 1, 1, RTMV20_REG_LBP, RTMV20_LBPEN_MASK },
-		{ "strobe-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2, RTMV20_STROBEPOL_MASK },
-		{ "vsync-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2, RTMV20_VSYNPOL_MASK },
-		{ "fsin-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINEN_MASK },
-		{ "fsin-output", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINOUT_MASK },
-		{ "es-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_ESEN_MASK },
+		{ "richtek,lbp-enable", 0, 0, 1, 1, RTMV20_REG_LBP, RTMV20_LBPEN_MASK },
+		{ "richtek,strobe-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2,
+			RTMV20_STROBEPOL_MASK },
+		{ "richtek,vsync-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2,
+			RTMV20_VSYNPOL_MASK },
+		{ "richtek,fsin-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINEN_MASK },
+		{ "richtek,fsin-output", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINOUT_MASK },
+		{ "richtek,es-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_ESEN_MASK },
 	};
 	int i, ret;
Signature · 1 line
2.7.4
maintainer
#1 lore raw
Quoted 3 lines · cy_huang

From: ChiYuan Huang <[email protected]>

1. Add vendor suffix to all proprietary properties.

You should need a driver update to match this one?

author
#2 lore raw

Mark Brown <[email protected]> 於 2020年9月30日 週三 下午7:06寫道：

Quoted 7 lines · cy_huang
Quoted 3 lines

From: ChiYuan Huang <[email protected]>

1. Add vendor suffix to all proprietary properties.

You should need a driver update to match this one?

Yes, sure, I describe in the change item 4.
Do you want me to divided the patch into binding document update and driver update?

maintainer
#3 lore raw
Quoted 2 lines · ChiYuan Huang

Do you want me to divided the patch into binding document update and driver update?

You should've done this but it's OK, I'll apply.

maintainer
#4 lore raw
In reply to cy_huang
Quoted 4 lines · cy_huang

1. Add vendor suffix to all proprietary properties.
2. Fix typo.
3. Change lsw to normal property, not pattern property.
4. Due to item 1, modify source code for property parsing.

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next

Thanks!

[1/1] regulator: rtmv20: Update DT binding document and property name parsing

      commit: 89a5f77e3f3a7fb8d6cf25668489d66069ebe4b7

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark