mips/mm: Add NUMA balancing support
Subsystems (3)
PATCH RESEND 1/3 mips/mm: Add NUMA balancing support
NUMA balancing is available on nearly all architectures, but MIPS lacks it for a long time. In theory, the current NUMA balancing framework only need a "PROTNONE" page table bit and some APIs to manipulate it. So, it is time for us to add MIPS's NUMA balancing support (Only for 64bit now because NUMA balancing depends on huge page implicitly).
Signed-off-by Huacai Chen <[email protected]>
--- arch/mips/Kconfig | 1 + arch/mips/include/asm/pgtable-64.h | 2 +- arch/mips/include/asm/pgtable-bits.h | 17 +++++++++++++++++ arch/mips/include/asm/pgtable.h | 18 +++++++++++++++--- 4 files changed, 34 insertions(+), 4 deletions(-)
arch/mips/Kconfig +1 -0
@@ -9,6 +9,7 @@ config MIPS select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_SUPPORTS_NUMA_BALANCING if 64BIT select ARCH_SUPPORTS_UPROBES select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
arch/mips/include/asm/pgtable-64.h +1 -1
@@ -266,7 +266,7 @@ static inline int pmd_present(pmd_t pmd) {#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT if (unlikely (pmd_val (pmd) & _PAGE_HUGE)) -return pmd_val (pmd) & _PAGE_PRESENT; +return pmd_val (pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE);#endif return pmd_val (pmd) != (unsigned long ) invalid_pte_table;
arch/mips/include/asm/pgtable-bits.h +17 -0
@@ -52,6 +52,9 @@ enum pgtable_bits { _PAGE_WRITE_SHIFT, _PAGE_ACCESSED_SHIFT, _PAGE_MODIFIED_SHIFT, +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) + _PAGE_PROTNONE_SHIFT, +#endif #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) _PAGE_SPECIAL_SHIFT, #endif
@@ -84,6 +87,9 @@ enum pgtable_bits { _PAGE_WRITE_SHIFT, _PAGE_ACCESSED_SHIFT, _PAGE_MODIFIED_SHIFT, +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) + _PAGE_PROTNONE_SHIFT, +#endif #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) _PAGE_SPECIAL_SHIFT, #endif
@@ -102,6 +108,9 @@ enum pgtable_bits { _PAGE_WRITE_SHIFT, _PAGE_ACCESSED_SHIFT, _PAGE_MODIFIED_SHIFT, +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) + _PAGE_PROTNONE_SHIFT, +#endif #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) _PAGE_SPECIAL_SHIFT, #endif
@@ -131,6 +140,9 @@ enum pgtable_bits {#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT ) _PAGE_HUGE_SHIFT,#endif +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING ) + _PAGE_PROTNONE_SHIFT, +#endif #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL ) _PAGE_SPECIAL_SHIFT,#endif
@@ -158,6 +170,11 @@ enum pgtable_bits {#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT )# define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)#endif +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING ) +# define _PAGE_PROTNONE (1 <<_PAGE_PROTNONE_SHIFT) +#else +# define _PAGE_PROTNONE 0 +#endif #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL )# define _PAGE_SPECIAL (1 << _PAGE_SPECIAL_SHIFT)#else
arch/mips/include/asm/pgtable.h +15 -3
@@ -25,7 +25,7 @@struct mm_struct ;struct vm_area_struct ; -#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \ +#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \ _page_cachable_default)#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \ _page_cachable_default)
@@ -188,7 +188,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt#else #define pte_none (pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) -#define pte_present (pte) (pte_val(pte) & _PAGE_PRESENT) +#define pte_present (pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE))#define pte_no_exec (pte) (pte_val(pte) & _PAGE_NO_EXEC)/*
@@ -707,7 +707,7 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)static inline pmd_t pmd_mkinvalid (pmd_t pmd) { -pmd_val (pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY); +pmd_val (pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_PROTNONE | _PAGE_DIRTY);return pmd; }
@@ -729,6 +729,18 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ +#ifdef CONFIG_NUMA_BALANCING +static inline long pte_protnone (pte_t pte) +{ +return (pte_val (pte) & _PAGE_PROTNONE); +} + +static inline long pmd_protnone (pmd_t pmd) +{ +return (pmd_val (pmd) & _PAGE_PROTNONE); +} +#endif /* CONFIG_NUMA_BALANCING */ +#ifdef _PAGE_HUGE#define pmd_leaf (pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)#define pud_leaf (pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
Signature · 1 line
2.7.0
PATCH RESEND 2/3 mips/mm: include _PAGE_SPECIAL in _PAGE_CHG_MASK
_PAGE_CHG_MASK contains the unchanged bits during pte_modify() and pmd_modify(). All other architectures include the _PAGE_SPECIAL bit in _PAGE_CHG_MASK, there is no reason that MIPS needn't.
Signed-off-by Huacai Chen <[email protected]>
--- arch/mips/include/asm/pgtable-bits.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/mips/include/asm/pgtable-bits.h +1 -1
@@ -301,7 +301,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED)#define __WRITEABLE (_PAGE_SILENT_WRITE | _PAGE_WRITE | _PAGE_MODIFIED) -#define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | \ +#define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_SPECIAL | \ _PAGE_SOFT_DIRTY | _PFN_MASK | _CACHE_MASK)#endif /* _ASM_PGTABLE_BITS_H */
Signature · 1 line
2.7.0
PATCH RESEND 3/3 MIPS: Loongson64: Enlarge cross-package node distance
In reply to Huacai ChenNUMA node distances affect the NUMA balancing behaviors. The cost of cross-package memory access is very high, and our benchmarks show that 200 is a more appropriate value than 100 (for cross-package numa node distance) on Loongson64 platforms, so enlarge it.
Signed-off-by Huacai Chen <[email protected]>
--- arch/mips/loongson64/numa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/mips/loongson64/numa.c +1 -1
@@ -79,7 +79,7 @@ static int __init compute_node_distance(int row, int col)else if (package_row == package_col)return 40 ;else -return 100 ; +return 200 ; }static void __init init_topology_matrix (void )
Signature · 1 line
2.7.0