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FAILED: patch "[PATCH] drm/amdgpu: correct the cu and rb info for sienna cichlid" failed to apply to 5.9-stable tree

PATCH [email protected] 1 participant 1 message Nov 3, 2020

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Stable branch DRM drivers Radeon and amdgpu DRM drivers
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The patch below does not apply to the 5.9-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 687e79c0feb4243b141b1e9a20adba3c0ec66f7f Mon Sep 17 00:00:00 2001
From: Likun Gao <[email protected]>
Date: Thu, 22 Oct 2020 00:50:07 +0800
Subject: [PATCH] drm/amdgpu: correct the cu and rb info for sienna cichlid

Skip disabled sa to correct the cu_info and active_rbs for sienna cichlid.

Signed-off-by Likun Gao <[email protected]>
Reviewed-by Hawking Zhang <[email protected]>
Signed-off-by Alex Deucher <[email protected]>
Cc [email protected] # 5.9.x
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +9 -0
index 1c98b248a7fb..56fdbe626d30 100644
@@ -4582,12 +4582,17 @@ static void gfx_v10_0_setup_rb(struct amdgpu_device *adev)
 	int i, j;
 	u32 data;
 	u32 active_rbs = 0;
+	u32 bitmap;
 	u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se /
 					adev->gfx.config.max_sh_per_se;
 
 	mutex_lock(&adev->grbm_idx_mutex);
 	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
 		for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
+			bitmap = i * adev->gfx.config.max_sh_per_se + j;
+			if ((adev->asic_type == CHIP_SIENNA_CICHLID) &&
+			    ((gfx_v10_3_get_disabled_sa(adev) >> bitmap) & 1))
+				continue;
 			gfx_v10_0_select_se_sh(adev, i, j, 0xffffffff);
 			data = gfx_v10_0_get_rb_active_bitmap(adev);
 			active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) *

@@ -8812,6 +8817,10 @@ static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev,
 	mutex_lock(&adev->grbm_idx_mutex);
 	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
 		for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
+			bitmap = i * adev->gfx.config.max_sh_per_se + j;
+			if ((adev->asic_type == CHIP_SIENNA_CICHLID) &&
+			    ((gfx_v10_3_get_disabled_sa(adev) >> bitmap) & 1))
+				continue;
 			mask = 1;
 			ao_bitmap = 0;
 			counter = 0;