soc: renesas: Add R-Car SYSC PM Domain Support

Populate the SYSC PM domains from DT, based on the presence of a device node for the System Controller. The actual power area hiearchy, and features of specific areas are obtained from tables in the C code.

The SYSCIER and SYSCIMR register values are derived from the power areas present, which will help to get rid of the hardcoded values in R-Car H1 and R-Car Gen2 platform code later.

Initialization is done from an early_initcall(), to make sure the PM Domains are initialized before secondary CPU bringup.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
v6:
- Drop unneeded genpd->dev_ops.active_wakeup callback,
- Move call to pm_genpd_init() after all local initialization,

v5:
- Mask SYSC interrupts sources before enabling them (doesn't matter much as they're disabled at the GIC level anyway),
- Re-add explicit "always-on" power area instead of aliasing the SoC's Clock Domain,
- Merge the two initialization phases again,

v4:
- Make sure not to clear reserved SYSCIMR bits that were set before,
- Make the always-on power area implicit and always present, and an alias of the existing SoC's Clock Domain. This makes the number of power areas a compile-time constant, and allows to drop PD_ALWAYS_ON and some checks.
- Split initialization in two phases,
- Document that ARM cores are controlled by PSCI on R-Car Gen3 (although the underlying CPG/APMU hardware is the same as on Gen2),
- Minor improvements (double evaluation, unused parameter, debug message consolidation),

v3:
- Drop check for CONFIG_PM_GENERIC_DOMAINS, which is now always enabled on R-Car SoCs,
- Create PM Domains from hierarchy in C data instead of DT,
- Initialize SYSCIER early, as SYSC needs the interrupt sources to be enabled to control power,
- Mask all SYSC interrupt sources for the CPU,
- Add support for an "always-on" domain,
- Use early_initcall() instead of core_initcall(),
- Do not power up CPU power areas during initialization, as this is handled later (directly or indirectly) by the SMP code,

v2:
- Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
- Add R-Car H3 (r8a7795) support,
- Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
- Add missing break statements in rcar_sysc_pwr_on_off(),
- Add missing calls to of_node_put() in error paths,
- Fix build if CONFIG_PM=n,
- Update compatible values,
- Update copyright.

---
 drivers/soc/renesas/rcar-sysc.c | 202
+++++++++++++++++++++++++++++++++++++++- drivers/soc/renesas/rcar-sysc.h | 
53 +++++++++++
 2 files changed, 254 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/renesas/rcar-sysc.h

(quoted diff) +0 -0

b/drivers/soc/renesas/rcar-sysc.c index 9ba5fd15c53bf9b9..95f2b59cbd76f777 100644

drivers/soc/renesas/rcar-sysc.c +1 -0

@@ -2,6 +2,7 @@
  * R-Car SYSC Power management support
  *
  * Copyright (C) 2014  Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
  *
  * This file is subject to the terms and conditions of the GNU General

Public * License. See the file "COPYING" in the main directory of this archive @@ -11,10 +12,15 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/mm.h>

drivers/soc/renesas/rcar-sysc.c +200 -1

+#include <linux/of_address.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/rcar-sysc.h>
 
+#include "rcar-sysc.h"
+
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */
 #define SYSCISR			0x04	/* Interrupt Status Register */

@@ -29,7 +35,8 @@
 /*
  * Power Control Register Offsets inside the register block for each domain
 * Note: The "CR" registers for ARM cores exist on H1 only
- *       Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
+ *	 Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
+ *	 Use PSCI on R-Car Gen3
  */
 #define PWRSR_OFFS		0x00	/* Power Status Register */
 #define PWROFFCR_OFFS		0x04	/* Power Shutoff Control Register */

@@ -48,6 +55,8 @@
 #define SYSCISR_RETRIES		1000
 #define SYSCISR_DELAY_US	1
 
+#define RCAR_PD_ALWAYS_ON	32	/* Always-on power area */
+
 static void __iomem *rcar_sysc_base;
 static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
 

@@ -162,3 +171,194 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
 
 	return rcar_sysc_base;
 }
+
+struct rcar_sysc_pd {
+	struct generic_pm_domain genpd;
+	struct rcar_sysc_ch ch;
+	unsigned int flags;
+	char name[0];
+};
+
+static inline struct rcar_sysc_pd *to_rcar_pd(struct generic_pm_domain *d)
+{
+	return container_of(d, struct rcar_sysc_pd, genpd);
+}
+
+static int rcar_sysc_pd_power_off(struct generic_pm_domain *genpd)
+{
+	struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (pd->flags & PD_NO_CR) {
+		pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	if (pd->flags & PD_BUSY) {
+		pr_debug("%s: %s busy\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	return rcar_sysc_power_down(&pd->ch);
+}
+
+static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd)
+{
+	struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (pd->flags & PD_NO_CR) {
+		pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+		return 0;
+	}
+
+	return rcar_sysc_power_up(&pd->ch);
+}
+
+static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd)
+{
+	struct generic_pm_domain *genpd = &pd->genpd;
+	const char *name = pd->genpd.name;
+	struct dev_power_governor *gov = &simple_qos_governor;
+
+	if (pd->flags & PD_CPU) {
+		/*
+		 * This domain contains a CPU core and therefore it should
+		 * only be turned off if the CPU is not in use.
+		 */
+		pr_debug("PM domain %s contains %s\n", name, "CPU");
+		pd->flags |= PD_BUSY;
+		gov = &pm_domain_always_on_gov;
+	} else if (pd->flags & PD_SCU) {
+		/*
+		 * This domain contains an SCU and cache-controller, and
+		 * therefore it should only be turned off if the CPU cores are
+		 * not in use.
+		 */
+		pr_debug("PM domain %s contains %s\n", name, "SCU");
+		pd->flags |= PD_BUSY;
+		gov = &pm_domain_always_on_gov;
+	} else if (pd->flags & PD_NO_CR) {
+		/*
+		 * This domain cannot be turned off.
+		 */
+		pd->flags |= PD_BUSY;
+		gov = &pm_domain_always_on_gov;
+	}
+
+	genpd->power_off = rcar_sysc_pd_power_off;
+	genpd->power_on = rcar_sysc_pd_power_on;
+
+	if (pd->flags & (PD_CPU | PD_NO_CR)) {
+		/* Skip CPUs (handled by SMP code) and areas without control */
+		pr_debug("%s: Not touching %s\n", __func__, genpd->name);
+		goto finalize;
+	}
+
+	if (!rcar_sysc_power_is_off(&pd->ch)) {
+		pr_debug("%s: %s is already powered\n", __func__, genpd->name);
+		goto finalize;
+	}
+
+	rcar_sysc_power_up(&pd->ch);
+
+finalize:
+	pm_genpd_init(genpd, gov, false);
+}
+
+static const struct of_device_id rcar_sysc_matches[] = {
+	{ /* sentinel */ }
+};
+
+struct rcar_pm_domains {
+	struct genpd_onecell_data onecell_data;
+	struct generic_pm_domain *domains[RCAR_PD_ALWAYS_ON + 1];
+};
+
+static int __init rcar_sysc_pd_init(void)
+{
+	const struct rcar_sysc_info *info;
+	const struct of_device_id *match;
+	struct rcar_pm_domains *domains;
+	struct device_node *np;
+	u32 syscier, syscimr;
+	void __iomem *base;
+	unsigned int i;
+	int error;
+
+	np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match);
+	if (!np)
+		return -ENODEV;
+
+	info = match->data;
+
+	base = of_iomap(np, 0);
+	if (!base) {
+		pr_warn("%s: Cannot map regs\n", np->full_name);
+		error = -ENOMEM;
+		goto out_put;
+	}
+
+	rcar_sysc_base = base;
+
+	domains = kzalloc(sizeof(*domains), GFP_KERNEL);
+	if (!domains) {
+		error = -ENOMEM;
+		goto out_put;
+	}
+
+	domains->onecell_data.domains = domains->domains;
+	domains->onecell_data.num_domains = ARRAY_SIZE(domains->domains);
+
+	for (i = 0, syscier = 0; i < info->num_areas; i++)
+		syscier |= BIT(info->areas[i].isr_bit);
+
+	/*
+	 * Mask all interrupt sources to prevent the CPU from receiving them.
+	 * Make sure not to clear reserved bits that were set before.
+	 */
+	syscimr = ioread32(base + SYSCIMR);
+	syscimr |= syscier;
+	pr_debug("%s: syscimr = 0x%08x\n", np->full_name, syscimr);
+	iowrite32(syscimr, base + SYSCIMR);
+
+	/*
+	 * SYSC needs all interrupt sources enabled to control power.
+	 */
+	pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
+	iowrite32(syscier, base + SYSCIER);
+
+	for (i = 0; i < info->num_areas; i++) {
+		const struct rcar_sysc_area *area = &info->areas[i];
+		struct rcar_sysc_pd *pd;
+
+		pd = kzalloc(sizeof(*pd) + strlen(area->name) + 1, GFP_KERNEL);
+		if (!pd) {
+			error = -ENOMEM;
+			goto out_put;
+		}
+
+		strcpy(pd->name, area->name);
+		pd->genpd.name = pd->name;
+		pd->ch.chan_offs = area->chan_offs;
+		pd->ch.chan_bit = area->chan_bit;
+		pd->ch.isr_bit = area->isr_bit;
+		pd->flags = area->flags;
+
+		rcar_sysc_pd_setup(pd);
+		if (area->parent >= 0)
+			pm_genpd_add_subdomain(domains->domains[area->parent],
+					       &pd->genpd);
+
+		domains->domains[area->isr_bit] = &pd->genpd;
+	}
+
+	of_genpd_add_provider_onecell(np, &domains->onecell_data);
+
+out_put:
+	of_node_put(np);
+	return error;
+}
+early_initcall(rcar_sysc_pd_init);

(quoted diff) +0 -0

b/drivers/soc/renesas/rcar-sysc.h new file mode 100644 index 0000000000000000..7bb48b4f7334f960

drivers/soc/renesas/rcar-sysc.h new file +26 -0

@@ -0,0 +1,53 @@
+/*
+ * Renesas R-Car System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __SOC_RENESAS_RCAR_SYSC_H__
+#define __SOC_RENESAS_RCAR_SYSC_H__
+
+#include <linux/types.h>
+
+
+/*
+ * Power Domain flags
+ */
+#define PD_CPU		BIT(0)	/* Area contains main CPU core */
+#define PD_SCU		BIT(1)	/* Area contains SCU and L2 cache */
+#define PD_NO_CR	BIT(2)	/* Area lacks PWR{ON,OFF}CR registers */
+
+#define PD_BUSY		BIT(3)	/* Busy, for internal use only */
+
+#define PD_CPU_CR	PD_CPU		  /* CPU area has CR (R-Car H1) */
+#define PD_CPU_NOCR	PD_CPU | PD_NO_CR /* CPU area lacks CR (R-Car Gen2/3)

*/ +#define PD_ALWAYS_ON PD_NO_CR /* Always-on area */

drivers/soc/renesas/rcar-sysc.h new file +26 -0

+
+
+/*
+ * Description of a Power Area
+ */
+
+struct rcar_sysc_area {
+	const char *name;
+	u16 chan_offs;		/* Offset of PWRSR register for this area */
+	u8 chan_bit;		/* Bit in PWR* (except for PWRUP in PWRSR) */
+	u8 isr_bit;		/* Bit in SYSCI*R */
+	int parent;		/* -1 if none */
+	unsigned int flags;	/* See PD_* */
+};
+
+
+/*
+ * SoC-specific Power Area Description
+ */
+
+struct rcar_sysc_info {
+	const struct rcar_sysc_area *areas;
+	unsigned int num_areas;
+};
+
+#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */

Populate the SYSC PM domains from DT, based on the presence of a device node for the System Controller. The actual power area hiearchy, and features of specific areas are obtained from tables in the C code.

The SYSCIER and SYSCIMR register values are derived from the power areas present, which will help to get rid of the hardcoded values in R-Car H1 and R-Car Gen2 platform code later.

Initialization is done from an early_initcall(), to make sure the PM Domains are initialized before secondary CPU bringup.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
v6:
- Drop unneeded genpd->dev_ops.active_wakeup callback,
- Move call to pm_genpd_init() after all local initialization,

v5:
- Mask SYSC interrupts sources before enabling them (doesn't matter much as they're disabled at the GIC level anyway),
- Re-add explicit "always-on" power area instead of aliasing the SoC's Clock Domain,
- Merge the two initialization phases again,

v4:
- Make sure not to clear reserved SYSCIMR bits that were set before,
- Make the always-on power area implicit and always present, and an alias of the existing SoC's Clock Domain. This makes the number of power areas a compile-time constant, and allows to drop PD_ALWAYS_ON and some checks.
- Split initialization in two phases,
- Document that ARM cores are controlled by PSCI on R-Car Gen3 (although the underlying CPG/APMU hardware is the same as on Gen2),
- Minor improvements (double evaluation, unused parameter, debug message consolidation),

v3:
- Drop check for CONFIG_PM_GENERIC_DOMAINS, which is now always enabled on R-Car SoCs,
- Create PM Domains from hierarchy in C data instead of DT,
- Initialize SYSCIER early, as SYSC needs the interrupt sources to be enabled to control power,
- Mask all SYSC interrupt sources for the CPU,
- Add support for an "always-on" domain,
- Use early_initcall() instead of core_initcall(),
- Do not power up CPU power areas during initialization, as this is handled later (directly or indirectly) by the SMP code,

v2:
- Add missing definitions for SYSC_PWR_CA15_CPU and SYSC_PWR_CA7_CPU,
- Add R-Car H3 (r8a7795) support,
- Drop tests for CONFIG_ARCH_SHMOBILE_LEGACY,
- Add missing break statements in rcar_sysc_pwr_on_off(),
- Add missing calls to of_node_put() in error paths,
- Fix build if CONFIG_PM=n,
- Update compatible values,
- Update copyright.

---
 drivers/soc/renesas/rcar-sysc.c | 202 +++++++++++++++++++++++++++++++++++++++-
 drivers/soc/renesas/rcar-sysc.h |  53 +++++++++++
 2 files changed, 254 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/renesas/rcar-sysc.h

drivers/soc/renesas/rcar-sysc.c +201 -1

index 9ba5fd15c53bf9b9..95f2b59cbd76f777 100644
@@ -2,6 +2,7 @@
  * R-Car SYSC Power management support
  *
  * Copyright (C) 2014  Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive

@@ -11,10 +12,15 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
+#include <linux/of_address.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/rcar-sysc.h>
 
+#include "rcar-sysc.h"
+
 /* SYSC Common */
 #define SYSCSR                 0x00    /* SYSC Status Register */
 #define SYSCISR                        0x04    /* Interrupt Status Register */

@@ -29,7 +35,8 @@
 /*
  * Power Control Register Offsets inside the register block for each domain
  * Note: The "CR" registers for ARM cores exist on H1 only
- *       Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
+ *      Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
+ *      Use PSCI on R-Car Gen3
  */
 #define PWRSR_OFFS             0x00    /* Power Status Register */
 #define PWROFFCR_OFFS          0x04    /* Power Shutoff Control Register */

@@ -48,6 +55,8 @@
 #define SYSCISR_RETRIES                1000
 #define SYSCISR_DELAY_US       1
 
+#define RCAR_PD_ALWAYS_ON      32      /* Always-on power area */
+
 static void __iomem *rcar_sysc_base;
 static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */
 

@@ -162,3 +171,194 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
 
        return rcar_sysc_base;
 }
+
+struct rcar_sysc_pd {
+       struct generic_pm_domain genpd;
+       struct rcar_sysc_ch ch;
+       unsigned int flags;
+       char name[0];
+};
+
+static inline struct rcar_sysc_pd *to_rcar_pd(struct generic_pm_domain *d)
+{
+       return container_of(d, struct rcar_sysc_pd, genpd);
+}
+
+static int rcar_sysc_pd_power_off(struct generic_pm_domain *genpd)
+{
+       struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+       pr_debug("%s: %s\n", __func__, genpd->name);
+
+       if (pd->flags & PD_NO_CR) {
+               pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+               return -EBUSY;
+       }
+
+       if (pd->flags & PD_BUSY) {
+               pr_debug("%s: %s busy\n", __func__, genpd->name);
+               return -EBUSY;
+       }
+
+       return rcar_sysc_power_down(&pd->ch);
+}
+
+static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd)
+{
+       struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+       pr_debug("%s: %s\n", __func__, genpd->name);
+
+       if (pd->flags & PD_NO_CR) {
+               pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+               return 0;
+       }
+
+       return rcar_sysc_power_up(&pd->ch);
+}
+
+static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd)
+{
+       struct generic_pm_domain *genpd = &pd->genpd;
+       const char *name = pd->genpd.name;
+       struct dev_power_governor *gov = &simple_qos_governor;
+
+       if (pd->flags & PD_CPU) {
+               /*
+                * This domain contains a CPU core and therefore it should
+                * only be turned off if the CPU is not in use.
+                */
+               pr_debug("PM domain %s contains %s\n", name, "CPU");
+               pd->flags |= PD_BUSY;
+               gov = &pm_domain_always_on_gov;
+       } else if (pd->flags & PD_SCU) {
+               /*
+                * This domain contains an SCU and cache-controller, and
+                * therefore it should only be turned off if the CPU cores are
+                * not in use.
+                */
+               pr_debug("PM domain %s contains %s\n", name, "SCU");
+               pd->flags |= PD_BUSY;
+               gov = &pm_domain_always_on_gov;
+       } else if (pd->flags & PD_NO_CR) {
+               /*
+                * This domain cannot be turned off.
+                */
+               pd->flags |= PD_BUSY;
+               gov = &pm_domain_always_on_gov;
+       }
+
+       genpd->power_off = rcar_sysc_pd_power_off;
+       genpd->power_on = rcar_sysc_pd_power_on;
+
+       if (pd->flags & (PD_CPU | PD_NO_CR)) {
+               /* Skip CPUs (handled by SMP code) and areas without control */
+               pr_debug("%s: Not touching %s\n", __func__, genpd->name);
+               goto finalize;
+       }
+
+       if (!rcar_sysc_power_is_off(&pd->ch)) {
+               pr_debug("%s: %s is already powered\n", __func__, genpd->name);
+               goto finalize;
+       }
+
+       rcar_sysc_power_up(&pd->ch);
+
+finalize:
+       pm_genpd_init(genpd, gov, false);
+}
+
+static const struct of_device_id rcar_sysc_matches[] = {
+       { /* sentinel */ }
+};
+
+struct rcar_pm_domains {
+       struct genpd_onecell_data onecell_data;
+       struct generic_pm_domain *domains[RCAR_PD_ALWAYS_ON + 1];
+};
+
+static int __init rcar_sysc_pd_init(void)
+{
+       const struct rcar_sysc_info *info;
+       const struct of_device_id *match;
+       struct rcar_pm_domains *domains;
+       struct device_node *np;
+       u32 syscier, syscimr;
+       void __iomem *base;
+       unsigned int i;
+       int error;
+
+       np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match);
+       if (!np)
+               return -ENODEV;
+
+       info = match->data;
+
+       base = of_iomap(np, 0);
+       if (!base) {
+               pr_warn("%s: Cannot map regs\n", np->full_name);
+               error = -ENOMEM;
+               goto out_put;
+       }
+
+       rcar_sysc_base = base;
+
+       domains = kzalloc(sizeof(*domains), GFP_KERNEL);
+       if (!domains) {
+               error = -ENOMEM;
+               goto out_put;
+       }
+
+       domains->onecell_data.domains = domains->domains;
+       domains->onecell_data.num_domains = ARRAY_SIZE(domains->domains);
+
+       for (i = 0, syscier = 0; i < info->num_areas; i++)
+               syscier |= BIT(info->areas[i].isr_bit);
+
+       /*
+        * Mask all interrupt sources to prevent the CPU from receiving them.
+        * Make sure not to clear reserved bits that were set before.
+        */
+       syscimr = ioread32(base + SYSCIMR);
+       syscimr |= syscier;
+       pr_debug("%s: syscimr = 0x%08x\n", np->full_name, syscimr);
+       iowrite32(syscimr, base + SYSCIMR);
+
+       /*
+        * SYSC needs all interrupt sources enabled to control power.
+        */
+       pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
+       iowrite32(syscier, base + SYSCIER);
+
+       for (i = 0; i < info->num_areas; i++) {
+               const struct rcar_sysc_area *area = &info->areas[i];
+               struct rcar_sysc_pd *pd;
+
+               pd = kzalloc(sizeof(*pd) + strlen(area->name) + 1, GFP_KERNEL);
+               if (!pd) {
+                       error = -ENOMEM;
+                       goto out_put;
+               }
+
+               strcpy(pd->name, area->name);
+               pd->genpd.name = pd->name;
+               pd->ch.chan_offs = area->chan_offs;
+               pd->ch.chan_bit = area->chan_bit;
+               pd->ch.isr_bit = area->isr_bit;
+               pd->flags = area->flags;
+
+               rcar_sysc_pd_setup(pd);
+               if (area->parent >= 0)
+                       pm_genpd_add_subdomain(domains->domains[area->parent],
+                                              &pd->genpd);
+
+               domains->domains[area->isr_bit] = &pd->genpd;
+       }
+
+       of_genpd_add_provider_onecell(np, &domains->onecell_data);
+
+out_put:
+       of_node_put(np);
+       return error;
+}
+early_initcall(rcar_sysc_pd_init);

drivers/soc/renesas/rcar-sysc.h new file +53 -1

new file mode 100644
index 0000000000000000..7bb48b4f7334f960
@@ -0,0 +1,53 @@
+/*
+ * Renesas R-Car System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __SOC_RENESAS_RCAR_SYSC_H__
+#define __SOC_RENESAS_RCAR_SYSC_H__
+
+#include <linux/types.h>
+
+
+/*
+ * Power Domain flags
+ */
+#define PD_CPU         BIT(0)  /* Area contains main CPU core */
+#define PD_SCU         BIT(1)  /* Area contains SCU and L2 cache */
+#define PD_NO_CR       BIT(2)  /* Area lacks PWR{ON,OFF}CR registers */
+
+#define PD_BUSY                BIT(3)  /* Busy, for internal use only */
+
+#define PD_CPU_CR      PD_CPU            /* CPU area has CR (R-Car H1) */
+#define PD_CPU_NOCR    PD_CPU | PD_NO_CR /* CPU area lacks CR (R-Car Gen2/3) */
+#define PD_ALWAYS_ON   PD_NO_CR          /* Always-on area */
+
+
+/*
+ * Description of a Power Area
+ */
+
+struct rcar_sysc_area {
+       const char *name;
+       u16 chan_offs;          /* Offset of PWRSR register for this area */
+       u8 chan_bit;            /* Bit in PWR* (except for PWRUP in PWRSR) */
+       u8 isr_bit;             /* Bit in SYSCI*R */
+       int parent;             /* -1 if none */
+       unsigned int flags;     /* See PD_* */
+};
+
+
+/*
+ * SoC-specific Power Area Description
+ */
+
+struct rcar_sysc_info {
+       const struct rcar_sysc_area *areas;
+       unsigned int num_areas;
+};
+
+#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
--

1.9.1

On R-Car H3, some power areas (e.g. A3VP) contain I/O devices, which are also part of the CPG/MSSR Clock Domain.
On all R-Car SoCs, devices in the "always-on" PM Domain are part of the Clock Domain served by the CPG/MSSR or CPG/MSTP driver.

Hook up the CPG/MSTP or CPG/MSSR Clock Domain attach/detach callbacks to enable power management using module clocks. Which callback to hook up depends on the presence of device nodes compatible with "renesas,cpg-mstp-clocks". This clears the path for a future migration from the CPG/MSTP to the CPG/MSSR driver on R-Car H1 and Gen2.

Signed-off-by Geert Uytterhoeven <[email protected]>

Reviewed-by Laurent Pinchart <[email protected]>

---
v6:
- Add Reviewed-by,
- Rebased,

v5:
- Revert v4 changes,
- Use either the cpg_mssr_*() or cpg_mstp_*() callbacks,
- Drop dependency on r8a7795, as this is used for the "always-on" PM Domain on R-Car H1 and Gen2, too,

v4:
- Remove the explicit dependency on the CPG/MSSR driver by forwarding the attach/detach callbacks to the parent PM Domain.
If deemed reusable, rcar_sysc_{at,de}tach_dev() can be moved to common genpd code later.

v3:
- Hook up the CPG/MSSR Clock Domain attach/detach callbacks instead of using our own copies,

v2:
- New.

---
 drivers/soc/renesas/rcar-sysc.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

drivers/soc/renesas/rcar-sysc.c +1 -0

index 4e760d63f2abd93f..0d49a25de740fbf8 100644
@@ -9,6 +9,7 @@
  * for more details.
  */
 
+#include <linux/clk/renesas.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>

drivers/soc/renesas/rcar-sysc.c +15 -1

 static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd)
 {
        struct generic_pm_domain *genpd = &pd->genpd;

@@ -248,6 +251,18 @@ static void __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd)
                gov = &pm_domain_always_on_gov;
        }
 
+       if (!(pd->flags & (PD_CPU | PD_SCU))) {
+               /* Enable Clock Domain for I/O devices */
+               genpd->flags = GENPD_FLAG_PM_CLK;
+               if (has_cpg_mstp) {
+                       genpd->attach_dev = cpg_mstp_attach_dev;
+                       genpd->detach_dev = cpg_mstp_detach_dev;
+               } else {
+                       genpd->attach_dev = cpg_mssr_attach_dev;
+                       genpd->detach_dev = cpg_mssr_detach_dev;
+               }
+       }
+
        genpd->power_off = rcar_sysc_pd_power_off;
        genpd->power_on = rcar_sysc_pd_power_on;
 

@@ -294,6 +309,9 @@ static int __init rcar_sysc_pd_init(void)
 
        info = match->data;
 
+       has_cpg_mstp = of_find_compatible_node(NULL, NULL,
+                                              "renesas,cpg-mstp-clocks");
+
        base = of_iomap(np, 0);
        if (!base) {
                pr_warn("%s: Cannot map regs\n", np->full_name);
--

1.9.1

drivers/soc/renesas/rcar-sysc.c static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd) · line 222

Quoted 6 lines

drivers/soc/renesas/rcar-sysc.c +2 -0

@@ -217,6 +218,8 @@ static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd)
        return rcar_sysc_power_up(&pd->ch);
 }
 
+static bool has_cpg_mstp;
+

That's seems lazy. :-)

Sure you can provide this as an input parameter to rcar_sysc_pd_setup() instead, no?

Hi Ulf,

Quoted 9 lines · Ulf Hansson

drivers/soc/renesas/rcar-sysc.c static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd) · line 222

Quoted 6 lines

drivers/soc/renesas/rcar-sysc.c +2 -0

@@ -217,6 +218,8 @@ static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd)
        return rcar_sysc_power_up(&pd->ch);
 }
 
+static bool has_cpg_mstp;
+

That's seems lazy. :-)

Quoted 2 lines

Sure you can provide this as an input parameter to rcar_sysc_pd_setup() instead, no?

This variable is intended to go away, once all R-Car SoCs have been converted to use the CPG/MSSR driver, and has_cpg_mstp will always be false. Then we can just remove those lines, instead of reworking the parameter passing.

Hi Simon, Magnus,

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

Changes compared to v5:
- Add Reviewed-by,
- Drop unneeded genpd->dev_ops.active_wakeup callback,
- Move call to pm_genpd_init() after all local initialization,

Changes compared to v4:
- Add Reviewed-by,
- Mask SYSC interrupts sources before enabling them (doesn't matter much as they're disabled at the GIC level anyway),
- Reference r8a7791_sysc_info directly for R-Car M2-N in rcar-sysc.c,
- Re-add explicit "always-on" power area instead of aliasing the SoC's Clock Domain,
- Add "always-on" power area on R-Car H1 and Gen2 SoCs,
- Merge the two initialization phases again,
- Use either the cpg_mssr_*() or cpg_mstp_*() callbacks for Clock Domain control,
- Drop dependency on r8a7795 of the Clock Domain handling, as this is used for the "always-on" PM Domain on R-Car H1 and Gen2, too,

Changes compared to v3:
- Add Reviewed-by,
- Make sure not to clear reserved SYSCIMR bits that were set before,
- Make the always-on power area implicit and always present, and an alias of the existing SoC's Clock Domain. This makes the number of power areas a compile-time constant, and allows to drop PD_ALWAYS_ON and some checks.
- Split initialization in two phases,
- Remove the explicit dependency on the CPG/MSSR driver by forwarding the attach/detach callbacks to the parent PM Domain.
If deemed reusable, rcar_sysc_{at,de}tach_dev() can be moved to common genpd code later.
- Document that ARM cores are controlled by PSCI on R-Car Gen3 (although the underlying CPG/APMU hardware is the same as on Gen2),
- Drop R8A7779_PD_SH, as it's not documented in the datasheet,
- Rename R8A779*_PD_SH to R8A779*_PD_SH_4A, and "sh" to "sh-4a" on

    R-Car Gen2,

- Remove always-on power area from the R-Car Gen3 table, as it's now implicitly handled by the rcar-sysc driver,
- Reformat tables,
- Minor improvements (double evaluation, unused parameter, debug message consolidation),
- Update MAINTAINERS.

Changes compared to v2:
- Add Reviewed-by,
- Rename driver from pm-rcar to rcar-sysc,
- Create PM Domains from hierarchy in C data instead of DT,
- Add support for an "always-on" domain, which is currently used on R-Car H3 only (support can be added for other R-Car SoCs, preferably after their migration to CPG/MSSR),
- Drop power area A3SH on R-Car H3, as it's no longer documented in the datasheet, and touching it seems to crash SYSC,
- Hook up the CPG/MSSR Clock Domain attach/detach callbacks instead of using our own copies,
- Initialize SYSCIER early, as SYSC needs the interrupt sources to be enabled to control power,
- Mask all SYSC interrupt sources for the CPU,
- Drop check for CONFIG_PM_GENERIC_DOMAINS, which is now always enabled on R-Car SoCs,
- Use early_initcall() instead of core_initcall(),
- Do not power up CPU power areas during initialization, as this is handled later (directly or indirectly) by the SMP code,
- Extract bindings into its own series, "[PATCH v3 0/7] PM / Domains:
Add DT bindings for the R-Car System Controller".

Changes compared to v1 (more details in the individual patches):
- Moved pm-rcar from arch/arm/mach-shmobile/ to drivers/soc/renesas/,
- Added R-Car H3 (r8a7795) support, incl. support for devices part of a SYSC PM domain and the CPG/MSSR clock domain,
- Use "renesas,<type>-sysc" instead of "renesas,sysc-<type>",
- Added fallback compatibility strings for R-Car Gen2 and Gen3.
- Changed one-line summary prefix to match current arm-soc practices,
- The L2 cache-controller patches have been extracted into a separate series ("[PATCH v3 0/7] ARM/arm64: dts: renesas: Add/complete L2 cache-controller nodes"),
- Minor fixes.

Dependencies:
- clk-renesas-for-v4.7 (which now includes "[PATCH v2 0/4] clk:
renesas: R-Car SYSC PM Domain Preparation"; pull request sent),
- renesas-devel-20160420-v4.6-rc4 (which already contains series "[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System Controller").

I won't be resending follow-up series "[PATCH v5 00/12] ARM/arm64: dts:
rcar: Add SYSC PM domains" for now, as it's unchanged, except for an ugly rebase due to dropping the commits to reference both DMA controllers on R-Car Gen2.

For your convenience, I've pushed this, incl. all dependencies, to the topic/rcar-sysc-pd-v6 branch of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Integration with renesas-drivers-2016-04-12-v4.6-rc3 is available in the topic/gen3-latest branch.

This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch, r8a7794/alt, and r8a7795/salvator-x.

Thanks!

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

Quoted 18 lines

Dependencies:
- clk-renesas-for-v4.7 (which now includes "[PATCH v2 0/4] clk:
renesas: R-Car SYSC PM Domain Preparation"; pull request sent),
- renesas-devel-20160420-v4.6-rc4 (which already contains series "[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System Controller").

I won't be resending follow-up series "[PATCH v5 00/12] ARM/arm64: dts:
rcar: Add SYSC PM domains" for now, as it's unchanged, except for an ugly rebase due to dropping the commits to reference both DMA controllers on R-Car Gen2.

For your convenience, I've pushed this, incl. all dependencies, to the topic/rcar-sysc-pd-v6 branch of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Integration with renesas-drivers-2016-04-12-v4.6-rc3 is available in the topic/gen3-latest branch.

Quoted 4 lines

This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch, r8a7794/alt, and r8a7795/salvator-x.

Thanks!

Thanks. I am not planning to queue these up at this point. Let me know if that is not what you expected.

Hi Simon,

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

[...]

Quoted 18 lines

Quoted 18 lines

Dependencies:
- clk-renesas-for-v4.7 (which now includes "[PATCH v2 0/4] clk:
renesas: R-Car SYSC PM Domain Preparation"; pull request sent),
- renesas-devel-20160420-v4.6-rc4 (which already contains series "[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System Controller").

I won't be resending follow-up series "[PATCH v5 00/12] ARM/arm64: dts:
rcar: Add SYSC PM domains" for now, as it's unchanged, except for an ugly rebase due to dropping the commits to reference both DMA controllers on R-Car Gen2.

For your convenience, I've pushed this, incl. all dependencies, to the topic/rcar-sysc-pd-v6 branch of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Integration with renesas-drivers-2016-04-12-v4.6-rc3 is available in the topic/gen3-latest branch.

Quoted 7 lines

Quoted 4 lines

This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch, r8a7794/alt, and r8a7795/salvator-x.

Thanks!

Thanks. I am not planning to queue these up at this point. Let me know if that is not what you expected.

As the clock maintainers has merged the preparatory clock work, and pushed it out into clk-next, you can now:
1. Pull the preparatory clock work in your tree, i.e. pull from:

git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
tags/clk-renesas-for-v4.7-tag2

2. Apply this series.

After that,
3. I will rebase and update "[PATCH v5 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains" to match your current dt-for-v4.7 and arm64-dt-for-v4.7 (for dmas/dma-names changes and recently added mmc and sdhi nodes), and send it out,
4. You can apply it to a branch containing all of the above as prerequisites.

Is that OK for you?

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Quoted 41 lines · Geert Uytterhoeven

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

[...]

Quoted 22 lines

Quoted 22 lines

Dependencies:
- clk-renesas-for-v4.7 (which now includes "[PATCH v2 0/4] clk:
renesas: R-Car SYSC PM Domain Preparation"; pull request sent),

- renesas-devel-20160420-v4.6-rc4 (which already contains series

"[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System Controller").

I won't be resending follow-up series "[PATCH v5 00/12] ARM/arm64: dts:
rcar: Add SYSC PM domains" for now, as it's unchanged, except for an ugly rebase due to dropping the commits to reference both DMA controllers on R-Car Gen2.

For your convenience, I've pushed this, incl. all dependencies, to the topic/rcar-sysc-pd-v6 branch of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
.
Integration with renesas-drivers-2016-04-12-v4.6-rc3 is available in the
topic/gen3-latest branch.

Quoted 7 lines

Quoted 4 lines

This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch, r8a7794/alt, and r8a7795/salvator-x.

Thanks!

Thanks. I am not planning to queue these up at this point. Let me know if that is not what you expected.

Quoted 8 lines

As the clock maintainers has merged the preparatory clock work, and pushed

it out into clk-next, you can now:
1. Pull the preparatory clock work in your tree, i.e. pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-driver
s.git

tags/clk-renesas-for-v4.7-tag2

To my mind I need some kind of assurance from the clk maintainers that the patches are stable there - in particular that the commit ids won't change. And that both they and the ARM-SoC maintainers are happy with me pulling it into my tree for this purpose.

I do wonder, as we are almost at the closing point for queuing up changes for v4.7 if, assuming the above patches are scheduled for inclusion in v4.7-rc1, it might not be better for me to queue up this series for v4.8.

I could do that sooner rather than later in the devel branch of the renesas tree if you like.

Quoted 14 lines

2. Apply this series.

After that,

3. I will rebase and update "[PATCH v5 00/12] ARM/arm64: dts: rcar: Add SYSC>
PM domains" to match your current dt-for-v4.7 and arm64-dt-for-v4.7 (for
dmas/dma-names changes and recently added mmc and sdhi nodes), and send it out,

4. You can apply it to a branch containing all of the above as prerequisites.>
Is that OK for you?

Quoted 41 lines · Geert Uytterhoeven

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

[...]

Quoted 18 lines

Quoted 18 lines

Dependencies:
- clk-renesas-for-v4.7 (which now includes "[PATCH v2 0/4] clk:
renesas: R-Car SYSC PM Domain Preparation"; pull request sent),
- renesas-devel-20160420-v4.6-rc4 (which already contains series "[PATCH v5 0/7] PM / Domains: Add DT bindings for the R-Car System Controller").

I won't be resending follow-up series "[PATCH v5 00/12] ARM/arm64: dts:
rcar: Add SYSC PM domains" for now, as it's unchanged, except for an ugly rebase due to dropping the commits to reference both DMA controllers on R-Car Gen2.

For your convenience, I've pushed this, incl. all dependencies, to the topic/rcar-sysc-pd-v6 branch of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Integration with renesas-drivers-2016-04-12-v4.6-rc3 is available in the topic/gen3-latest branch.

Quoted 7 lines

Quoted 4 lines

This has been tested on r8a7779/marzen, r8a7790/lager, r8a7791/koelsch, r8a7794/alt, and r8a7795/salvator-x.

Thanks!

Thanks. I am not planning to queue these up at this point. Let me know if that is not what you expected.

As the clock maintainers has merged the preparatory clock work, and pushed it out into clk-next, you can now:
1. Pull the preparatory clock work in your tree, i.e. pull from:

Quoted 2 lines

git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
tags/clk-renesas-for-v4.7-tag2

To my mind I need some kind of assurance from the clk maintainers that the patches are stable there - in particular that the commit ids won't change.

And that both they and the ARM-SoC maintainers are happy with me pulling it into my tree for this purpose.

I do wonder, as we are almost at the closing point for queuing up changes for v4.7 if, assuming the above patches are scheduled for inclusion in v4.7-rc1, it might not be better for me to queue up this series for v4.8.

I could do that sooner rather than later in the devel branch of the renesas tree if you like.

Hi Simon,

Quoted 9 lines · On Friday 22 Apr 2016 10:33:11 Simon Horman wrote:

Quoted 8 lines · Geert Uytterhoeven

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

Quoted 3 lines

I do wonder, as we are almost at the closing point for queuing up changes for v4.7 if, assuming the above patches are scheduled for inclusion in v4.7-rc1, it might not be better for me to queue up this series for v4.8.

Then that would delay a bunch of multimedia patch by one more kernel cycle, which I was hoping to avoid.

Hi Simon,

Quoted 9 lines · Simon Horman

Quoted 8 lines · Geert Uytterhoeven

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

Quoted 2 lines

To my mind I need some kind of assurance from the clk maintainers that the patches are stable there - in particular that the commit ids won't change.

As the clock maintainer pulled the same tag instead of applying emailed patches, the commit IDs won't change, even if he has to rework the clk-next branch and repull.

Quoted 2 lines

And that both they and the ARM-SoC maintainers are happy with me pulling it into my tree for this purpose.

I also mentioned that in the pull request. Pulling in a stable branch is standard procedure: the code fails to compile if you don't merge tags/clk-renesas-for-v4.7-tag2 first.

Quoted 6 lines

I do wonder, as we are almost at the closing point for queuing up changes for v4.7 if, assuming the above patches are scheduled for inclusion in v4.7-rc1, it might not be better for me to queue up this series for v4.8.

I could do that sooner rather than later in the devel branch of the renesas tree if you like.

v4.7-rc1 is still more than one month in the future.

As Laurent said, that would delay multimedia work by one more kernel cycle, as R-Car SYSC PM Domains already missed v4.6.
In addition, it would mean continued rebasing/updating of "[PATCH v5 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains" in renesas-drivers, as it touches all R-Car DTSes all over the place.

Thanks for reconsidering!

Quoted 10 lines · Laurent Pinchart

Quoted 9 lines · On Friday 22 Apr 2016 10:33:11 Simon Horman wrote:

Quoted 8 lines · Geert Uytterhoeven

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

[...]

Quoted 7 lines

Quoted 4 lines

I do wonder, as we are almost at the closing point for queuing up changes for v4.7 if, assuming the above patches are scheduled for inclusion in v4.7-rc1, it might not be better for me to queue up this series for v4.8.

Then that would delay a bunch of multimedia patch by one more kernel cycle, which I was hoping to avoid.

Quoted 10 lines · Geert Uytterhoeven

Quoted 9 lines · Simon Horman

Quoted 8 lines · Geert Uytterhoeven

Quoted 7 lines · Simon Horman

Quoted 6 lines · Geert Uytterhoeven

This patch series introduces a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.

This is a dependency for the enablement of DU and VSP on R-Car H3, as the VSPs are located in a PM Domain.

[...]

Quoted 31 lines

Quoted 3 lines

To my mind I need some kind of assurance from the clk maintainers that the patches are stable there - in particular that the commit ids won't change.

As the clock maintainer pulled the same tag instead of applying emailed patches, the commit IDs won't change, even if he has to rework the clk-next branch and repull.

Quoted 2 lines

And that both they and the ARM-SoC maintainers are happy with me pulling it into my tree for this purpose.

I also mentioned that in the pull request. Pulling in a stable branch is standard procedure: the code fails to compile if you don't merge tags/clk-renesas-for-v4.7-tag2 first.

Quoted 7 lines

I do wonder, as we are almost at the closing point for queuing up changes for v4.7 if, assuming the above patches are scheduled for inclusion in v4.7-rc1, it might not be better for me to queue up this series for v4.8.

I could do that sooner rather than later in the devel branch of the renesas tree if you like.

v4.7-rc1 is still more than one month in the future.

As Laurent said, that would delay multimedia work by one more kernel cycle, as R-Car SYSC PM Domains already missed v4.6.
In addition, it would mean continued rebasing/updating of "[PATCH v5 00/12] ARM/arm64: dts: rcar: Add SYSC PM domains" in renesas-drivers, as it touches all R-Car DTSes all over the place.

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Thanks for reconsidering!

Thanks for your feedback. I now have a better understanding of the situation both in regards to the state of the branch and the dependencies on it.

I have reconsidered and queued up this series for v4.7. It is now present in the next branch of the renesas tree.