arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
Subsystems (4)
PATCH v2 1/2 arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC since the gold cores only support frequencies upto 2.1 GHz.
---
V2:
* Updated the lite ddr/l3 cpufreq map to have better power numbers with similar perf.
arch/arm64/boot/dts/qcom/sc7180-lite.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
arch/arm64/boot/dts/qcom/sc7180-lite.dtsi new file +18 -0
@@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * SC7180 lite device tree source + * + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +&cpu6_opp10 { + opp-peak-kBps = <7216000 22425600>; +}; + +&cpu6_opp11 { + opp-peak-kBps = <7216000 22425600>; +}; + +&cpu6_opp12 { + opp-peak-kBps = <8532000 23347200>; +};
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v2 2/2 arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support frequencies upto 2.5 GHz.
--- arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm64/boot/dts/qcom/sc7180.dtsi +5 -0
@@ -527,6 +527,11 @@ opp-hz = /bits/ 64 <2400000000>; opp-peak-kBps = <8532000 23347200>; }; + + cpu6_opp16: opp-2553600000 { + opp-hz = /bits/ 64 <2553600000>; + opp-peak-kBps = <8532000 23347200>; + }; }; memory@80000000 {
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v2 2/2] arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
Hi,
Quoted 8 lines · Sibi Sankar
Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support frequencies upto 2.5 GHz.
Signed-off-by Sibi Sankar <[email protected]>--- arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
Hi,
Quoted 5 lines · Sibi Sankar
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC since the gold cores only support frequencies upto 2.1 GHz.
Signed-off-by Sibi Sankar <[email protected]>
Quoted 8 lines
---
V2:
* Updated the lite ddr/l3 cpufreq map to have better power numbers with similar perf.arch/arm64/boot/dts/qcom/sc7180-lite.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
I certainly don't love the way that this works but it does match the way folks have agreed that DDR bandwidth votes should work. Long term it feels like we should re-think how this is working, but it seems fine for now.
This series was applied to qcom/linux.git (refs/heads/for-next):
Hello:
This series was applied to qcom/linux.git (refs/heads/for-next):
Quoted 11 lines · On Tue, 24 Nov 2020 11:51:15 +0530 you wrote:
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC since the gold cores only support frequencies upto 2.1 GHz.
Signed-off-by Sibi Sankar <[email protected]>---
V2:
* Updated the lite ddr/l3 cpufreq map to have better power numbers with similar perf.[...]
Here is the summary with links:
- [v2,1/2] arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
https://git.kernel.org/qcom/c/8fd01e01fd6f - [v2,2/2] arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant https://git.kernel.org/qcom/c/3c9c31c2523e
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html