Add MIPI rx DPI support

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Quoted 8 lines · Xin Ji

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed:

	[[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long
	[0, 20] is too long
	[1, 84] is too long
	[2, 100] is too long
	[3, 116] is too long
	[4, 41] is too long
	[5, 123] is too long
	[6, 119] is too long
	[7, 91] is too long
	[8, 127] is too long
	[12, 32] is too long
	[13, 96] is too long
	[16, 96] is too long
	[18, 64] is too long
	[19, 96] is too long
	[20, 20] is too long
	[21, 84] is too long
	[22, 100] is too long
	[23, 116] is too long
	[24, 41] is too long
	[25, 123] is too long
	[26, 119] is too long
	[27, 91] is too long
	[28, 127] is too long
	[32, 32] is too long
	[33, 96] is too long
	[36, 96] is too long
	[38, 64] is too long
	[39, 96] is too long
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', '^chipspark,.*', '^chrontel,.*', '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', '^emlid,.*', '^emmicro,.*', '^empire-electronix,.*', '^emtrion,.*', '^endless,.*', '^ene,.*', '^energymicro,.*', '^engicam,.*', '^epcos,.*', '^epfl,.*', '^epson,.*', '^esp,.*', '^est,.*', '^ettus,.*', '^eukrea,.*', '^everest,.*', '^everspin,.*', '^evervision,.*', '^exar,.*', '^excito,.*', '^ezchip,.*', '^facebook,.*', '^fairphone,.*', '^faraday,.*', '^fastrax,.*', '^fcs,.*', '^feixin,.*', '^feiyang,.*', '^fii,.*', '^firefly,.*', '^focaltech,.*', '^frida,.*', '^friendlyarm,.*', '^fsl,.*', '^fujitsu,.*', '^gardena,.*', '^gateworks,.*', '^gcw,.*', '^ge,.*', '^geekbuying,.*', '^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', '^inet-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,.*', '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd,.*', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rervision,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste,.*', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^te
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml

See https://patchwork.ozlabs.org/patch/1420616

This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:

pip3 install dtschema --upgrade

Please check and re-submit.

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +0 -0

index 60585a4..34a7faf 100644

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +12 -0

+
   ports:
     type: object
 

@@ -72,6 +80,17 @@ examples:
             reg = <0x58>;
             enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
             reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
+            anx,swing-setting = <0x00 0x14>, <0x01 0x54>,
+                <0x02 0x64>, <0x03 0x74>, <0x04 0x29>,
+                <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>,
+                <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>,
+                <0x10 0x60>, <0x12 0x40>, <0x13 0x60>,
+                <0x14 0x14>, <0x15 0x54>, <0x16 0x64>,
+                <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>,
+                <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>,
+                <0x20 0x20>, <0x21 0x60>, <0x24 0x60>,
+                <0x26 0x40>, <0x27 0x60>;
+            anx,mipi-dpi-in = <0>;
 
             ports {
                 #address-cells = <1>;

Hi Xin Ji,

Thank you for the patch.

Quoted 16 lines · Xin Ji

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +0 -0

index 60585a4..34a7faf 100644
@@ -34,6 +34,14 @@ properties:
     description: used for reset chip control, RESET_N pin B7.
     maxItems: 1
 

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml properties: · line 39

Quoted 3 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +3 -0

+  anx,swing-setting:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description: an array of swing register setting for DP tx PHY

Register values in DT are frowned upon.

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml properties: · line 43

Quoted 4 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +3 -0

+  anx,mipi-dpi-in:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: indicate the MIPI rx signal type is DPI or DSI

This sounds similar to the bus-type property defined in Documentation/devicetree/bindings/media/video-interfaces.txt (which is getting converted to YAML, Rob has posted a patch series, I expect it to land in v5.13). I think it would make sense to extend bus-type to support DSI, and use that property.

Quoted 23 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +12 -0

+
   ports:
     type: object
 

@@ -72,6 +80,17 @@ examples:
             reg = <0x58>;
             enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
             reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
+            anx,swing-setting = <0x00 0x14>, <0x01 0x54>,
+                <0x02 0x64>, <0x03 0x74>, <0x04 0x29>,
+                <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>,
+                <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>,
+                <0x10 0x60>, <0x12 0x40>, <0x13 0x60>,
+                <0x14 0x14>, <0x15 0x54>, <0x16 0x64>,
+                <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>,
+                <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>,
+                <0x20 0x20>, <0x21 0x60>, <0x24 0x60>,
+                <0x26 0x40>, <0x27 0x60>;
+            anx,mipi-dpi-in = <0>;
 
             ports {
                 #address-cells = <1>;

Signature · 3 lines

Regards,

Laurent Pinchart

Quoted 17 lines · Laurent Pinchart

Quoted 16 lines · Xin Ji

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +0 -0

index 60585a4..34a7faf 100644
@@ -34,6 +34,14 @@ properties:
     description: used for reset chip control, RESET_N pin B7.
     maxItems: 1
 

Quoted 5 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml properties: · line 39

Quoted 3 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +3 -0

+  anx,swing-setting:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description: an array of swing register setting for DP tx PHY

Register values in DT are frowned upon.

Hi Laurent Pinchart, as the different vendor has the different PCB layout, it effects DP CTS test result, so they may need config DP tx Swing register to adjust signal swing(the default swing setting is not satisfy for every platform). If we move the config code to driver file, it must define swing register setting for each vendor, so the DT is the best way. Do you have any idea for it if you don't agree to add in DT.

Quoted 9 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml properties: · line 43

Quoted 3 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +3 -0

+  anx,mipi-dpi-in:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: indicate the MIPI rx signal type is DPI or DSI

This sounds similar to the bus-type property defined in Documentation/devicetree/bindings/media/video-interfaces.txt (which is getting converted to YAML, Rob has posted a patch series, I expect it to land in v5.13). I think it would make sense to extend bus-type to support DSI, and use that property.

Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. Do you mean I just remove this flag define and call a special function to read the port's type(DSI or DPI)?

Quoted 22 lines

Quoted 22 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +12 -0

+
   ports:
     type: object
 

@@ -72,6 +80,17 @@ examples:
             reg = <0x58>;
             enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
             reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
+            anx,swing-setting = <0x00 0x14>, <0x01 0x54>,
+                <0x02 0x64>, <0x03 0x74>, <0x04 0x29>,
+                <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>,
+                <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>,
+                <0x10 0x60>, <0x12 0x40>, <0x13 0x60>,
+                <0x14 0x14>, <0x15 0x54>, <0x16 0x64>,
+                <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>,
+                <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>,
+                <0x20 0x20>, <0x21 0x60>, <0x24 0x60>,
+                <0x26 0x40>, <0x27 0x60>;
+            anx,mipi-dpi-in = <0>;
 
             ports {
                 #address-cells = <1>;

Hi Xin Ji,

Quoted 24 lines · Xin Ji

Quoted 17 lines · Laurent Pinchart

Quoted 16 lines · Xin Ji

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing

Signed-off-by Xin Ji <[email protected]>

---
 .../bindings/display/bridge/analogix,anx7625.yaml     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +0 -0

index 60585a4..34a7faf 100644
@@ -34,6 +34,14 @@ properties:
     description: used for reset chip control, RESET_N pin B7.
     maxItems: 1
 

Quoted 5 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml properties: · line 39

Quoted 3 lines

Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +3 -0

+  anx,swing-setting:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description: an array of swing register setting for DP tx PHY

Register values in DT are frowned upon.

Quoted 6 lines

Hi Laurent Pinchart, as the different vendor has the different PCB layout, it effects DP CTS test result, so they may need config DP tx Swing register to adjust signal swing(the default swing setting is not satisfy for every platform). If we move the config code to driver file, it must define swing register setting for each vendor, so the DT is the best way. Do you have any idea for it if you don't agree to add in DT.

If it depends on the PCB layout then it should indeed be in DT. What I wonder is if there would be a better way to specify the data than register values. The ANX7625 datasheet isn't public, so there's effectively no way for someone to write a device tree compliant with this binding only with the information contained here. Reviewing the bindings is equally difficult. It would be best if this property instead contained information that could be documented clearly.

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Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml properties: · line 43

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Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +3 -0

+  anx,mipi-dpi-in:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: indicate the MIPI rx signal type is DPI or DSI

This sounds similar to the bus-type property defined in Documentation/devicetree/bindings/media/video-interfaces.txt (which is getting converted to YAML, Rob has posted a patch series, I expect it to land in v5.13). I think it would make sense to extend bus-type to support DSI, and use that property.

Quoted 3 lines

Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. Do you mean I just remove this flag define and call a special function to read the port's type(DSI or DPI)?

video-interfaces.yaml has initially been written for cameras, so it doesn't support DSI. I think it would make sense to extend the bus-type property with a DSI type, and use it here instead of a vendor-specific property.

Alternatively, I'm wondering if this isn't information we could query at runtime. DRM bridges and panels have a type, so we could look at the next bridge or panel to find the type of the connected device instead of specifying it in DT.

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Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +12 -0

+
   ports:
     type: object
 

@@ -72,6 +80,17 @@ examples:
             reg = <0x58>;
             enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
             reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
+            anx,swing-setting = <0x00 0x14>, <0x01 0x54>,
+                <0x02 0x64>, <0x03 0x74>, <0x04 0x29>,
+                <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>,
+                <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>,
+                <0x10 0x60>, <0x12 0x40>, <0x13 0x60>,
+                <0x14 0x14>, <0x15 0x54>, <0x16 0x64>,
+                <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>,
+                <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>,
+                <0x20 0x20>, <0x21 0x60>, <0x24 0x60>,
+                <0x26 0x40>, <0x27 0x60>;
+            anx,mipi-dpi-in = <0>;
 
             ports {
                 #address-cells = <1>;

Signature · 3 lines

Regards,

Laurent Pinchart

drivers/gpu/drm/bridge/analogix/anx7625.c +105 -1

+	}
+
+	cmd = ((len - 1) << 4) | 0x09;
+
+	/* Set command and length */
+	ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				AP_AUX_COMMAND, cmd);
+
+	/* Set aux access address */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				 AP_AUX_ADDR_7_0, addrl);
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				 AP_AUX_ADDR_15_8, addrm);
+	ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+				 AP_AUX_ADDR_19_16, addrh);
+
+	/* Enable aux access */
+	ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
+				AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
+
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
+		return -EIO;
+	}
+
+	usleep_range(2000, 2100);
+
+	ret = wait_aux_op_finish(ctx);
+	if (ret) {
+		DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
+		return ret;
+	}
+
+	ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
+				     AP_AUX_BUFF_START, len, buf);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "read dpcd register failed\n");
+		return -EIO;
 	}
 
-	return val;
+	return 0;
 }
 
 static int anx7625_video_mute_control(struct anx7625_data *ctx,

@@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx)
 	return ret;
 }
 
+static int anx7625_api_dpi_config(struct anx7625_data *ctx)
+{
+	struct device *dev = &ctx->client->dev;
+	u16 freq = ctx->dt.pixelclock.min / 1000;
+	int ret;
+
+	/* configure pixel clock */
+	ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				PIXEL_CLOCK_L, freq & 0xFF);
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				 PIXEL_CLOCK_H, (freq >> 8));
+
+	/* set DPI mode */
+	/* set to DPI PLL module sel */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+				 MIPI_DIGITAL_PLL_9, 0x20);
+	/* power down MIPI */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+				 MIPI_LANE_CTRL_10, 0x08);
+	/* enable DPI mode */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+				 MIPI_DIGITAL_PLL_18, 0x1C);
+	/* set first edge */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
+				 VIDEO_CONTROL_0, 0x06);
+	if (ret < 0)
+		DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n");
+
+	return ret;
+}
+
+static int anx7625_dpi_config(struct anx7625_data *ctx)
+{
+	struct device *dev = &ctx->client->dev;
+	int ret;
+
+	DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n");
+
+	/* DSC disable */
+	ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+				R_DSC_CTRL_0, ~DSC_EN);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n");
+		return ret;
+	}
+
+	ret = anx7625_config_bit_matrix(ctx);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "config bit matrix failed.\n");
+		return ret;
+	}
+
+	ret = anx7625_api_dpi_config(ctx);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n");
+		return ret;
+	}
+
+	/* set MIPI RX EN */
+	ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
+			       AP_AV_STATUS, AP_MIPI_RX_EN);
+	/* clear mute flag */
+	ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+				 AP_AV_STATUS, (u8)~AP_MIPI_MUTE);
+	if (ret < 0)
+		DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n");

drivers/gpu/drm/bridge/analogix/anx7625.c +93 -5

+		DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n",
+				     ctx->hdcp_support, ctx->hdcp_en);
+		DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n");
+		return anx7625_write_and(ctx, ctx->i2c.rx_p1_client,
+					 0xee, 0x9f);
+	}
+
+	anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap);
+	if (!(bcap & 0x01)) {
+		DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap);
+		return anx7625_write_and(ctx, ctx->i2c.rx_p1_client,
+					 0xee, 0x9f);
+	}
+
+	DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n");
+
+	return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20);
+}
+
 static void anx7625_dp_start(struct anx7625_data *ctx)
 {
 	int ret;

@@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx)
 		return;
 	}
 
+	/* HDCP config */
+	anx7625_hdcp_setting(ctx);
+
 	anx7625_config_audio_input(ctx);
 
-	ret = anx7625_dsi_config(ctx);
+	if (ctx->pdata.is_dpi)
+		ret = anx7625_dpi_config(ctx);
+	else
+		ret = anx7625_dsi_config(ctx);
 
 	if (ret < 0)
 		DRM_DEV_ERROR(dev, "MIPI phy setup error.\n");

@@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx)
 	return c;
 }
 
-static int edid_read(struct anx7625_data *ctx,
-		     u8 offset, u8 *pblock_buf)
+static int check_hdcp_support(struct anx7625_data *ctx)
+{
+	int ret;
+	struct device *dev = &ctx->client->dev;
+
+	/* Select HDCP1.4 Key load */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12);
+	/* Select flash addr low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91);
+	/* Select flash addr high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0);
+	/* Select sram length high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00);
+	/* Select sram length low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27);
+	/* Select flash length high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02);
+	/* Select flash length low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70);
+	/* Select sram addr high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00);
+	/* Select sram addr low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00);
+	/* Enable load with decrypt_en */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03);
+
+	usleep_range(10000, 11000);
+
+	/* Check load status */
+	ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "IO error : access flash load.\n");
+		return ret;
+	}
+
+	if ((ret & 0xF2) != 0xF2) {
+		ctx->hdcp_support = 0;
+		DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n");
+	} else {
+		ctx->hdcp_support = 1;
+		DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n");
+	}
+
+	return 0;
+}
+
+static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf)
 {
 	int ret, cnt;
 	struct device *dev = &ctx->client->dev;

@@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx,
 	return 0;
 }
 
+void hdcp_enable(struct anx7625_data *ctx, int en)
+{
+	struct device *dev = &ctx->client->dev;
+
+	DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en);
+
+	ctx->hdcp_en = !!en;
+}
+
 static int segments_edid_read(struct anx7625_data *ctx,
 			      u8 segment, u8 *buf, u8 offset)
 {

@@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state)
 
 	if (state) {
 		atomic_inc(&ctx->power_status);
-		if (atomic_read(&ctx->power_status) == 1)
+		if (atomic_read(&ctx->power_status) == 1) {
 			anx7625_power_on_init(ctx);
+			check_hdcp_support(ctx);
+		}
 	} else {
 		if (atomic_read(&ctx->power_status)) {
 			atomic_dec(&ctx->power_status);

@@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx)
 		return;
 	}
 
+	ctx->hpd_status = 1;
 	ctx->hpd_high_cnt++;
 
 	/* Not support HDCP */

@@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx)
 	ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10);
 	/* Interrupt for DRM */
 	ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01);
-	if (ret < 0)
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n");
 		return;
+	}
 
 	ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86);
 	if (ret < 0)

@@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx)
 	int ret, val;
 	struct device *dev = &ctx->client->dev;
 
+	/* Interrupt mode, no need poll HPD status, just return */
+	if (ctx->pdata.intp_irq)
+		return;
+
 	if (atomic_read(&ctx->power_status) != 1) {
 		DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n");
 		return;

drivers/gpu/drm/bridge/analogix/anx7625.c +37 -3

+
+	for (i = 0; i < ctx->pdata.reg_table_size; i++)
+		anx7625_reg_write(ctx, ctx->i2c.tx_p1_client,
+				  ctx->pdata.art[i].offset & 0xFF,
+				  ctx->pdata.art[i].data & 0xFF);
+}
+
 static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on)
 {
 	struct device *dev = &ctx->client->dev;

@@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on)
 	} else {
 		DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n");
 		anx7625_start_dp_work(ctx);
+		anx7625_dp_adjust_swing(ctx);
 	}
-
-	ctx->hpd_status = 1;
 }
 
 static int anx7625_hpd_change_detect(struct anx7625_data *ctx)

@@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+static int anx7625_get_u32_value(struct device_node *np,
+				 const char *name,
+				 int start_pos,
+				 int *reg_data)
+{
+	int i, ret;
+
+	/* each slot has 2 cells */
+	for (i = 0; i < 2; i++) {
+		ret = of_property_read_u32_index(np, name,
+						 start_pos + i,
+						 &reg_data[i]);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int anx7625_parse_dt(struct device *dev,
 			    struct anx7625_platform_data *pdata)
 {
 	struct device_node *np = dev->of_node;
 	struct drm_panel *panel;
-	int ret;
+	int ret, i;
+	int reg_data[2];
+	int total_size, num_regs, start_pos;
+
+	if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) {
+		/* each slot has 2 cells */
+		num_regs = total_size / (sizeof(u32) * 2);
+		if (num_regs > MAX_REG_SIZE)
+			num_regs = MAX_REG_SIZE;
+

drivers/gpu/drm/bridge/analogix/anx7625.c static int wait_aux_op_finish(struct anx7625_data *ctx) · line 222

Quoted 11 lines · Xin Ji

drivers/gpu/drm/bridge/analogix/anx7625.c +11 -0

+static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
+				 u8 addrh, u8 addrm, u8 addrl,
+				 u8 len, u8 *buf)
+{
+	struct device *dev = &ctx->client->dev;
+	int ret;
+	u8 cmd;
+
+	if (len > MAX_DPCD_BUFFER_SIZE) {
+		DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
+		return -E2BIG;

s/E2BIG/EINVAL/. -E2BIG means something else.

Quoted 116 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +105 -1

+	}
+
+	cmd = ((len - 1) << 4) | 0x09;
+
+	/* Set command and length */
+	ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				AP_AUX_COMMAND, cmd);
+
+	/* Set aux access address */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				 AP_AUX_ADDR_7_0, addrl);
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				 AP_AUX_ADDR_15_8, addrm);
+	ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+				 AP_AUX_ADDR_19_16, addrh);
+
+	/* Enable aux access */
+	ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
+				AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
+
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
+		return -EIO;
+	}
+
+	usleep_range(2000, 2100);
+
+	ret = wait_aux_op_finish(ctx);
+	if (ret) {
+		DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
+		return ret;
+	}
+
+	ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
+				     AP_AUX_BUFF_START, len, buf);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "read dpcd register failed\n");
+		return -EIO;
 	}
 
-	return val;
+	return 0;
 }
 
 static int anx7625_video_mute_control(struct anx7625_data *ctx,

@@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx)
 	return ret;
 }
 
+static int anx7625_api_dpi_config(struct anx7625_data *ctx)
+{
+	struct device *dev = &ctx->client->dev;
+	u16 freq = ctx->dt.pixelclock.min / 1000;
+	int ret;
+
+	/* configure pixel clock */
+	ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				PIXEL_CLOCK_L, freq & 0xFF);
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+				 PIXEL_CLOCK_H, (freq >> 8));
+
+	/* set DPI mode */
+	/* set to DPI PLL module sel */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+				 MIPI_DIGITAL_PLL_9, 0x20);
+	/* power down MIPI */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+				 MIPI_LANE_CTRL_10, 0x08);
+	/* enable DPI mode */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+				 MIPI_DIGITAL_PLL_18, 0x1C);
+	/* set first edge */
+	ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
+				 VIDEO_CONTROL_0, 0x06);
+	if (ret < 0)
+		DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n");
+
+	return ret;
+}
+
+static int anx7625_dpi_config(struct anx7625_data *ctx)
+{
+	struct device *dev = &ctx->client->dev;
+	int ret;
+
+	DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n");
+
+	/* DSC disable */
+	ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+				R_DSC_CTRL_0, ~DSC_EN);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n");
+		return ret;
+	}
+
+	ret = anx7625_config_bit_matrix(ctx);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "config bit matrix failed.\n");
+		return ret;
+	}
+
+	ret = anx7625_api_dpi_config(ctx);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n");
+		return ret;
+	}
+
+	/* set MIPI RX EN */
+	ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
+			       AP_AV_STATUS, AP_MIPI_RX_EN);
+	/* clear mute flag */
+	ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+				 AP_AV_STATUS, (u8)~AP_MIPI_MUTE);
+	if (ret < 0)
+		DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n");

drivers/gpu/drm/bridge/analogix/anx7625.c static int anx7625_dsi_config(struct anx7625_data *ctx) · line 741

Quoted 10 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +10 -0

+
+	return ret;
+}
+
+static int anx7625_hdcp_setting(struct anx7625_data *ctx)
+{
+	u8 bcap;
+	struct device *dev = &ctx->client->dev;
+
+	if (!(ctx->hdcp_support && ctx->hdcp_en)) {

Push the ! in and remove the parentheses.

	if (!ctx->hdcp_support || !ctx->hdcp_en) {

Quoted 157 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +93 -5

+		DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n",
+				     ctx->hdcp_support, ctx->hdcp_en);
+		DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n");
+		return anx7625_write_and(ctx, ctx->i2c.rx_p1_client,
+					 0xee, 0x9f);
+	}
+
+	anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap);
+	if (!(bcap & 0x01)) {
+		DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap);
+		return anx7625_write_and(ctx, ctx->i2c.rx_p1_client,
+					 0xee, 0x9f);
+	}
+
+	DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n");
+
+	return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20);
+}
+
 static void anx7625_dp_start(struct anx7625_data *ctx)
 {
 	int ret;

@@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx)
 		return;
 	}
 
+	/* HDCP config */
+	anx7625_hdcp_setting(ctx);
+
 	anx7625_config_audio_input(ctx);
 
-	ret = anx7625_dsi_config(ctx);
+	if (ctx->pdata.is_dpi)
+		ret = anx7625_dpi_config(ctx);
+	else
+		ret = anx7625_dsi_config(ctx);
 
 	if (ret < 0)
 		DRM_DEV_ERROR(dev, "MIPI phy setup error.\n");

@@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx)
 	return c;
 }
 
-static int edid_read(struct anx7625_data *ctx,
-		     u8 offset, u8 *pblock_buf)
+static int check_hdcp_support(struct anx7625_data *ctx)
+{
+	int ret;
+	struct device *dev = &ctx->client->dev;
+
+	/* Select HDCP1.4 Key load */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12);
+	/* Select flash addr low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91);
+	/* Select flash addr high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0);
+	/* Select sram length high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00);
+	/* Select sram length low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27);
+	/* Select flash length high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02);
+	/* Select flash length low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70);
+	/* Select sram addr high byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00);
+	/* Select sram addr low byte */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00);
+	/* Enable load with decrypt_en */
+	anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03);
+
+	usleep_range(10000, 11000);
+
+	/* Check load status */
+	ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA);
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "IO error : access flash load.\n");
+		return ret;
+	}
+
+	if ((ret & 0xF2) != 0xF2) {
+		ctx->hdcp_support = 0;
+		DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n");
+	} else {
+		ctx->hdcp_support = 1;
+		DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n");
+	}
+
+	return 0;
+}
+
+static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf)
 {
 	int ret, cnt;
 	struct device *dev = &ctx->client->dev;

@@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx,
 	return 0;
 }
 
+void hdcp_enable(struct anx7625_data *ctx, int en)
+{
+	struct device *dev = &ctx->client->dev;
+
+	DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en);
+
+	ctx->hdcp_en = !!en;
+}
+
 static int segments_edid_read(struct anx7625_data *ctx,
 			      u8 segment, u8 *buf, u8 offset)
 {

@@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state)
 
 	if (state) {
 		atomic_inc(&ctx->power_status);
-		if (atomic_read(&ctx->power_status) == 1)
+		if (atomic_read(&ctx->power_status) == 1) {
 			anx7625_power_on_init(ctx);
+			check_hdcp_support(ctx);
+		}
 	} else {
 		if (atomic_read(&ctx->power_status)) {
 			atomic_dec(&ctx->power_status);

@@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx)
 		return;
 	}
 
+	ctx->hpd_status = 1;
 	ctx->hpd_high_cnt++;
 
 	/* Not support HDCP */

@@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx)
 	ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10);
 	/* Interrupt for DRM */
 	ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01);
-	if (ret < 0)
+	if (ret < 0) {
+		DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n");
 		return;
+	}
 
 	ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86);
 	if (ret < 0)

@@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx)
 	int ret, val;
 	struct device *dev = &ctx->client->dev;
 
+	/* Interrupt mode, no need poll HPD status, just return */
+	if (ctx->pdata.intp_irq)
+		return;
+
 	if (atomic_read(&ctx->power_status) != 1) {
 		DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n");
 		return;

drivers/gpu/drm/bridge/analogix/anx7625.c static void anx7625_remove_edid(struct anx7625_data *ctx) · line 1371

Quoted 10 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +7 -0

@@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx)
 	ctx->slimport_edid_p.edid_block_num = -1;
 }
 
+static void anx7625_dp_adjust_swing(struct anx7625_data *ctx)
+{
+	struct device *dev = &ctx->client->dev;
+	int i;
+
+	if (!ctx->pdata.reg_table_size)
+		return;

No need for this check. Just remove it and the for loop becomes a no-op.

drivers/gpu/drm/bridge/analogix/anx7625.c static void anx7625_remove_edid(struct anx7625_data *ctx) · line 1373

Quoted 2 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +2 -0

+
+	DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n");

Delete this debug statement and use ftrace for this information.

Quoted 65 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +41 -3

+
+	for (i = 0; i < ctx->pdata.reg_table_size; i++)
+		anx7625_reg_write(ctx, ctx->i2c.tx_p1_client,
+				  ctx->pdata.art[i].offset & 0xFF,
+				  ctx->pdata.art[i].data & 0xFF);
+}
+
 static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on)
 {
 	struct device *dev = &ctx->client->dev;

@@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on)
 	} else {
 		DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n");
 		anx7625_start_dp_work(ctx);
+		anx7625_dp_adjust_swing(ctx);
 	}
-
-	ctx->hpd_status = 1;
 }
 
 static int anx7625_hpd_change_detect(struct anx7625_data *ctx)

@@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+static int anx7625_get_u32_value(struct device_node *np,
+				 const char *name,
+				 int start_pos,
+				 int *reg_data)
+{
+	int i, ret;
+
+	/* each slot has 2 cells */
+	for (i = 0; i < 2; i++) {
+		ret = of_property_read_u32_index(np, name,
+						 start_pos + i,
+						 &reg_data[i]);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int anx7625_parse_dt(struct device *dev,
 			    struct anx7625_platform_data *pdata)
 {
 	struct device_node *np = dev->of_node;
 	struct drm_panel *panel;
-	int ret;
+	int ret, i;
+	int reg_data[2];
+	int total_size, num_regs, start_pos;
+
+	if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) {
+		/* each slot has 2 cells */
+		num_regs = total_size / (sizeof(u32) * 2);
+		if (num_regs > MAX_REG_SIZE)
+			num_regs = MAX_REG_SIZE;
+
+		pdata->reg_table_size = num_regs;
+
+		for (i = 0; i < num_regs; i++) {
+			start_pos = i * 2;

drivers/gpu/drm/bridge/analogix/anx7625.c static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) · line 1517

Quoted 6 lines

drivers/gpu/drm/bridge/analogix/anx7625.c +6 -0

+			ret = anx7625_get_u32_value(np, "anx,swing-setting",
+						    start_pos, reg_data);
+			if (ret) {
+				DRM_DEV_ERROR(dev, "get swing-setting at %d\n",
+					      start_pos);
+				return -ENODEV;

return ret;?

regards,
dan carpenter