powerpc: Add second POWER8 PVR entry
PATCH 1/1 powerpc: Add second POWER8 PVR entry
POWER8 comes with two different PVRs. This patch enables the additional PVR in the cputable.
The existing entry (PVR=0x4b) is renamed to POWER8E and the new entry (PVR=0x4d) is given POWER8.
arch/powerpc/include/asm/reg.h +2 -1
@@ -1088,7 +1088,8 @@#define PVR_970MP 0x0044#define PVR_970GX 0x0045#define PVR_POWER7p 0x004A -#define PVR_POWER8 0x004B +#define PVR_POWER8E 0x004B +#define PVR_POWER8 0x004D#define PVR_BE 0x0070#define PVR_PA6T 0x0090
arch/powerpc/kernel/cputable.c +19 -1
@@ -494,9 +494,27 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_restore = __restore_cpu_power7, .platform = "power7+", }, - {/* Power8 */ + {/* Power8E */ .pvr_mask = 0xffff0000, .pvr_value = 0x004b0000, + .cpu_name = "POWER8E (raw)", + .cpu_features = CPU_FTRS_POWER8, + .cpu_user_features = COMMON_USER_POWER8, + .cpu_user_features2 = COMMON_USER2_POWER8, + .mmu_features = MMU_FTRS_POWER8, + .icache_bsize = 128, + .dcache_bsize = 128, + .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, + .oprofile_cpu_type = "ppc64/power8", + .oprofile_type = PPC_OPROFILE_INVALID, + .cpu_setup = __setup_cpu_power8, + .cpu_restore = __restore_cpu_power8, + .platform = "power8", + }, + { /* Power8 */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x004d0000, .cpu_name = "POWER8 (raw)", .cpu_features = CPU_FTRS_POWER8, .cpu_user_features = COMMON_USER_POWER8,
arch/powerpc/kernel/prom_init.c +3 -2
@@ -644,7 +644,8 @@ unsigned char ibm_architecture_vec[] = {W (0xfffe0000 ),W (0x003a0000 ),/* POWER5/POWER5+ */ W (0xffff0000 ),W (0x003e0000 ),/* POWER6 */ W (0xffff0000 ),W (0x003f0000 ),/* POWER7 */ -W (0xffff0000 ),W (0x004b0000 ),/* POWER8 */ +W (0xffff0000 ),W (0x004b0000 ),/* POWER8E */ +W (0xffff0000 ),W (0x004d0000 ),/* POWER8 */ W (0xffffffff ),W (0x0f000004 ),/* all 2.07-compliant */ W (0xffffffff ),W (0x0f000003 ),/* all 2.06-compliant */ W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
@@ -706,7 +707,7 @@ unsigned char ibm_architecture_vec[] = {* must match by the macro below. Update the definition if * the structure layout changes. */ -#define IBM_ARCH_VEC_NRCORES_OFFSET 117 +#define IBM_ARCH_VEC_NRCORES_OFFSET 125W (NR_CPUS ),/* number of cores supported */ 0 , 0,
Quoted 5 lines · Michael Neuling
POWER8 comes with two different PVRs. This patch enables the additional PVR in the cputable.
The existing entry (PVR=0x4b) is renamed to POWER8E and the new entry (PVR=0x4d) is given POWER8.
Hey Mikey,
Is there any feature or architectural difference between these two different PVR based P8 chips ?
Regards
Anshuman
Quoted 11 lines · Anshuman Khandual
Quoted 5 lines · Michael Neuling
POWER8 comes with two different PVRs. This patch enables the additional PVR in the cputable.
The existing entry (PVR=0x4b) is renamed to POWER8E and the new entry (PVR=0x4d) is given POWER8.
Hey Mikey,
Is there any feature or architectural difference between these two different PVR based P8 chips ?
I've kept the CPU_FTRs the same.
Mikey